atstk1000.c 2.1 KB

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  1. /*
  2. * Copyright (C) 2005-2006 Atmel Corporation
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include <common.h>
  7. #include <asm/io.h>
  8. #include <asm/sdram.h>
  9. #include <asm/arch/clk.h>
  10. #include <asm/arch/hmatrix.h>
  11. #include <asm/arch/mmu.h>
  12. #include <asm/arch/portmux.h>
  13. #include <netdev.h>
  14. DECLARE_GLOBAL_DATA_PTR;
  15. struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
  16. {
  17. .virt_pgno = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT,
  18. .nr_pages = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT,
  19. .phys = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT)
  20. | MMU_VMR_CACHE_NONE,
  21. }, {
  22. .virt_pgno = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT,
  23. .nr_pages = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT,
  24. .phys = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT)
  25. | MMU_VMR_CACHE_WRBACK,
  26. },
  27. };
  28. static const struct sdram_config sdram_config = {
  29. .data_bits = SDRAM_DATA_32BIT,
  30. #ifdef CONFIG_ATSTK1000_16MB_SDRAM
  31. /* MT48LC4M32B2P-6 (16 MB) on mod'ed motherboard */
  32. .row_bits = 12,
  33. #else
  34. /* MT48LC2M32B2P-5 (8 MB) on motherboard */
  35. .row_bits = 11,
  36. #endif
  37. .col_bits = 8,
  38. .bank_bits = 2,
  39. .cas = 3,
  40. .twr = 2,
  41. .trc = 7,
  42. .trp = 2,
  43. .trcd = 2,
  44. .tras = 5,
  45. .txsr = 5,
  46. /* 15.6 us */
  47. .refresh_period = (156 * (SDRAMC_BUS_HZ / 1000)) / 10000,
  48. };
  49. int board_early_init_f(void)
  50. {
  51. /* Enable SDRAM in the EBI mux */
  52. hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
  53. portmux_enable_ebi(sdram_config.data_bits, 23, 0, PORTMUX_DRIVE_HIGH);
  54. sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config);
  55. portmux_enable_usart1(PORTMUX_DRIVE_MIN);
  56. #if defined(CONFIG_MACB)
  57. portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_LOW);
  58. portmux_enable_macb1(PORTMUX_MACB_MII, PORTMUX_DRIVE_LOW);
  59. #endif
  60. #if defined(CONFIG_MMC)
  61. portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW);
  62. #endif
  63. return 0;
  64. }
  65. int board_early_init_r(void)
  66. {
  67. gd->bd->bi_phy_id[0] = 0x10;
  68. gd->bd->bi_phy_id[1] = 0x11;
  69. return 0;
  70. }
  71. #ifdef CONFIG_CMD_NET
  72. int board_eth_init(bd_t *bi)
  73. {
  74. macb_eth_initialize(0, (void *)ATMEL_BASE_MACB0, bi->bi_phy_id[0]);
  75. macb_eth_initialize(1, (void *)ATMEL_BASE_MACB1, bi->bi_phy_id[1]);
  76. return 0;
  77. }
  78. #endif