ptrace.h 2.8 KB

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  1. /*
  2. * Copyright (C) 2006 Atmel Corporation
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #ifndef __ASM_AVR32_PTRACE_H
  7. #define __ASM_AVR32_PTRACE_H
  8. /*
  9. * Status Register bits
  10. */
  11. #define SR_H 0x40000000
  12. #define SR_R 0x20000000
  13. #define SR_J 0x10000000
  14. #define SR_DM 0x08000000
  15. #define SR_D 0x04000000
  16. #define MODE_NMI 0x01c00000
  17. #define MODE_EXCEPTION 0x01800000
  18. #define MODE_INT3 0x01400000
  19. #define MODE_INT2 0x01000000
  20. #define MODE_INT1 0x00c00000
  21. #define MODE_INT0 0x00800000
  22. #define MODE_SUPERVISOR 0x00400000
  23. #define MODE_USER 0x00000000
  24. #define MODE_MASK 0x01c00000
  25. #define SR_EM 0x00200000
  26. #define SR_I3M 0x00100000
  27. #define SR_I2M 0x00080000
  28. #define SR_I1M 0x00040000
  29. #define SR_I0M 0x00020000
  30. #define SR_GM 0x00010000
  31. #define MODE_SHIFT 22
  32. #define SR_EM_BIT 21
  33. #define SR_I3M_BIT 20
  34. #define SR_I2M_BIT 19
  35. #define SR_I1M_BIT 18
  36. #define SR_I0M_BIT 17
  37. #define SR_GM_BIT 16
  38. /* The user-visible part */
  39. #define SR_Q 0x00000010
  40. #define SR_V 0x00000008
  41. #define SR_N 0x00000004
  42. #define SR_Z 0x00000002
  43. #define SR_C 0x00000001
  44. /*
  45. * The order is defined by the stdsp instruction. r0 is stored first, so it
  46. * gets the highest address.
  47. *
  48. * Registers 0-12 are general-purpose registers (r12 is normally used for
  49. * the function return value).
  50. * Register 13 is the stack pointer
  51. * Register 14 is the link register
  52. * Register 15 is the program counter
  53. */
  54. #define FRAME_SIZE_FULL 72
  55. #define REG_R12_ORIG 68
  56. #define REG_R0 64
  57. #define REG_R1 60
  58. #define REG_R2 56
  59. #define REG_R3 52
  60. #define REG_R4 48
  61. #define REG_R5 44
  62. #define REG_R6 40
  63. #define REG_R7 36
  64. #define REG_R8 32
  65. #define REG_R9 28
  66. #define REG_R10 34
  67. #define REG_R11 20
  68. #define REG_R12 16
  69. #define REG_SP 12
  70. #define REG_LR 8
  71. #define FRAME_SIZE_MIN 8
  72. #define REG_PC 4
  73. #define REG_SR 0
  74. #ifndef __ASSEMBLY__
  75. struct pt_regs {
  76. /* These are always saved */
  77. unsigned long sr;
  78. unsigned long pc;
  79. /* These are sometimes saved */
  80. unsigned long lr;
  81. unsigned long sp;
  82. unsigned long r12;
  83. unsigned long r11;
  84. unsigned long r10;
  85. unsigned long r9;
  86. unsigned long r8;
  87. unsigned long r7;
  88. unsigned long r6;
  89. unsigned long r5;
  90. unsigned long r4;
  91. unsigned long r3;
  92. unsigned long r2;
  93. unsigned long r1;
  94. unsigned long r0;
  95. /* Only saved on system call */
  96. unsigned long r12_orig;
  97. };
  98. #ifdef __KERNEL__
  99. # define user_mode(regs) (((regs)->sr & MODE_MASK) == MODE_USER)
  100. # define instruction_pointer(regs) ((regs)->pc)
  101. extern void show_regs (struct pt_regs *);
  102. static __inline__ int valid_user_regs(struct pt_regs *regs)
  103. {
  104. /*
  105. * Some of the Java bits might be acceptable if/when we
  106. * implement some support for that stuff...
  107. */
  108. if ((regs->sr & 0xffff0000) == 0)
  109. return 1;
  110. /*
  111. * Force status register flags to be sane and report this
  112. * illegal behaviour...
  113. */
  114. regs->sr &= 0x0000ffff;
  115. return 0;
  116. }
  117. #endif
  118. #endif /* ! __ASSEMBLY__ */
  119. #endif /* __ASM_AVR32_PTRACE_H */