mmu.h 2.2 KB

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  1. /*
  2. * In order to deal with the hardcoded u-boot requirement that virtual
  3. * addresses are always mapped 1:1 with physical addresses, we implement
  4. * a small virtual memory manager so that we can use the MMU hardware in
  5. * order to get the caching properties right.
  6. *
  7. * A few pages (or possibly just one) are locked in the TLB permanently
  8. * in order to avoid recursive TLB misses, but most pages are faulted in
  9. * on demand.
  10. */
  11. #ifndef __ASM_ARCH_MMU_H
  12. #define __ASM_ARCH_MMU_H
  13. #include <asm/sysreg.h>
  14. #define MMU_PAGE_SHIFT 20
  15. #define MMU_PAGE_SIZE (1UL << MMU_PAGE_SHIFT)
  16. #define MMU_PAGE_ADDR_MASK (~(MMU_PAGE_SIZE - 1))
  17. #define MMU_VMR_CACHE_NONE \
  18. (SYSREG_BF(AP, 3) | SYSREG_BF(SZ, 3) | SYSREG_BIT(TLBELO_D))
  19. #define MMU_VMR_CACHE_WBUF \
  20. (MMU_VMR_CACHE_NONE | SYSREG_BIT(B))
  21. #define MMU_VMR_CACHE_WRTHRU \
  22. (MMU_VMR_CACHE_NONE | SYSREG_BIT(TLBELO_C) | SYSREG_BIT(W))
  23. #define MMU_VMR_CACHE_WRBACK \
  24. (MMU_VMR_CACHE_WBUF | SYSREG_BIT(TLBELO_C))
  25. /*
  26. * This structure is used in our "page table". Instead of the usual
  27. * x86-inspired radix tree, we let each entry cover an arbitrary-sized
  28. * virtual address range and store them in a binary search tree. This is
  29. * somewhat slower, but should use significantly less RAM, and we
  30. * shouldn't get many TLB misses when using 1 MB pages anyway.
  31. *
  32. * With 1 MB pages, we need 12 bits to store the page number. In
  33. * addition, we stick an Invalid bit in the high bit of virt_pgno (if
  34. * set, it cannot possibly match any faulting page), and all the bits
  35. * that need to be written to TLBELO in phys_pgno.
  36. */
  37. struct mmu_vm_range {
  38. uint16_t virt_pgno;
  39. uint16_t nr_pages;
  40. uint32_t phys;
  41. };
  42. /*
  43. * An array of mmu_vm_range objects describing all pageable addresses.
  44. * The array is sorted by virt_pgno so that the TLB miss exception
  45. * handler can do a binary search to find the correct entry.
  46. */
  47. extern struct mmu_vm_range mmu_vmr_table[];
  48. /*
  49. * Initialize the MMU. This will set up a fixed TLB entry for the static
  50. * u-boot image at dest_addr and enable paging.
  51. */
  52. void mmu_init_r(unsigned long dest_addr);
  53. /*
  54. * Handle a TLB miss exception. This function is called directly from
  55. * the exception vector table written in assembly.
  56. */
  57. int mmu_handle_tlb_miss(void);
  58. #endif /* __ASM_ARCH_MMU_H */