interrupts.c 2.3 KB

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  1. /*
  2. * Copyright (C) 2004-2006 Atmel Corporation
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include <common.h>
  7. #include <div64.h>
  8. #include <linux/errno.h>
  9. #include <asm/io.h>
  10. #include <asm/processor.h>
  11. #include <asm/sysreg.h>
  12. #include <asm/arch/hardware.h>
  13. #define HANDLER_MASK 0x00ffffff
  14. #define INTLEV_SHIFT 30
  15. #define INTLEV_MASK 0x00000003
  16. DECLARE_GLOBAL_DATA_PTR;
  17. /* Incremented whenever COUNT reaches 0xffffffff by timer_interrupt_handler */
  18. volatile unsigned long timer_overflow;
  19. /*
  20. * Instead of dividing by get_tbclk(), multiply by this constant and
  21. * right-shift the result by 32 bits.
  22. */
  23. static unsigned long tb_factor;
  24. unsigned long get_tbclk(void)
  25. {
  26. return gd->arch.cpu_hz;
  27. }
  28. unsigned long long get_ticks(void)
  29. {
  30. unsigned long lo, hi_now, hi_prev;
  31. do {
  32. hi_prev = timer_overflow;
  33. lo = sysreg_read(COUNT);
  34. hi_now = timer_overflow;
  35. } while (hi_prev != hi_now);
  36. return ((unsigned long long)hi_now << 32) | lo;
  37. }
  38. unsigned long get_timer(unsigned long base)
  39. {
  40. u64 now = get_ticks();
  41. now *= tb_factor;
  42. return (unsigned long)(now >> 32) - base;
  43. }
  44. /*
  45. * For short delays only. It will overflow after a few seconds.
  46. */
  47. void __udelay(unsigned long usec)
  48. {
  49. unsigned long cycles;
  50. unsigned long base;
  51. unsigned long now;
  52. base = sysreg_read(COUNT);
  53. cycles = ((usec * (get_tbclk() / 10000)) + 50) / 100;
  54. do {
  55. now = sysreg_read(COUNT);
  56. } while ((now - base) < cycles);
  57. }
  58. static int set_interrupt_handler(unsigned int nr, void (*handler)(void),
  59. unsigned int priority)
  60. {
  61. extern void _evba(void);
  62. unsigned long intpr;
  63. unsigned long handler_addr = (unsigned long)handler;
  64. handler_addr -= (unsigned long)&_evba;
  65. if ((handler_addr & HANDLER_MASK) != handler_addr
  66. || (priority & INTLEV_MASK) != priority)
  67. return -EINVAL;
  68. intpr = (handler_addr & HANDLER_MASK);
  69. intpr |= (priority & INTLEV_MASK) << INTLEV_SHIFT;
  70. writel(intpr, (void *)ATMEL_BASE_INTC + 4 * nr);
  71. return 0;
  72. }
  73. int timer_init(void)
  74. {
  75. extern void timer_interrupt_handler(void);
  76. u64 tmp;
  77. sysreg_write(COUNT, 0);
  78. tmp = (u64)CONFIG_SYS_HZ << 32;
  79. tmp += gd->arch.cpu_hz / 2;
  80. do_div(tmp, gd->arch.cpu_hz);
  81. tb_factor = (u32)tmp;
  82. if (set_interrupt_handler(0, &timer_interrupt_handler, 3))
  83. return -EINVAL;
  84. /* For all practical purposes, this gives us an overflow interrupt */
  85. sysreg_write(COMPARE, 0xffffffff);
  86. return 0;
  87. }