spi-mem.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2018 Exceet Electronics GmbH
  4. * Copyright (C) 2018 Bootlin
  5. *
  6. * Author: Boris Brezillon <boris.brezillon@bootlin.com>
  7. */
  8. #ifndef __UBOOT__
  9. #include <log.h>
  10. #include <dm/devres.h>
  11. #include <linux/dmaengine.h>
  12. #include <linux/pm_runtime.h>
  13. #include "internals.h"
  14. #else
  15. #include <common.h>
  16. #include <dm.h>
  17. #include <errno.h>
  18. #include <malloc.h>
  19. #include <spi.h>
  20. #include <spi.h>
  21. #include <spi-mem.h>
  22. #include <dm/device_compat.h>
  23. #endif
  24. #ifndef __UBOOT__
  25. /**
  26. * spi_controller_dma_map_mem_op_data() - DMA-map the buffer attached to a
  27. * memory operation
  28. * @ctlr: the SPI controller requesting this dma_map()
  29. * @op: the memory operation containing the buffer to map
  30. * @sgt: a pointer to a non-initialized sg_table that will be filled by this
  31. * function
  32. *
  33. * Some controllers might want to do DMA on the data buffer embedded in @op.
  34. * This helper prepares everything for you and provides a ready-to-use
  35. * sg_table. This function is not intended to be called from spi drivers.
  36. * Only SPI controller drivers should use it.
  37. * Note that the caller must ensure the memory region pointed by
  38. * op->data.buf.{in,out} is DMA-able before calling this function.
  39. *
  40. * Return: 0 in case of success, a negative error code otherwise.
  41. */
  42. int spi_controller_dma_map_mem_op_data(struct spi_controller *ctlr,
  43. const struct spi_mem_op *op,
  44. struct sg_table *sgt)
  45. {
  46. struct device *dmadev;
  47. if (!op->data.nbytes)
  48. return -EINVAL;
  49. if (op->data.dir == SPI_MEM_DATA_OUT && ctlr->dma_tx)
  50. dmadev = ctlr->dma_tx->device->dev;
  51. else if (op->data.dir == SPI_MEM_DATA_IN && ctlr->dma_rx)
  52. dmadev = ctlr->dma_rx->device->dev;
  53. else
  54. dmadev = ctlr->dev.parent;
  55. if (!dmadev)
  56. return -EINVAL;
  57. return spi_map_buf(ctlr, dmadev, sgt, op->data.buf.in, op->data.nbytes,
  58. op->data.dir == SPI_MEM_DATA_IN ?
  59. DMA_FROM_DEVICE : DMA_TO_DEVICE);
  60. }
  61. EXPORT_SYMBOL_GPL(spi_controller_dma_map_mem_op_data);
  62. /**
  63. * spi_controller_dma_unmap_mem_op_data() - DMA-unmap the buffer attached to a
  64. * memory operation
  65. * @ctlr: the SPI controller requesting this dma_unmap()
  66. * @op: the memory operation containing the buffer to unmap
  67. * @sgt: a pointer to an sg_table previously initialized by
  68. * spi_controller_dma_map_mem_op_data()
  69. *
  70. * Some controllers might want to do DMA on the data buffer embedded in @op.
  71. * This helper prepares things so that the CPU can access the
  72. * op->data.buf.{in,out} buffer again.
  73. *
  74. * This function is not intended to be called from SPI drivers. Only SPI
  75. * controller drivers should use it.
  76. *
  77. * This function should be called after the DMA operation has finished and is
  78. * only valid if the previous spi_controller_dma_map_mem_op_data() call
  79. * returned 0.
  80. *
  81. * Return: 0 in case of success, a negative error code otherwise.
  82. */
  83. void spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr,
  84. const struct spi_mem_op *op,
  85. struct sg_table *sgt)
  86. {
  87. struct device *dmadev;
  88. if (!op->data.nbytes)
  89. return;
  90. if (op->data.dir == SPI_MEM_DATA_OUT && ctlr->dma_tx)
  91. dmadev = ctlr->dma_tx->device->dev;
  92. else if (op->data.dir == SPI_MEM_DATA_IN && ctlr->dma_rx)
  93. dmadev = ctlr->dma_rx->device->dev;
  94. else
  95. dmadev = ctlr->dev.parent;
  96. spi_unmap_buf(ctlr, dmadev, sgt,
  97. op->data.dir == SPI_MEM_DATA_IN ?
  98. DMA_FROM_DEVICE : DMA_TO_DEVICE);
  99. }
  100. EXPORT_SYMBOL_GPL(spi_controller_dma_unmap_mem_op_data);
  101. #endif /* __UBOOT__ */
  102. static int spi_check_buswidth_req(struct spi_slave *slave, u8 buswidth, bool tx)
  103. {
  104. u32 mode = slave->mode;
  105. switch (buswidth) {
  106. case 1:
  107. return 0;
  108. case 2:
  109. if ((tx && (mode & (SPI_TX_DUAL | SPI_TX_QUAD))) ||
  110. (!tx && (mode & (SPI_RX_DUAL | SPI_RX_QUAD))))
  111. return 0;
  112. break;
  113. case 4:
  114. if ((tx && (mode & SPI_TX_QUAD)) ||
  115. (!tx && (mode & SPI_RX_QUAD)))
  116. return 0;
  117. break;
  118. case 8:
  119. if ((tx && (mode & SPI_TX_OCTAL)) ||
  120. (!tx && (mode & SPI_RX_OCTAL)))
  121. return 0;
  122. break;
  123. default:
  124. break;
  125. }
  126. return -ENOTSUPP;
  127. }
  128. bool spi_mem_default_supports_op(struct spi_slave *slave,
  129. const struct spi_mem_op *op)
  130. {
  131. if (spi_check_buswidth_req(slave, op->cmd.buswidth, true))
  132. return false;
  133. if (op->addr.nbytes &&
  134. spi_check_buswidth_req(slave, op->addr.buswidth, true))
  135. return false;
  136. if (op->dummy.nbytes &&
  137. spi_check_buswidth_req(slave, op->dummy.buswidth, true))
  138. return false;
  139. if (op->data.dir != SPI_MEM_NO_DATA &&
  140. spi_check_buswidth_req(slave, op->data.buswidth,
  141. op->data.dir == SPI_MEM_DATA_OUT))
  142. return false;
  143. return true;
  144. }
  145. EXPORT_SYMBOL_GPL(spi_mem_default_supports_op);
  146. /**
  147. * spi_mem_supports_op() - Check if a memory device and the controller it is
  148. * connected to support a specific memory operation
  149. * @slave: the SPI device
  150. * @op: the memory operation to check
  151. *
  152. * Some controllers are only supporting Single or Dual IOs, others might only
  153. * support specific opcodes, or it can even be that the controller and device
  154. * both support Quad IOs but the hardware prevents you from using it because
  155. * only 2 IO lines are connected.
  156. *
  157. * This function checks whether a specific operation is supported.
  158. *
  159. * Return: true if @op is supported, false otherwise.
  160. */
  161. bool spi_mem_supports_op(struct spi_slave *slave,
  162. const struct spi_mem_op *op)
  163. {
  164. struct udevice *bus = slave->dev->parent;
  165. struct dm_spi_ops *ops = spi_get_ops(bus);
  166. if (ops->mem_ops && ops->mem_ops->supports_op)
  167. return ops->mem_ops->supports_op(slave, op);
  168. return spi_mem_default_supports_op(slave, op);
  169. }
  170. EXPORT_SYMBOL_GPL(spi_mem_supports_op);
  171. /**
  172. * spi_mem_exec_op() - Execute a memory operation
  173. * @slave: the SPI device
  174. * @op: the memory operation to execute
  175. *
  176. * Executes a memory operation.
  177. *
  178. * This function first checks that @op is supported and then tries to execute
  179. * it.
  180. *
  181. * Return: 0 in case of success, a negative error code otherwise.
  182. */
  183. int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op)
  184. {
  185. struct udevice *bus = slave->dev->parent;
  186. struct dm_spi_ops *ops = spi_get_ops(bus);
  187. unsigned int pos = 0;
  188. const u8 *tx_buf = NULL;
  189. u8 *rx_buf = NULL;
  190. int op_len;
  191. u32 flag;
  192. int ret;
  193. int i;
  194. if (!spi_mem_supports_op(slave, op))
  195. return -ENOTSUPP;
  196. ret = spi_claim_bus(slave);
  197. if (ret < 0)
  198. return ret;
  199. if (ops->mem_ops && ops->mem_ops->exec_op) {
  200. #ifndef __UBOOT__
  201. /*
  202. * Flush the message queue before executing our SPI memory
  203. * operation to prevent preemption of regular SPI transfers.
  204. */
  205. spi_flush_queue(ctlr);
  206. if (ctlr->auto_runtime_pm) {
  207. ret = pm_runtime_get_sync(ctlr->dev.parent);
  208. if (ret < 0) {
  209. dev_err(&ctlr->dev,
  210. "Failed to power device: %d\n",
  211. ret);
  212. return ret;
  213. }
  214. }
  215. mutex_lock(&ctlr->bus_lock_mutex);
  216. mutex_lock(&ctlr->io_mutex);
  217. #endif
  218. ret = ops->mem_ops->exec_op(slave, op);
  219. #ifndef __UBOOT__
  220. mutex_unlock(&ctlr->io_mutex);
  221. mutex_unlock(&ctlr->bus_lock_mutex);
  222. if (ctlr->auto_runtime_pm)
  223. pm_runtime_put(ctlr->dev.parent);
  224. #endif
  225. /*
  226. * Some controllers only optimize specific paths (typically the
  227. * read path) and expect the core to use the regular SPI
  228. * interface in other cases.
  229. */
  230. if (!ret || ret != -ENOTSUPP) {
  231. spi_release_bus(slave);
  232. return ret;
  233. }
  234. }
  235. #ifndef __UBOOT__
  236. tmpbufsize = sizeof(op->cmd.opcode) + op->addr.nbytes +
  237. op->dummy.nbytes;
  238. /*
  239. * Allocate a buffer to transmit the CMD, ADDR cycles with kmalloc() so
  240. * we're guaranteed that this buffer is DMA-able, as required by the
  241. * SPI layer.
  242. */
  243. tmpbuf = kzalloc(tmpbufsize, GFP_KERNEL | GFP_DMA);
  244. if (!tmpbuf)
  245. return -ENOMEM;
  246. spi_message_init(&msg);
  247. tmpbuf[0] = op->cmd.opcode;
  248. xfers[xferpos].tx_buf = tmpbuf;
  249. xfers[xferpos].len = sizeof(op->cmd.opcode);
  250. xfers[xferpos].tx_nbits = op->cmd.buswidth;
  251. spi_message_add_tail(&xfers[xferpos], &msg);
  252. xferpos++;
  253. totalxferlen++;
  254. if (op->addr.nbytes) {
  255. int i;
  256. for (i = 0; i < op->addr.nbytes; i++)
  257. tmpbuf[i + 1] = op->addr.val >>
  258. (8 * (op->addr.nbytes - i - 1));
  259. xfers[xferpos].tx_buf = tmpbuf + 1;
  260. xfers[xferpos].len = op->addr.nbytes;
  261. xfers[xferpos].tx_nbits = op->addr.buswidth;
  262. spi_message_add_tail(&xfers[xferpos], &msg);
  263. xferpos++;
  264. totalxferlen += op->addr.nbytes;
  265. }
  266. if (op->dummy.nbytes) {
  267. memset(tmpbuf + op->addr.nbytes + 1, 0xff, op->dummy.nbytes);
  268. xfers[xferpos].tx_buf = tmpbuf + op->addr.nbytes + 1;
  269. xfers[xferpos].len = op->dummy.nbytes;
  270. xfers[xferpos].tx_nbits = op->dummy.buswidth;
  271. spi_message_add_tail(&xfers[xferpos], &msg);
  272. xferpos++;
  273. totalxferlen += op->dummy.nbytes;
  274. }
  275. if (op->data.nbytes) {
  276. if (op->data.dir == SPI_MEM_DATA_IN) {
  277. xfers[xferpos].rx_buf = op->data.buf.in;
  278. xfers[xferpos].rx_nbits = op->data.buswidth;
  279. } else {
  280. xfers[xferpos].tx_buf = op->data.buf.out;
  281. xfers[xferpos].tx_nbits = op->data.buswidth;
  282. }
  283. xfers[xferpos].len = op->data.nbytes;
  284. spi_message_add_tail(&xfers[xferpos], &msg);
  285. xferpos++;
  286. totalxferlen += op->data.nbytes;
  287. }
  288. ret = spi_sync(slave, &msg);
  289. kfree(tmpbuf);
  290. if (ret)
  291. return ret;
  292. if (msg.actual_length != totalxferlen)
  293. return -EIO;
  294. #else
  295. if (op->data.nbytes) {
  296. if (op->data.dir == SPI_MEM_DATA_IN)
  297. rx_buf = op->data.buf.in;
  298. else
  299. tx_buf = op->data.buf.out;
  300. }
  301. op_len = sizeof(op->cmd.opcode) + op->addr.nbytes + op->dummy.nbytes;
  302. /*
  303. * Avoid using malloc() here so that we can use this code in SPL where
  304. * simple malloc may be used. That implementation does not allow free()
  305. * so repeated calls to this code can exhaust the space.
  306. *
  307. * The value of op_len is small, since it does not include the actual
  308. * data being sent, only the op-code and address. In fact, it should be
  309. * possible to just use a small fixed value here instead of op_len.
  310. */
  311. u8 op_buf[op_len];
  312. op_buf[pos++] = op->cmd.opcode;
  313. if (op->addr.nbytes) {
  314. for (i = 0; i < op->addr.nbytes; i++)
  315. op_buf[pos + i] = op->addr.val >>
  316. (8 * (op->addr.nbytes - i - 1));
  317. pos += op->addr.nbytes;
  318. }
  319. if (op->dummy.nbytes)
  320. memset(op_buf + pos, 0xff, op->dummy.nbytes);
  321. /* 1st transfer: opcode + address + dummy cycles */
  322. flag = SPI_XFER_BEGIN;
  323. /* Make sure to set END bit if no tx or rx data messages follow */
  324. if (!tx_buf && !rx_buf)
  325. flag |= SPI_XFER_END;
  326. ret = spi_xfer(slave, op_len * 8, op_buf, NULL, flag);
  327. if (ret)
  328. return ret;
  329. /* 2nd transfer: rx or tx data path */
  330. if (tx_buf || rx_buf) {
  331. ret = spi_xfer(slave, op->data.nbytes * 8, tx_buf,
  332. rx_buf, SPI_XFER_END);
  333. if (ret)
  334. return ret;
  335. }
  336. spi_release_bus(slave);
  337. for (i = 0; i < pos; i++)
  338. debug("%02x ", op_buf[i]);
  339. debug("| [%dB %s] ",
  340. tx_buf || rx_buf ? op->data.nbytes : 0,
  341. tx_buf || rx_buf ? (tx_buf ? "out" : "in") : "-");
  342. for (i = 0; i < op->data.nbytes; i++)
  343. debug("%02x ", tx_buf ? tx_buf[i] : rx_buf[i]);
  344. debug("[ret %d]\n", ret);
  345. if (ret < 0)
  346. return ret;
  347. #endif /* __UBOOT__ */
  348. return 0;
  349. }
  350. EXPORT_SYMBOL_GPL(spi_mem_exec_op);
  351. /**
  352. * spi_mem_adjust_op_size() - Adjust the data size of a SPI mem operation to
  353. * match controller limitations
  354. * @slave: the SPI device
  355. * @op: the operation to adjust
  356. *
  357. * Some controllers have FIFO limitations and must split a data transfer
  358. * operation into multiple ones, others require a specific alignment for
  359. * optimized accesses. This function allows SPI mem drivers to split a single
  360. * operation into multiple sub-operations when required.
  361. *
  362. * Return: a negative error code if the controller can't properly adjust @op,
  363. * 0 otherwise. Note that @op->data.nbytes will be updated if @op
  364. * can't be handled in a single step.
  365. */
  366. int spi_mem_adjust_op_size(struct spi_slave *slave, struct spi_mem_op *op)
  367. {
  368. struct udevice *bus = slave->dev->parent;
  369. struct dm_spi_ops *ops = spi_get_ops(bus);
  370. if (ops->mem_ops && ops->mem_ops->adjust_op_size)
  371. return ops->mem_ops->adjust_op_size(slave, op);
  372. if (!ops->mem_ops || !ops->mem_ops->exec_op) {
  373. unsigned int len;
  374. len = sizeof(op->cmd.opcode) + op->addr.nbytes +
  375. op->dummy.nbytes;
  376. if (slave->max_write_size && len > slave->max_write_size)
  377. return -EINVAL;
  378. if (op->data.dir == SPI_MEM_DATA_IN) {
  379. if (slave->max_read_size)
  380. op->data.nbytes = min(op->data.nbytes,
  381. slave->max_read_size);
  382. } else if (slave->max_write_size) {
  383. op->data.nbytes = min(op->data.nbytes,
  384. slave->max_write_size - len);
  385. }
  386. if (!op->data.nbytes)
  387. return -EINVAL;
  388. }
  389. return 0;
  390. }
  391. EXPORT_SYMBOL_GPL(spi_mem_adjust_op_size);
  392. #ifndef __UBOOT__
  393. static inline struct spi_mem_driver *to_spi_mem_drv(struct device_driver *drv)
  394. {
  395. return container_of(drv, struct spi_mem_driver, spidrv.driver);
  396. }
  397. static int spi_mem_probe(struct spi_device *spi)
  398. {
  399. struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
  400. struct spi_mem *mem;
  401. mem = devm_kzalloc(&spi->dev, sizeof(*mem), GFP_KERNEL);
  402. if (!mem)
  403. return -ENOMEM;
  404. mem->spi = spi;
  405. spi_set_drvdata(spi, mem);
  406. return memdrv->probe(mem);
  407. }
  408. static int spi_mem_remove(struct spi_device *spi)
  409. {
  410. struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
  411. struct spi_mem *mem = spi_get_drvdata(spi);
  412. if (memdrv->remove)
  413. return memdrv->remove(mem);
  414. return 0;
  415. }
  416. static void spi_mem_shutdown(struct spi_device *spi)
  417. {
  418. struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
  419. struct spi_mem *mem = spi_get_drvdata(spi);
  420. if (memdrv->shutdown)
  421. memdrv->shutdown(mem);
  422. }
  423. /**
  424. * spi_mem_driver_register_with_owner() - Register a SPI memory driver
  425. * @memdrv: the SPI memory driver to register
  426. * @owner: the owner of this driver
  427. *
  428. * Registers a SPI memory driver.
  429. *
  430. * Return: 0 in case of success, a negative error core otherwise.
  431. */
  432. int spi_mem_driver_register_with_owner(struct spi_mem_driver *memdrv,
  433. struct module *owner)
  434. {
  435. memdrv->spidrv.probe = spi_mem_probe;
  436. memdrv->spidrv.remove = spi_mem_remove;
  437. memdrv->spidrv.shutdown = spi_mem_shutdown;
  438. return __spi_register_driver(owner, &memdrv->spidrv);
  439. }
  440. EXPORT_SYMBOL_GPL(spi_mem_driver_register_with_owner);
  441. /**
  442. * spi_mem_driver_unregister_with_owner() - Unregister a SPI memory driver
  443. * @memdrv: the SPI memory driver to unregister
  444. *
  445. * Unregisters a SPI memory driver.
  446. */
  447. void spi_mem_driver_unregister(struct spi_mem_driver *memdrv)
  448. {
  449. spi_unregister_driver(&memdrv->spidrv);
  450. }
  451. EXPORT_SYMBOL_GPL(spi_mem_driver_unregister);
  452. #endif /* __UBOOT__ */