spinand.h 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435
  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (c) 2016-2017 Micron Technology, Inc.
  4. *
  5. * Authors:
  6. * Peter Pan <peterpandong@micron.com>
  7. */
  8. #ifndef __LINUX_MTD_SPINAND_H
  9. #define __LINUX_MTD_SPINAND_H
  10. #ifndef __UBOOT__
  11. #include <linux/mutex.h>
  12. #include <linux/bitops.h>
  13. #include <linux/device.h>
  14. #include <linux/mtd/mtd.h>
  15. #include <linux/mtd/nand.h>
  16. #include <linux/spi/spi.h>
  17. #include <linux/spi/spi-mem.h>
  18. #else
  19. #include <common.h>
  20. #include <spi.h>
  21. #include <spi-mem.h>
  22. #include <linux/mtd/nand.h>
  23. #endif
  24. /**
  25. * Standard SPI NAND flash operations
  26. */
  27. #define SPINAND_RESET_OP \
  28. SPI_MEM_OP(SPI_MEM_OP_CMD(0xff, 1), \
  29. SPI_MEM_OP_NO_ADDR, \
  30. SPI_MEM_OP_NO_DUMMY, \
  31. SPI_MEM_OP_NO_DATA)
  32. #define SPINAND_WR_EN_DIS_OP(enable) \
  33. SPI_MEM_OP(SPI_MEM_OP_CMD((enable) ? 0x06 : 0x04, 1), \
  34. SPI_MEM_OP_NO_ADDR, \
  35. SPI_MEM_OP_NO_DUMMY, \
  36. SPI_MEM_OP_NO_DATA)
  37. #define SPINAND_READID_OP(ndummy, buf, len) \
  38. SPI_MEM_OP(SPI_MEM_OP_CMD(0x9f, 1), \
  39. SPI_MEM_OP_NO_ADDR, \
  40. SPI_MEM_OP_DUMMY(ndummy, 1), \
  41. SPI_MEM_OP_DATA_IN(len, buf, 1))
  42. #define SPINAND_SET_FEATURE_OP(reg, valptr) \
  43. SPI_MEM_OP(SPI_MEM_OP_CMD(0x1f, 1), \
  44. SPI_MEM_OP_ADDR(1, reg, 1), \
  45. SPI_MEM_OP_NO_DUMMY, \
  46. SPI_MEM_OP_DATA_OUT(1, valptr, 1))
  47. #define SPINAND_GET_FEATURE_OP(reg, valptr) \
  48. SPI_MEM_OP(SPI_MEM_OP_CMD(0x0f, 1), \
  49. SPI_MEM_OP_ADDR(1, reg, 1), \
  50. SPI_MEM_OP_NO_DUMMY, \
  51. SPI_MEM_OP_DATA_IN(1, valptr, 1))
  52. #define SPINAND_BLK_ERASE_OP(addr) \
  53. SPI_MEM_OP(SPI_MEM_OP_CMD(0xd8, 1), \
  54. SPI_MEM_OP_ADDR(3, addr, 1), \
  55. SPI_MEM_OP_NO_DUMMY, \
  56. SPI_MEM_OP_NO_DATA)
  57. #define SPINAND_PAGE_READ_OP(addr) \
  58. SPI_MEM_OP(SPI_MEM_OP_CMD(0x13, 1), \
  59. SPI_MEM_OP_ADDR(3, addr, 1), \
  60. SPI_MEM_OP_NO_DUMMY, \
  61. SPI_MEM_OP_NO_DATA)
  62. #define SPINAND_PAGE_READ_FROM_CACHE_OP(fast, addr, ndummy, buf, len) \
  63. SPI_MEM_OP(SPI_MEM_OP_CMD(fast ? 0x0b : 0x03, 1), \
  64. SPI_MEM_OP_ADDR(2, addr, 1), \
  65. SPI_MEM_OP_DUMMY(ndummy, 1), \
  66. SPI_MEM_OP_DATA_IN(len, buf, 1))
  67. #define SPINAND_PAGE_READ_FROM_CACHE_X2_OP(addr, ndummy, buf, len) \
  68. SPI_MEM_OP(SPI_MEM_OP_CMD(0x3b, 1), \
  69. SPI_MEM_OP_ADDR(2, addr, 1), \
  70. SPI_MEM_OP_DUMMY(ndummy, 1), \
  71. SPI_MEM_OP_DATA_IN(len, buf, 2))
  72. #define SPINAND_PAGE_READ_FROM_CACHE_X4_OP(addr, ndummy, buf, len) \
  73. SPI_MEM_OP(SPI_MEM_OP_CMD(0x6b, 1), \
  74. SPI_MEM_OP_ADDR(2, addr, 1), \
  75. SPI_MEM_OP_DUMMY(ndummy, 1), \
  76. SPI_MEM_OP_DATA_IN(len, buf, 4))
  77. #define SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(addr, ndummy, buf, len) \
  78. SPI_MEM_OP(SPI_MEM_OP_CMD(0xbb, 1), \
  79. SPI_MEM_OP_ADDR(2, addr, 2), \
  80. SPI_MEM_OP_DUMMY(ndummy, 2), \
  81. SPI_MEM_OP_DATA_IN(len, buf, 2))
  82. #define SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(addr, ndummy, buf, len) \
  83. SPI_MEM_OP(SPI_MEM_OP_CMD(0xeb, 1), \
  84. SPI_MEM_OP_ADDR(2, addr, 4), \
  85. SPI_MEM_OP_DUMMY(ndummy, 4), \
  86. SPI_MEM_OP_DATA_IN(len, buf, 4))
  87. #define SPINAND_PROG_EXEC_OP(addr) \
  88. SPI_MEM_OP(SPI_MEM_OP_CMD(0x10, 1), \
  89. SPI_MEM_OP_ADDR(3, addr, 1), \
  90. SPI_MEM_OP_NO_DUMMY, \
  91. SPI_MEM_OP_NO_DATA)
  92. #define SPINAND_PROG_LOAD(reset, addr, buf, len) \
  93. SPI_MEM_OP(SPI_MEM_OP_CMD(reset ? 0x02 : 0x84, 1), \
  94. SPI_MEM_OP_ADDR(2, addr, 1), \
  95. SPI_MEM_OP_NO_DUMMY, \
  96. SPI_MEM_OP_DATA_OUT(len, buf, 1))
  97. #define SPINAND_PROG_LOAD_X4(reset, addr, buf, len) \
  98. SPI_MEM_OP(SPI_MEM_OP_CMD(reset ? 0x32 : 0x34, 1), \
  99. SPI_MEM_OP_ADDR(2, addr, 1), \
  100. SPI_MEM_OP_NO_DUMMY, \
  101. SPI_MEM_OP_DATA_OUT(len, buf, 4))
  102. /**
  103. * Standard SPI NAND flash commands
  104. */
  105. #define SPINAND_CMD_PROG_LOAD_X4 0x32
  106. #define SPINAND_CMD_PROG_LOAD_RDM_DATA_X4 0x34
  107. /* feature register */
  108. #define REG_BLOCK_LOCK 0xa0
  109. #define BL_ALL_UNLOCKED 0x00
  110. /* configuration register */
  111. #define REG_CFG 0xb0
  112. #define CFG_OTP_ENABLE BIT(6)
  113. #define CFG_ECC_ENABLE BIT(4)
  114. #define CFG_QUAD_ENABLE BIT(0)
  115. /* status register */
  116. #define REG_STATUS 0xc0
  117. #define STATUS_BUSY BIT(0)
  118. #define STATUS_ERASE_FAILED BIT(2)
  119. #define STATUS_PROG_FAILED BIT(3)
  120. #define STATUS_ECC_MASK GENMASK(5, 4)
  121. #define STATUS_ECC_NO_BITFLIPS (0 << 4)
  122. #define STATUS_ECC_HAS_BITFLIPS (1 << 4)
  123. #define STATUS_ECC_UNCOR_ERROR (2 << 4)
  124. struct spinand_op;
  125. struct spinand_device;
  126. #define SPINAND_MAX_ID_LEN 4
  127. /**
  128. * struct spinand_id - SPI NAND id structure
  129. * @data: buffer containing the id bytes. Currently 4 bytes large, but can
  130. * be extended if required
  131. * @len: ID length
  132. *
  133. * struct_spinand_id->data contains all bytes returned after a READ_ID command,
  134. * including dummy bytes if the chip does not emit ID bytes right after the
  135. * READ_ID command. The responsibility to extract real ID bytes is left to
  136. * struct_manufacurer_ops->detect().
  137. */
  138. struct spinand_id {
  139. u8 data[SPINAND_MAX_ID_LEN];
  140. int len;
  141. };
  142. /**
  143. * struct manufacurer_ops - SPI NAND manufacturer specific operations
  144. * @detect: detect a SPI NAND device. Every time a SPI NAND device is probed
  145. * the core calls the struct_manufacurer_ops->detect() hook of each
  146. * registered manufacturer until one of them return 1. Note that
  147. * the first thing to check in this hook is that the manufacturer ID
  148. * in struct_spinand_device->id matches the manufacturer whose
  149. * ->detect() hook has been called. Should return 1 if there's a
  150. * match, 0 if the manufacturer ID does not match and a negative
  151. * error code otherwise. When true is returned, the core assumes
  152. * that properties of the NAND chip (spinand->base.memorg and
  153. * spinand->base.eccreq) have been filled
  154. * @init: initialize a SPI NAND device
  155. * @cleanup: cleanup a SPI NAND device
  156. *
  157. * Each SPI NAND manufacturer driver should implement this interface so that
  158. * NAND chips coming from this vendor can be detected and initialized properly.
  159. */
  160. struct spinand_manufacturer_ops {
  161. int (*detect)(struct spinand_device *spinand);
  162. int (*init)(struct spinand_device *spinand);
  163. void (*cleanup)(struct spinand_device *spinand);
  164. };
  165. /**
  166. * struct spinand_manufacturer - SPI NAND manufacturer instance
  167. * @id: manufacturer ID
  168. * @name: manufacturer name
  169. * @ops: manufacturer operations
  170. */
  171. struct spinand_manufacturer {
  172. u8 id;
  173. char *name;
  174. const struct spinand_manufacturer_ops *ops;
  175. };
  176. /* SPI NAND manufacturers */
  177. extern const struct spinand_manufacturer gigadevice_spinand_manufacturer;
  178. extern const struct spinand_manufacturer macronix_spinand_manufacturer;
  179. extern const struct spinand_manufacturer micron_spinand_manufacturer;
  180. extern const struct spinand_manufacturer toshiba_spinand_manufacturer;
  181. extern const struct spinand_manufacturer winbond_spinand_manufacturer;
  182. /**
  183. * struct spinand_op_variants - SPI NAND operation variants
  184. * @ops: the list of variants for a given operation
  185. * @nops: the number of variants
  186. *
  187. * Some operations like read-from-cache/write-to-cache have several variants
  188. * depending on the number of IO lines you use to transfer data or address
  189. * cycles. This structure is a way to describe the different variants supported
  190. * by a chip and let the core pick the best one based on the SPI mem controller
  191. * capabilities.
  192. */
  193. struct spinand_op_variants {
  194. const struct spi_mem_op *ops;
  195. unsigned int nops;
  196. };
  197. #define SPINAND_OP_VARIANTS(name, ...) \
  198. const struct spinand_op_variants name = { \
  199. .ops = (struct spi_mem_op[]) { __VA_ARGS__ }, \
  200. .nops = sizeof((struct spi_mem_op[]){ __VA_ARGS__ }) / \
  201. sizeof(struct spi_mem_op), \
  202. }
  203. /**
  204. * spinand_ecc_info - description of the on-die ECC implemented by a SPI NAND
  205. * chip
  206. * @get_status: get the ECC status. Should return a positive number encoding
  207. * the number of corrected bitflips if correction was possible or
  208. * -EBADMSG if there are uncorrectable errors. I can also return
  209. * other negative error codes if the error is not caused by
  210. * uncorrectable bitflips
  211. * @ooblayout: the OOB layout used by the on-die ECC implementation
  212. */
  213. struct spinand_ecc_info {
  214. int (*get_status)(struct spinand_device *spinand, u8 status);
  215. const struct mtd_ooblayout_ops *ooblayout;
  216. };
  217. #define SPINAND_HAS_QE_BIT BIT(0)
  218. #define SPINAND_HAS_CR_FEAT_BIT BIT(1)
  219. /**
  220. * struct spinand_info - Structure used to describe SPI NAND chips
  221. * @model: model name
  222. * @devid: device ID
  223. * @flags: OR-ing of the SPINAND_XXX flags
  224. * @memorg: memory organization
  225. * @eccreq: ECC requirements
  226. * @eccinfo: on-die ECC info
  227. * @op_variants: operations variants
  228. * @op_variants.read_cache: variants of the read-cache operation
  229. * @op_variants.write_cache: variants of the write-cache operation
  230. * @op_variants.update_cache: variants of the update-cache operation
  231. * @select_target: function used to select a target/die. Required only for
  232. * multi-die chips
  233. *
  234. * Each SPI NAND manufacturer driver should have a spinand_info table
  235. * describing all the chips supported by the driver.
  236. */
  237. struct spinand_info {
  238. const char *model;
  239. u8 devid;
  240. u32 flags;
  241. struct nand_memory_organization memorg;
  242. struct nand_ecc_req eccreq;
  243. struct spinand_ecc_info eccinfo;
  244. struct {
  245. const struct spinand_op_variants *read_cache;
  246. const struct spinand_op_variants *write_cache;
  247. const struct spinand_op_variants *update_cache;
  248. } op_variants;
  249. int (*select_target)(struct spinand_device *spinand,
  250. unsigned int target);
  251. };
  252. #define SPINAND_INFO_OP_VARIANTS(__read, __write, __update) \
  253. { \
  254. .read_cache = __read, \
  255. .write_cache = __write, \
  256. .update_cache = __update, \
  257. }
  258. #define SPINAND_ECCINFO(__ooblayout, __get_status) \
  259. .eccinfo = { \
  260. .ooblayout = __ooblayout, \
  261. .get_status = __get_status, \
  262. }
  263. #define SPINAND_SELECT_TARGET(__func) \
  264. .select_target = __func,
  265. #define SPINAND_INFO(__model, __id, __memorg, __eccreq, __op_variants, \
  266. __flags, ...) \
  267. { \
  268. .model = __model, \
  269. .devid = __id, \
  270. .memorg = __memorg, \
  271. .eccreq = __eccreq, \
  272. .op_variants = __op_variants, \
  273. .flags = __flags, \
  274. __VA_ARGS__ \
  275. }
  276. /**
  277. * struct spinand_device - SPI NAND device instance
  278. * @base: NAND device instance
  279. * @slave: pointer to the SPI slave object
  280. * @lock: lock used to serialize accesses to the NAND
  281. * @id: NAND ID as returned by READ_ID
  282. * @flags: NAND flags
  283. * @op_templates: various SPI mem op templates
  284. * @op_templates.read_cache: read cache op template
  285. * @op_templates.write_cache: write cache op template
  286. * @op_templates.update_cache: update cache op template
  287. * @select_target: select a specific target/die. Usually called before sending
  288. * a command addressing a page or an eraseblock embedded in
  289. * this die. Only required if your chip exposes several dies
  290. * @cur_target: currently selected target/die
  291. * @eccinfo: on-die ECC information
  292. * @cfg_cache: config register cache. One entry per die
  293. * @databuf: bounce buffer for data
  294. * @oobbuf: bounce buffer for OOB data
  295. * @scratchbuf: buffer used for everything but page accesses. This is needed
  296. * because the spi-mem interface explicitly requests that buffers
  297. * passed in spi_mem_op be DMA-able, so we can't based the bufs on
  298. * the stack
  299. * @manufacturer: SPI NAND manufacturer information
  300. * @priv: manufacturer private data
  301. */
  302. struct spinand_device {
  303. struct nand_device base;
  304. #ifndef __UBOOT__
  305. struct spi_mem *spimem;
  306. struct mutex lock;
  307. #else
  308. struct spi_slave *slave;
  309. #endif
  310. struct spinand_id id;
  311. u32 flags;
  312. struct {
  313. const struct spi_mem_op *read_cache;
  314. const struct spi_mem_op *write_cache;
  315. const struct spi_mem_op *update_cache;
  316. } op_templates;
  317. int (*select_target)(struct spinand_device *spinand,
  318. unsigned int target);
  319. unsigned int cur_target;
  320. struct spinand_ecc_info eccinfo;
  321. u8 *cfg_cache;
  322. u8 *databuf;
  323. u8 *oobbuf;
  324. u8 *scratchbuf;
  325. const struct spinand_manufacturer *manufacturer;
  326. void *priv;
  327. };
  328. /**
  329. * mtd_to_spinand() - Get the SPI NAND device attached to an MTD instance
  330. * @mtd: MTD instance
  331. *
  332. * Return: the SPI NAND device attached to @mtd.
  333. */
  334. static inline struct spinand_device *mtd_to_spinand(struct mtd_info *mtd)
  335. {
  336. return container_of(mtd_to_nanddev(mtd), struct spinand_device, base);
  337. }
  338. /**
  339. * spinand_to_mtd() - Get the MTD device embedded in a SPI NAND device
  340. * @spinand: SPI NAND device
  341. *
  342. * Return: the MTD device embedded in @spinand.
  343. */
  344. static inline struct mtd_info *spinand_to_mtd(struct spinand_device *spinand)
  345. {
  346. return nanddev_to_mtd(&spinand->base);
  347. }
  348. /**
  349. * nand_to_spinand() - Get the SPI NAND device embedding an NAND object
  350. * @nand: NAND object
  351. *
  352. * Return: the SPI NAND device embedding @nand.
  353. */
  354. static inline struct spinand_device *nand_to_spinand(struct nand_device *nand)
  355. {
  356. return container_of(nand, struct spinand_device, base);
  357. }
  358. /**
  359. * spinand_to_nand() - Get the NAND device embedded in a SPI NAND object
  360. * @spinand: SPI NAND device
  361. *
  362. * Return: the NAND device embedded in @spinand.
  363. */
  364. static inline struct nand_device *
  365. spinand_to_nand(struct spinand_device *spinand)
  366. {
  367. return &spinand->base;
  368. }
  369. /**
  370. * spinand_set_of_node - Attach a DT node to a SPI NAND device
  371. * @spinand: SPI NAND device
  372. * @np: DT node
  373. *
  374. * Attach a DT node to a SPI NAND device.
  375. */
  376. static inline void spinand_set_of_node(struct spinand_device *spinand,
  377. const struct device_node *np)
  378. {
  379. nanddev_set_of_node(&spinand->base, np);
  380. }
  381. int spinand_match_and_init(struct spinand_device *dev,
  382. const struct spinand_info *table,
  383. unsigned int table_size, u8 devid);
  384. int spinand_upd_cfg(struct spinand_device *spinand, u8 mask, u8 val);
  385. int spinand_select_target(struct spinand_device *spinand, unsigned int target);
  386. #endif /* __LINUX_MTD_SPINAND_H */