pinctrl-snapdragon.c 3.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * TLMM driver for Qualcomm APQ8016, APQ8096
  4. *
  5. * (C) Copyright 2018 Ramon Fried <ramon.fried@gmail.com>
  6. *
  7. */
  8. #include <common.h>
  9. #include <dm.h>
  10. #include <errno.h>
  11. #include <asm/io.h>
  12. #include <dm/pinctrl.h>
  13. #include <linux/bitops.h>
  14. #include "pinctrl-snapdragon.h"
  15. struct msm_pinctrl_priv {
  16. phys_addr_t base;
  17. struct msm_pinctrl_data *data;
  18. };
  19. #define GPIO_CONFIG_OFFSET(x) ((x) * 0x1000)
  20. #define TLMM_GPIO_PULL_MASK GENMASK(1, 0)
  21. #define TLMM_FUNC_SEL_MASK GENMASK(5, 2)
  22. #define TLMM_DRV_STRENGTH_MASK GENMASK(8, 6)
  23. #define TLMM_GPIO_DISABLE BIT(9)
  24. static const struct pinconf_param msm_conf_params[] = {
  25. { "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 3 },
  26. { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 },
  27. };
  28. static int msm_get_functions_count(struct udevice *dev)
  29. {
  30. struct msm_pinctrl_priv *priv = dev_get_priv(dev);
  31. return priv->data->functions_count;
  32. }
  33. static int msm_get_pins_count(struct udevice *dev)
  34. {
  35. struct msm_pinctrl_priv *priv = dev_get_priv(dev);
  36. return priv->data->pin_count;
  37. }
  38. static const char *msm_get_function_name(struct udevice *dev,
  39. unsigned int selector)
  40. {
  41. struct msm_pinctrl_priv *priv = dev_get_priv(dev);
  42. return priv->data->get_function_name(dev, selector);
  43. }
  44. static int msm_pinctrl_probe(struct udevice *dev)
  45. {
  46. struct msm_pinctrl_priv *priv = dev_get_priv(dev);
  47. priv->base = devfdt_get_addr(dev);
  48. priv->data = (struct msm_pinctrl_data *)dev->driver_data;
  49. return priv->base == FDT_ADDR_T_NONE ? -EINVAL : 0;
  50. }
  51. static const char *msm_get_pin_name(struct udevice *dev, unsigned int selector)
  52. {
  53. struct msm_pinctrl_priv *priv = dev_get_priv(dev);
  54. return priv->data->get_pin_name(dev, selector);
  55. }
  56. static int msm_pinmux_set(struct udevice *dev, unsigned int pin_selector,
  57. unsigned int func_selector)
  58. {
  59. struct msm_pinctrl_priv *priv = dev_get_priv(dev);
  60. clrsetbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector),
  61. TLMM_FUNC_SEL_MASK | TLMM_GPIO_DISABLE,
  62. priv->data->get_function_mux(func_selector) << 2);
  63. return 0;
  64. }
  65. static int msm_pinconf_set(struct udevice *dev, unsigned int pin_selector,
  66. unsigned int param, unsigned int argument)
  67. {
  68. struct msm_pinctrl_priv *priv = dev_get_priv(dev);
  69. switch (param) {
  70. case PIN_CONFIG_DRIVE_STRENGTH:
  71. clrsetbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector),
  72. TLMM_DRV_STRENGTH_MASK, argument << 6);
  73. break;
  74. case PIN_CONFIG_BIAS_DISABLE:
  75. clrbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector),
  76. TLMM_GPIO_PULL_MASK);
  77. break;
  78. default:
  79. return 0;
  80. }
  81. return 0;
  82. }
  83. static struct pinctrl_ops msm_pinctrl_ops = {
  84. .get_pins_count = msm_get_pins_count,
  85. .get_pin_name = msm_get_pin_name,
  86. .set_state = pinctrl_generic_set_state,
  87. .pinmux_set = msm_pinmux_set,
  88. .pinconf_num_params = ARRAY_SIZE(msm_conf_params),
  89. .pinconf_params = msm_conf_params,
  90. .pinconf_set = msm_pinconf_set,
  91. .get_functions_count = msm_get_functions_count,
  92. .get_function_name = msm_get_function_name,
  93. };
  94. static const struct udevice_id msm_pinctrl_ids[] = {
  95. { .compatible = "qcom,tlmm-apq8016", .data = (ulong)&apq8016_data },
  96. { .compatible = "qcom,tlmm-apq8096", .data = (ulong)&apq8096_data },
  97. { }
  98. };
  99. U_BOOT_DRIVER(pinctrl_snapdraon) = {
  100. .name = "pinctrl_msm",
  101. .id = UCLASS_PINCTRL,
  102. .of_match = msm_pinctrl_ids,
  103. .priv_auto_alloc_size = sizeof(struct msm_pinctrl_priv),
  104. .ops = &msm_pinctrl_ops,
  105. .probe = msm_pinctrl_probe,
  106. };