stm32mp1.c 26 KB

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  1. // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
  2. /*
  3. * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
  4. */
  5. #include <common.h>
  6. #include <adc.h>
  7. #include <bootm.h>
  8. #include <clk.h>
  9. #include <config.h>
  10. #include <dfu.h>
  11. #include <dm.h>
  12. #include <env.h>
  13. #include <env_internal.h>
  14. #include <g_dnl.h>
  15. #include <generic-phy.h>
  16. #include <hang.h>
  17. #include <i2c.h>
  18. #include <init.h>
  19. #include <led.h>
  20. #include <malloc.h>
  21. #include <memalign.h>
  22. #include <misc.h>
  23. #include <mtd.h>
  24. #include <mtd_node.h>
  25. #include <netdev.h>
  26. #include <phy.h>
  27. #include <remoteproc.h>
  28. #include <reset.h>
  29. #include <syscon.h>
  30. #include <usb.h>
  31. #include <watchdog.h>
  32. #include <asm/io.h>
  33. #include <asm/gpio.h>
  34. #include <asm/arch/stm32.h>
  35. #include <asm/arch/sys_proto.h>
  36. #include <jffs2/load_kernel.h>
  37. #include <linux/err.h>
  38. #include <power/regulator.h>
  39. #include <usb/dwc2_udc.h>
  40. /* SYSCFG registers */
  41. #define SYSCFG_BOOTR 0x00
  42. #define SYSCFG_PMCSETR 0x04
  43. #define SYSCFG_IOCTRLSETR 0x18
  44. #define SYSCFG_ICNR 0x1C
  45. #define SYSCFG_CMPCR 0x20
  46. #define SYSCFG_CMPENSETR 0x24
  47. #define SYSCFG_PMCCLRR 0x44
  48. #define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
  49. #define SYSCFG_BOOTR_BOOTPD_SHIFT 4
  50. #define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
  51. #define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
  52. #define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
  53. #define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
  54. #define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
  55. #define SYSCFG_CMPCR_SW_CTRL BIT(1)
  56. #define SYSCFG_CMPCR_READY BIT(8)
  57. #define SYSCFG_CMPENSETR_MPU_EN BIT(0)
  58. #define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
  59. #define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
  60. #define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
  61. #define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
  62. #define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0
  63. #define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21)
  64. #define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23)
  65. /*
  66. * Get a global data pointer
  67. */
  68. DECLARE_GLOBAL_DATA_PTR;
  69. #define USB_LOW_THRESHOLD_UV 200000
  70. #define USB_WARNING_LOW_THRESHOLD_UV 660000
  71. #define USB_START_LOW_THRESHOLD_UV 1230000
  72. #define USB_START_HIGH_THRESHOLD_UV 2150000
  73. int checkboard(void)
  74. {
  75. int ret;
  76. char *mode;
  77. u32 otp;
  78. struct udevice *dev;
  79. const char *fdt_compat;
  80. int fdt_compat_len;
  81. if (IS_ENABLED(CONFIG_STM32MP1_OPTEE))
  82. mode = "trusted with OP-TEE";
  83. else if (IS_ENABLED(TFABOOT))
  84. mode = "trusted";
  85. else
  86. mode = "basic";
  87. printf("Board: stm32mp1 in %s mode", mode);
  88. fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
  89. &fdt_compat_len);
  90. if (fdt_compat && fdt_compat_len)
  91. printf(" (%s)", fdt_compat);
  92. puts("\n");
  93. /* display the STMicroelectronics board identification */
  94. if (CONFIG_IS_ENABLED(CMD_STBOARD)) {
  95. ret = uclass_get_device_by_driver(UCLASS_MISC,
  96. DM_GET_DRIVER(stm32mp_bsec),
  97. &dev);
  98. if (!ret)
  99. ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
  100. &otp, sizeof(otp));
  101. if (ret > 0 && otp)
  102. printf("Board: MB%04x Var%d.%d Rev.%c-%02d\n",
  103. otp >> 16,
  104. (otp >> 12) & 0xF,
  105. (otp >> 4) & 0xF,
  106. ((otp >> 8) & 0xF) - 1 + 'A',
  107. otp & 0xF);
  108. }
  109. return 0;
  110. }
  111. static void board_key_check(void)
  112. {
  113. #if defined(CONFIG_FASTBOOT) || defined(CONFIG_CMD_STM32PROG)
  114. ofnode node;
  115. struct gpio_desc gpio;
  116. enum forced_boot_mode boot_mode = BOOT_NORMAL;
  117. node = ofnode_path("/config");
  118. if (!ofnode_valid(node)) {
  119. debug("%s: no /config node?\n", __func__);
  120. return;
  121. }
  122. #ifdef CONFIG_FASTBOOT
  123. if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
  124. &gpio, GPIOD_IS_IN)) {
  125. debug("%s: could not find a /config/st,fastboot-gpios\n",
  126. __func__);
  127. } else {
  128. if (dm_gpio_get_value(&gpio)) {
  129. puts("Fastboot key pressed, ");
  130. boot_mode = BOOT_FASTBOOT;
  131. }
  132. dm_gpio_free(NULL, &gpio);
  133. }
  134. #endif
  135. #ifdef CONFIG_CMD_STM32PROG
  136. if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
  137. &gpio, GPIOD_IS_IN)) {
  138. debug("%s: could not find a /config/st,stm32prog-gpios\n",
  139. __func__);
  140. } else {
  141. if (dm_gpio_get_value(&gpio)) {
  142. puts("STM32Programmer key pressed, ");
  143. boot_mode = BOOT_STM32PROG;
  144. }
  145. dm_gpio_free(NULL, &gpio);
  146. }
  147. #endif
  148. if (boot_mode != BOOT_NORMAL) {
  149. puts("entering download mode...\n");
  150. clrsetbits_le32(TAMP_BOOT_CONTEXT,
  151. TAMP_BOOT_FORCED_MASK,
  152. boot_mode);
  153. }
  154. #endif
  155. }
  156. #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
  157. /* STMicroelectronics STUSB1600 Type-C controller */
  158. #define STUSB1600_CC_CONNECTION_STATUS 0x0E
  159. /* STUSB1600_CC_CONNECTION_STATUS bitfields */
  160. #define STUSB1600_CC_ATTACH BIT(0)
  161. static int stusb1600_init(struct udevice **dev_stusb1600)
  162. {
  163. ofnode node;
  164. struct udevice *dev, *bus;
  165. int ret;
  166. u32 chip_addr;
  167. *dev_stusb1600 = NULL;
  168. /* if node stusb1600 is present, means DK1 or DK2 board */
  169. node = ofnode_by_compatible(ofnode_null(), "st,stusb1600");
  170. if (!ofnode_valid(node))
  171. return -ENODEV;
  172. ret = ofnode_read_u32(node, "reg", &chip_addr);
  173. if (ret)
  174. return -EINVAL;
  175. ret = uclass_get_device_by_ofnode(UCLASS_I2C, ofnode_get_parent(node),
  176. &bus);
  177. if (ret) {
  178. printf("bus for stusb1600 not found\n");
  179. return -ENODEV;
  180. }
  181. ret = dm_i2c_probe(bus, chip_addr, 0, &dev);
  182. if (!ret)
  183. *dev_stusb1600 = dev;
  184. return ret;
  185. }
  186. static int stusb1600_cable_connected(struct udevice *dev)
  187. {
  188. u8 status;
  189. if (dm_i2c_read(dev, STUSB1600_CC_CONNECTION_STATUS, &status, 1))
  190. return 0;
  191. return status & STUSB1600_CC_ATTACH;
  192. }
  193. #include <usb/dwc2_udc.h>
  194. int g_dnl_board_usb_cable_connected(void)
  195. {
  196. struct udevice *stusb1600;
  197. struct udevice *dwc2_udc_otg;
  198. int ret;
  199. if (!stusb1600_init(&stusb1600))
  200. return stusb1600_cable_connected(stusb1600);
  201. ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
  202. DM_GET_DRIVER(dwc2_udc_otg),
  203. &dwc2_udc_otg);
  204. if (!ret)
  205. debug("dwc2_udc_otg init failed\n");
  206. return dwc2_udc_B_session_valid(dwc2_udc_otg);
  207. }
  208. #define STM32MP1_G_DNL_DFU_PRODUCT_NUM 0xdf11
  209. #define STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM 0x0afb
  210. int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
  211. {
  212. if (!strcmp(name, "usb_dnl_dfu"))
  213. put_unaligned(STM32MP1_G_DNL_DFU_PRODUCT_NUM, &dev->idProduct);
  214. else if (!strcmp(name, "usb_dnl_fastboot"))
  215. put_unaligned(STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM,
  216. &dev->idProduct);
  217. else
  218. put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM, &dev->idProduct);
  219. return 0;
  220. }
  221. #endif /* CONFIG_USB_GADGET */
  222. #ifdef CONFIG_LED
  223. static int get_led(struct udevice **dev, char *led_string)
  224. {
  225. char *led_name;
  226. int ret;
  227. led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
  228. if (!led_name) {
  229. pr_debug("%s: could not find %s config string\n",
  230. __func__, led_string);
  231. return -ENOENT;
  232. }
  233. ret = led_get_by_label(led_name, dev);
  234. if (ret) {
  235. debug("%s: get=%d\n", __func__, ret);
  236. return ret;
  237. }
  238. return 0;
  239. }
  240. static int setup_led(enum led_state_t cmd)
  241. {
  242. struct udevice *dev;
  243. int ret;
  244. ret = get_led(&dev, "u-boot,boot-led");
  245. if (ret)
  246. return ret;
  247. ret = led_set_state(dev, cmd);
  248. return ret;
  249. }
  250. #endif
  251. static void __maybe_unused led_error_blink(u32 nb_blink)
  252. {
  253. #ifdef CONFIG_LED
  254. int ret;
  255. struct udevice *led;
  256. u32 i;
  257. #endif
  258. if (!nb_blink)
  259. return;
  260. #ifdef CONFIG_LED
  261. ret = get_led(&led, "u-boot,error-led");
  262. if (!ret) {
  263. /* make u-boot,error-led blinking */
  264. /* if U32_MAX and 125ms interval, for 17.02 years */
  265. for (i = 0; i < 2 * nb_blink; i++) {
  266. led_set_state(led, LEDST_TOGGLE);
  267. mdelay(125);
  268. WATCHDOG_RESET();
  269. }
  270. }
  271. #endif
  272. /* infinite: the boot process must be stopped */
  273. if (nb_blink == U32_MAX)
  274. hang();
  275. }
  276. #ifdef CONFIG_ADC
  277. static int board_check_usb_power(void)
  278. {
  279. struct ofnode_phandle_args adc_args;
  280. struct udevice *adc;
  281. ofnode node;
  282. unsigned int raw;
  283. int max_uV = 0;
  284. int min_uV = USB_START_HIGH_THRESHOLD_UV;
  285. int ret, uV, adc_count;
  286. u32 nb_blink;
  287. u8 i;
  288. node = ofnode_path("/config");
  289. if (!ofnode_valid(node)) {
  290. debug("%s: no /config node?\n", __func__);
  291. return -ENOENT;
  292. }
  293. /*
  294. * Retrieve the ADC channels devices and get measurement
  295. * for each of them
  296. */
  297. adc_count = ofnode_count_phandle_with_args(node, "st,adc_usb_pd",
  298. "#io-channel-cells");
  299. if (adc_count < 0) {
  300. if (adc_count == -ENOENT)
  301. return 0;
  302. pr_err("%s: can't find adc channel (%d)\n", __func__,
  303. adc_count);
  304. return adc_count;
  305. }
  306. for (i = 0; i < adc_count; i++) {
  307. if (ofnode_parse_phandle_with_args(node, "st,adc_usb_pd",
  308. "#io-channel-cells", 0, i,
  309. &adc_args)) {
  310. pr_debug("%s: can't find /config/st,adc_usb_pd\n",
  311. __func__);
  312. return 0;
  313. }
  314. ret = uclass_get_device_by_ofnode(UCLASS_ADC, adc_args.node,
  315. &adc);
  316. if (ret) {
  317. pr_err("%s: Can't get adc device(%d)\n", __func__,
  318. ret);
  319. return ret;
  320. }
  321. ret = adc_channel_single_shot(adc->name, adc_args.args[0],
  322. &raw);
  323. if (ret) {
  324. pr_err("%s: single shot failed for %s[%d]!\n",
  325. __func__, adc->name, adc_args.args[0]);
  326. return ret;
  327. }
  328. /* Convert to uV */
  329. if (!adc_raw_to_uV(adc, raw, &uV)) {
  330. if (uV > max_uV)
  331. max_uV = uV;
  332. if (uV < min_uV)
  333. min_uV = uV;
  334. pr_debug("%s: %s[%02d] = %u, %d uV\n", __func__,
  335. adc->name, adc_args.args[0], raw, uV);
  336. } else {
  337. pr_err("%s: Can't get uV value for %s[%d]\n",
  338. __func__, adc->name, adc_args.args[0]);
  339. }
  340. }
  341. /*
  342. * If highest value is inside 1.23 Volts and 2.10 Volts, that means
  343. * board is plugged on an USB-C 3A power supply and boot process can
  344. * continue.
  345. */
  346. if (max_uV > USB_START_LOW_THRESHOLD_UV &&
  347. max_uV <= USB_START_HIGH_THRESHOLD_UV &&
  348. min_uV <= USB_LOW_THRESHOLD_UV)
  349. return 0;
  350. pr_err("****************************************************\n");
  351. /*
  352. * If highest and lowest value are either both below
  353. * USB_LOW_THRESHOLD_UV or both above USB_LOW_THRESHOLD_UV, that
  354. * means USB TYPE-C is in unattached mode, this is an issue, make
  355. * u-boot,error-led blinking and stop boot process.
  356. */
  357. if ((max_uV > USB_LOW_THRESHOLD_UV &&
  358. min_uV > USB_LOW_THRESHOLD_UV) ||
  359. (max_uV <= USB_LOW_THRESHOLD_UV &&
  360. min_uV <= USB_LOW_THRESHOLD_UV)) {
  361. pr_err("* ERROR USB TYPE-C connection in unattached mode *\n");
  362. pr_err("* Check that USB TYPE-C cable is correctly plugged *\n");
  363. /* with 125ms interval, led will blink for 17.02 years ....*/
  364. nb_blink = U32_MAX;
  365. }
  366. if (max_uV > USB_LOW_THRESHOLD_UV &&
  367. max_uV <= USB_WARNING_LOW_THRESHOLD_UV &&
  368. min_uV <= USB_LOW_THRESHOLD_UV) {
  369. pr_err("* WARNING 500mA power supply detected *\n");
  370. nb_blink = 2;
  371. }
  372. if (max_uV > USB_WARNING_LOW_THRESHOLD_UV &&
  373. max_uV <= USB_START_LOW_THRESHOLD_UV &&
  374. min_uV <= USB_LOW_THRESHOLD_UV) {
  375. pr_err("* WARNING 1.5mA power supply detected *\n");
  376. nb_blink = 3;
  377. }
  378. /*
  379. * If highest value is above 2.15 Volts that means that the USB TypeC
  380. * supplies more than 3 Amp, this is not compliant with TypeC specification
  381. */
  382. if (max_uV > USB_START_HIGH_THRESHOLD_UV) {
  383. pr_err("* USB TYPE-C charger not compliant with *\n");
  384. pr_err("* specification *\n");
  385. pr_err("****************************************************\n\n");
  386. /* with 125ms interval, led will blink for 17.02 years ....*/
  387. nb_blink = U32_MAX;
  388. } else {
  389. pr_err("* Current too low, use a 3A power supply! *\n");
  390. pr_err("****************************************************\n\n");
  391. }
  392. led_error_blink(nb_blink);
  393. return 0;
  394. }
  395. #endif /* CONFIG_ADC */
  396. static void sysconf_init(void)
  397. {
  398. #ifndef CONFIG_TFABOOT
  399. u8 *syscfg;
  400. #ifdef CONFIG_DM_REGULATOR
  401. struct udevice *pwr_dev;
  402. struct udevice *pwr_reg;
  403. struct udevice *dev;
  404. int ret;
  405. u32 otp = 0;
  406. #endif
  407. u32 bootr;
  408. syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
  409. /* interconnect update : select master using the port 1 */
  410. /* LTDC = AXI_M9 */
  411. /* GPU = AXI_M8 */
  412. /* today information is hardcoded in U-Boot */
  413. writel(BIT(9), syscfg + SYSCFG_ICNR);
  414. /* disable Pull-Down for boot pin connected to VDD */
  415. bootr = readl(syscfg + SYSCFG_BOOTR);
  416. bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
  417. bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
  418. writel(bootr, syscfg + SYSCFG_BOOTR);
  419. #ifdef CONFIG_DM_REGULATOR
  420. /* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
  421. * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
  422. * The customer will have to disable this for low frequencies
  423. * or if AFMUX is selected but the function not used, typically for
  424. * TRACE. Otherwise, impact on power consumption.
  425. *
  426. * WARNING:
  427. * enabling High Speed mode while VDD>2.7V
  428. * with the OTP product_below_2v5 (OTP 18, BIT 13)
  429. * erroneously set to 1 can damage the IC!
  430. * => U-Boot set the register only if VDD < 2.7V (in DT)
  431. * but this value need to be consistent with board design
  432. */
  433. ret = uclass_get_device_by_driver(UCLASS_PMIC,
  434. DM_GET_DRIVER(stm32mp_pwr_pmic),
  435. &pwr_dev);
  436. if (!ret) {
  437. ret = uclass_get_device_by_driver(UCLASS_MISC,
  438. DM_GET_DRIVER(stm32mp_bsec),
  439. &dev);
  440. if (ret) {
  441. pr_err("Can't find stm32mp_bsec driver\n");
  442. return;
  443. }
  444. ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
  445. if (ret > 0)
  446. otp = otp & BIT(13);
  447. /* get VDD = vdd-supply */
  448. ret = device_get_supply_regulator(pwr_dev, "vdd-supply",
  449. &pwr_reg);
  450. /* check if VDD is Low Voltage */
  451. if (!ret) {
  452. if (regulator_get_value(pwr_reg) < 2700000) {
  453. writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
  454. SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
  455. SYSCFG_IOCTRLSETR_HSLVEN_ETH |
  456. SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
  457. SYSCFG_IOCTRLSETR_HSLVEN_SPI,
  458. syscfg + SYSCFG_IOCTRLSETR);
  459. if (!otp)
  460. pr_err("product_below_2v5=0: HSLVEN protected by HW\n");
  461. } else {
  462. if (otp)
  463. pr_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
  464. }
  465. } else {
  466. debug("VDD unknown");
  467. }
  468. }
  469. #endif
  470. /* activate automatic I/O compensation
  471. * warning: need to ensure CSI enabled and ready in clock driver
  472. */
  473. writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
  474. while (!(readl(syscfg + SYSCFG_CMPCR) & SYSCFG_CMPCR_READY))
  475. ;
  476. clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
  477. #endif
  478. }
  479. #ifdef CONFIG_DM_REGULATOR
  480. /* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */
  481. static int dk2_i2c1_fix(void)
  482. {
  483. ofnode node;
  484. struct gpio_desc hdmi, audio;
  485. int ret = 0;
  486. node = ofnode_path("/soc/i2c@40012000/hdmi-transmitter@39");
  487. if (!ofnode_valid(node)) {
  488. pr_debug("%s: no hdmi-transmitter@39 ?\n", __func__);
  489. return -ENOENT;
  490. }
  491. if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
  492. &hdmi, GPIOD_IS_OUT)) {
  493. pr_debug("%s: could not find reset-gpios\n",
  494. __func__);
  495. return -ENOENT;
  496. }
  497. node = ofnode_path("/soc/i2c@40012000/cs42l51@4a");
  498. if (!ofnode_valid(node)) {
  499. pr_debug("%s: no cs42l51@4a ?\n", __func__);
  500. return -ENOENT;
  501. }
  502. if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
  503. &audio, GPIOD_IS_OUT)) {
  504. pr_debug("%s: could not find reset-gpios\n",
  505. __func__);
  506. return -ENOENT;
  507. }
  508. /* before power up, insure that HDMI and AUDIO IC is under reset */
  509. ret = dm_gpio_set_value(&hdmi, 1);
  510. if (ret) {
  511. pr_err("%s: can't set_value for hdmi_nrst gpio", __func__);
  512. goto error;
  513. }
  514. ret = dm_gpio_set_value(&audio, 1);
  515. if (ret) {
  516. pr_err("%s: can't set_value for audio_nrst gpio", __func__);
  517. goto error;
  518. }
  519. /* power-up audio IC */
  520. regulator_autoset_by_name("v1v8_audio", NULL);
  521. /* power-up HDMI IC */
  522. regulator_autoset_by_name("v1v2_hdmi", NULL);
  523. regulator_autoset_by_name("v3v3_hdmi", NULL);
  524. error:
  525. return ret;
  526. }
  527. static bool board_is_dk2(void)
  528. {
  529. if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
  530. of_machine_is_compatible("st,stm32mp157c-dk2"))
  531. return true;
  532. return false;
  533. }
  534. #endif
  535. /* board dependent setup after realloc */
  536. int board_init(void)
  537. {
  538. struct udevice *dev;
  539. /* address of boot parameters */
  540. gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100;
  541. /* probe all PINCTRL for hog */
  542. for (uclass_first_device(UCLASS_PINCTRL, &dev);
  543. dev;
  544. uclass_next_device(&dev)) {
  545. pr_debug("probe pincontrol = %s\n", dev->name);
  546. }
  547. board_key_check();
  548. #ifdef CONFIG_DM_REGULATOR
  549. if (board_is_dk2())
  550. dk2_i2c1_fix();
  551. regulators_enable_boot_on(_DEBUG);
  552. #endif
  553. sysconf_init();
  554. if (CONFIG_IS_ENABLED(LED))
  555. led_default_state();
  556. return 0;
  557. }
  558. int board_late_init(void)
  559. {
  560. char *boot_device;
  561. #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
  562. const void *fdt_compat;
  563. int fdt_compat_len;
  564. int ret;
  565. u32 otp;
  566. struct udevice *dev;
  567. char buf[10];
  568. fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
  569. &fdt_compat_len);
  570. if (fdt_compat && fdt_compat_len) {
  571. if (strncmp(fdt_compat, "st,", 3) != 0)
  572. env_set("board_name", fdt_compat);
  573. else
  574. env_set("board_name", fdt_compat + 3);
  575. }
  576. ret = uclass_get_device_by_driver(UCLASS_MISC,
  577. DM_GET_DRIVER(stm32mp_bsec),
  578. &dev);
  579. if (!ret)
  580. ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
  581. &otp, sizeof(otp));
  582. if (!ret && otp) {
  583. snprintf(buf, sizeof(buf), "0x%04x", otp >> 16);
  584. env_set("board_id", buf);
  585. snprintf(buf, sizeof(buf), "0x%04x",
  586. ((otp >> 8) & 0xF) - 1 + 0xA);
  587. env_set("board_rev", buf);
  588. }
  589. #endif
  590. #ifdef CONFIG_ADC
  591. /* for DK1/DK2 boards */
  592. board_check_usb_power();
  593. #endif /* CONFIG_ADC */
  594. /* Check the boot-source to disable bootdelay */
  595. boot_device = env_get("boot_device");
  596. if (!strcmp(boot_device, "serial") || !strcmp(boot_device, "usb"))
  597. env_set("bootdelay", "0");
  598. return 0;
  599. }
  600. void board_quiesce_devices(void)
  601. {
  602. #ifdef CONFIG_LED
  603. setup_led(LEDST_OFF);
  604. #endif
  605. }
  606. /* eth init function : weak called in eqos driver */
  607. int board_interface_eth_init(struct udevice *dev,
  608. phy_interface_t interface_type)
  609. {
  610. u8 *syscfg;
  611. u32 value;
  612. bool eth_clk_sel_reg = false;
  613. bool eth_ref_clk_sel_reg = false;
  614. /* Gigabit Ethernet 125MHz clock selection. */
  615. eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
  616. /* Ethernet 50Mhz RMII clock selection */
  617. eth_ref_clk_sel_reg =
  618. dev_read_bool(dev, "st,eth_ref_clk_sel");
  619. syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
  620. if (!syscfg)
  621. return -ENODEV;
  622. switch (interface_type) {
  623. case PHY_INTERFACE_MODE_MII:
  624. value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
  625. SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
  626. debug("%s: PHY_INTERFACE_MODE_MII\n", __func__);
  627. break;
  628. case PHY_INTERFACE_MODE_GMII:
  629. if (eth_clk_sel_reg)
  630. value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
  631. SYSCFG_PMCSETR_ETH_CLK_SEL;
  632. else
  633. value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
  634. debug("%s: PHY_INTERFACE_MODE_GMII\n", __func__);
  635. break;
  636. case PHY_INTERFACE_MODE_RMII:
  637. if (eth_ref_clk_sel_reg)
  638. value = SYSCFG_PMCSETR_ETH_SEL_RMII |
  639. SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
  640. else
  641. value = SYSCFG_PMCSETR_ETH_SEL_RMII;
  642. debug("%s: PHY_INTERFACE_MODE_RMII\n", __func__);
  643. break;
  644. case PHY_INTERFACE_MODE_RGMII:
  645. case PHY_INTERFACE_MODE_RGMII_ID:
  646. case PHY_INTERFACE_MODE_RGMII_RXID:
  647. case PHY_INTERFACE_MODE_RGMII_TXID:
  648. if (eth_clk_sel_reg)
  649. value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
  650. SYSCFG_PMCSETR_ETH_CLK_SEL;
  651. else
  652. value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
  653. debug("%s: PHY_INTERFACE_MODE_RGMII\n", __func__);
  654. break;
  655. default:
  656. debug("%s: Do not manage %d interface\n",
  657. __func__, interface_type);
  658. /* Do not manage others interfaces */
  659. return -EINVAL;
  660. }
  661. /* clear and set ETH configuration bits */
  662. writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
  663. SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
  664. syscfg + SYSCFG_PMCCLRR);
  665. writel(value, syscfg + SYSCFG_PMCSETR);
  666. return 0;
  667. }
  668. enum env_location env_get_location(enum env_operation op, int prio)
  669. {
  670. u32 bootmode = get_bootmode();
  671. if (prio)
  672. return ENVL_UNKNOWN;
  673. switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
  674. #ifdef CONFIG_ENV_IS_IN_EXT4
  675. case BOOT_FLASH_SD:
  676. case BOOT_FLASH_EMMC:
  677. return ENVL_EXT4;
  678. #endif
  679. #ifdef CONFIG_ENV_IS_IN_UBI
  680. case BOOT_FLASH_NAND:
  681. return ENVL_UBI;
  682. #endif
  683. #ifdef CONFIG_ENV_IS_IN_SPI_FLASH
  684. case BOOT_FLASH_NOR:
  685. return ENVL_SPI_FLASH;
  686. #endif
  687. default:
  688. return ENVL_NOWHERE;
  689. }
  690. }
  691. #if defined(CONFIG_ENV_IS_IN_EXT4)
  692. const char *env_ext4_get_intf(void)
  693. {
  694. u32 bootmode = get_bootmode();
  695. switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
  696. case BOOT_FLASH_SD:
  697. case BOOT_FLASH_EMMC:
  698. return "mmc";
  699. default:
  700. return "";
  701. }
  702. }
  703. const char *env_ext4_get_dev_part(void)
  704. {
  705. static char *const dev_part[] = {"0:auto", "1:auto", "2:auto"};
  706. u32 bootmode = get_bootmode();
  707. return dev_part[(bootmode & TAMP_BOOT_INSTANCE_MASK) - 1];
  708. }
  709. #endif
  710. #ifdef CONFIG_SYS_MTDPARTS_RUNTIME
  711. #define MTDPARTS_LEN 256
  712. #define MTDIDS_LEN 128
  713. /**
  714. * The mtdparts_nand0 and mtdparts_nor0 variable tends to be long.
  715. * If we need to access it before the env is relocated, then we need
  716. * to use our own stack buffer. gd->env_buf will be too small.
  717. *
  718. * @param buf temporary buffer pointer MTDPARTS_LEN long
  719. * @return mtdparts variable string, NULL if not found
  720. */
  721. static const char *env_get_mtdparts(const char *str, char *buf)
  722. {
  723. if (gd->flags & GD_FLG_ENV_READY)
  724. return env_get(str);
  725. if (env_get_f(str, buf, MTDPARTS_LEN) != -1)
  726. return buf;
  727. return NULL;
  728. }
  729. /**
  730. * update the variables "mtdids" and "mtdparts" with content of mtdparts_<dev>
  731. */
  732. static void board_get_mtdparts(const char *dev,
  733. char *mtdids,
  734. char *mtdparts)
  735. {
  736. char env_name[32] = "mtdparts_";
  737. char tmp_mtdparts[MTDPARTS_LEN];
  738. const char *tmp;
  739. /* name of env variable to read = mtdparts_<dev> */
  740. strcat(env_name, dev);
  741. tmp = env_get_mtdparts(env_name, tmp_mtdparts);
  742. if (tmp) {
  743. /* mtdids: "<dev>=<dev>, ...." */
  744. if (mtdids[0] != '\0')
  745. strcat(mtdids, ",");
  746. strcat(mtdids, dev);
  747. strcat(mtdids, "=");
  748. strcat(mtdids, dev);
  749. /* mtdparts: "mtdparts=<dev>:<mtdparts_<dev>>;..." */
  750. if (mtdparts[0] != '\0')
  751. strncat(mtdparts, ";", MTDPARTS_LEN);
  752. else
  753. strcat(mtdparts, "mtdparts=");
  754. strncat(mtdparts, dev, MTDPARTS_LEN);
  755. strncat(mtdparts, ":", MTDPARTS_LEN);
  756. strncat(mtdparts, tmp, MTDPARTS_LEN);
  757. }
  758. }
  759. void board_mtdparts_default(const char **mtdids, const char **mtdparts)
  760. {
  761. struct mtd_info *mtd;
  762. struct udevice *dev;
  763. static char parts[3 * MTDPARTS_LEN + 1];
  764. static char ids[MTDIDS_LEN + 1];
  765. static bool mtd_initialized;
  766. if (mtd_initialized) {
  767. *mtdids = ids;
  768. *mtdparts = parts;
  769. return;
  770. }
  771. memset(parts, 0, sizeof(parts));
  772. memset(ids, 0, sizeof(ids));
  773. /* probe all MTD devices */
  774. for (uclass_first_device(UCLASS_MTD, &dev);
  775. dev;
  776. uclass_next_device(&dev)) {
  777. pr_debug("mtd device = %s\n", dev->name);
  778. }
  779. mtd = get_mtd_device_nm("nand0");
  780. if (!IS_ERR_OR_NULL(mtd)) {
  781. board_get_mtdparts("nand0", ids, parts);
  782. put_mtd_device(mtd);
  783. }
  784. mtd = get_mtd_device_nm("spi-nand0");
  785. if (!IS_ERR_OR_NULL(mtd)) {
  786. board_get_mtdparts("spi-nand0", ids, parts);
  787. put_mtd_device(mtd);
  788. }
  789. if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev))
  790. board_get_mtdparts("nor0", ids, parts);
  791. mtd_initialized = true;
  792. *mtdids = ids;
  793. *mtdparts = parts;
  794. debug("%s:mtdids=%s & mtdparts=%s\n", __func__, ids, parts);
  795. }
  796. #endif
  797. #if defined(CONFIG_OF_BOARD_SETUP)
  798. int ft_board_setup(void *blob, bd_t *bd)
  799. {
  800. #ifdef CONFIG_FDT_FIXUP_PARTITIONS
  801. struct node_info nodes[] = {
  802. { "st,stm32f469-qspi", MTD_DEV_TYPE_NOR, },
  803. { "st,stm32mp15-fmc2", MTD_DEV_TYPE_NAND, },
  804. };
  805. fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
  806. #endif
  807. return 0;
  808. }
  809. #endif
  810. #ifdef CONFIG_SET_DFU_ALT_INFO
  811. #define DFU_ALT_BUF_LEN SZ_1K
  812. static void board_get_alt_info(const char *dev, char *buff)
  813. {
  814. char var_name[32] = "dfu_alt_info_";
  815. int ret;
  816. ALLOC_CACHE_ALIGN_BUFFER(char, tmp_alt, DFU_ALT_BUF_LEN);
  817. /* name of env variable to read = dfu_alt_info_<dev> */
  818. strcat(var_name, dev);
  819. ret = env_get_f(var_name, tmp_alt, DFU_ALT_BUF_LEN);
  820. if (ret) {
  821. if (buff[0] != '\0')
  822. strcat(buff, "&");
  823. strncat(buff, tmp_alt, DFU_ALT_BUF_LEN);
  824. }
  825. }
  826. void set_dfu_alt_info(char *interface, char *devstr)
  827. {
  828. struct udevice *dev;
  829. struct mtd_info *mtd;
  830. ALLOC_CACHE_ALIGN_BUFFER(char, buf, DFU_ALT_BUF_LEN);
  831. if (env_get("dfu_alt_info"))
  832. return;
  833. memset(buf, 0, sizeof(buf));
  834. /* probe all MTD devices */
  835. mtd_probe_devices();
  836. board_get_alt_info("ram", buf);
  837. if (!uclass_get_device(UCLASS_MMC, 0, &dev))
  838. board_get_alt_info("mmc0", buf);
  839. if (!uclass_get_device(UCLASS_MMC, 1, &dev))
  840. board_get_alt_info("mmc1", buf);
  841. if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev))
  842. board_get_alt_info("nor0", buf);
  843. mtd = get_mtd_device_nm("nand0");
  844. if (!IS_ERR_OR_NULL(mtd))
  845. board_get_alt_info("nand0", buf);
  846. mtd = get_mtd_device_nm("spi-nand0");
  847. if (!IS_ERR_OR_NULL(mtd))
  848. board_get_alt_info("spi-nand0", buf);
  849. #ifdef CONFIG_DFU_VIRT
  850. strncat(buf, "&virt 0=OTP", DFU_ALT_BUF_LEN);
  851. if (IS_ENABLED(CONFIG_PMIC_STPMIC1))
  852. strncat(buf, "&virt 1=PMIC", DFU_ALT_BUF_LEN);
  853. #endif
  854. env_set("dfu_alt_info", buf);
  855. puts("DFU alt info setting: done\n");
  856. }
  857. #if CONFIG_IS_ENABLED(DFU_VIRT)
  858. #include <dfu.h>
  859. #include <power/stpmic1.h>
  860. static int dfu_otp_read(u64 offset, u8 *buffer, long *size)
  861. {
  862. struct udevice *dev;
  863. int ret;
  864. ret = uclass_get_device_by_driver(UCLASS_MISC,
  865. DM_GET_DRIVER(stm32mp_bsec),
  866. &dev);
  867. if (ret)
  868. return ret;
  869. ret = misc_read(dev, offset + STM32_BSEC_OTP_OFFSET, buffer, *size);
  870. if (ret >= 0) {
  871. *size = ret;
  872. ret = 0;
  873. }
  874. return 0;
  875. }
  876. static int dfu_pmic_read(u64 offset, u8 *buffer, long *size)
  877. {
  878. int ret;
  879. #ifdef CONFIG_PMIC_STPMIC1
  880. struct udevice *dev;
  881. ret = uclass_get_device_by_driver(UCLASS_MISC,
  882. DM_GET_DRIVER(stpmic1_nvm),
  883. &dev);
  884. if (ret)
  885. return ret;
  886. ret = misc_read(dev, 0xF8 + offset, buffer, *size);
  887. if (ret >= 0) {
  888. *size = ret;
  889. ret = 0;
  890. }
  891. if (ret == -EACCES) {
  892. *size = 0;
  893. ret = 0;
  894. }
  895. #else
  896. pr_err("PMIC update not supported");
  897. ret = -EOPNOTSUPP;
  898. #endif
  899. return ret;
  900. }
  901. int dfu_read_medium_virt(struct dfu_entity *dfu, u64 offset,
  902. void *buf, long *len)
  903. {
  904. switch (dfu->data.virt.dev_num) {
  905. case 0x0:
  906. return dfu_otp_read(offset, buf, len);
  907. case 0x1:
  908. return dfu_pmic_read(offset, buf, len);
  909. }
  910. *len = 0;
  911. return 0;
  912. }
  913. int __weak dfu_get_medium_size_virt(struct dfu_entity *dfu, u64 *size)
  914. {
  915. *size = SZ_1K;
  916. return 0;
  917. }
  918. #endif
  919. #endif
  920. static void board_copro_image_process(ulong fw_image, size_t fw_size)
  921. {
  922. int ret, id = 0; /* Copro id fixed to 0 as only one coproc on mp1 */
  923. if (!rproc_is_initialized())
  924. if (rproc_init()) {
  925. printf("Remote Processor %d initialization failed\n",
  926. id);
  927. return;
  928. }
  929. ret = rproc_load(id, fw_image, fw_size);
  930. printf("Load Remote Processor %d with data@addr=0x%08lx %u bytes:%s\n",
  931. id, fw_image, fw_size, ret ? " Failed!" : " Success!");
  932. if (!ret)
  933. rproc_start(id);
  934. }
  935. U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_COPRO, board_copro_image_process);