test.dts 20 KB

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  1. /dts-v1/;
  2. #include <dt-bindings/gpio/gpio.h>
  3. #include <dt-bindings/gpio/sandbox-gpio.h>
  4. / {
  5. model = "sandbox";
  6. compatible = "sandbox";
  7. #address-cells = <1>;
  8. #size-cells = <1>;
  9. aliases {
  10. console = &uart0;
  11. eth0 = "/eth@10002000";
  12. eth3 = &eth_3;
  13. eth5 = &eth_5;
  14. gpio1 = &gpio_a;
  15. gpio2 = &gpio_b;
  16. gpio3 = &gpio_c;
  17. i2c0 = "/i2c@0";
  18. mmc0 = "/mmc0";
  19. mmc1 = "/mmc1";
  20. pci0 = &pci0;
  21. pci1 = &pci1;
  22. pci2 = &pci2;
  23. remoteproc0 = &rproc_1;
  24. remoteproc1 = &rproc_2;
  25. rtc0 = &rtc_0;
  26. rtc1 = &rtc_1;
  27. spi0 = "/spi@0";
  28. testfdt6 = "/e-test";
  29. testbus3 = "/some-bus";
  30. testfdt0 = "/some-bus/c-test@0";
  31. testfdt1 = "/some-bus/c-test@1";
  32. testfdt3 = "/b-test";
  33. testfdt5 = "/some-bus/c-test@5";
  34. testfdt8 = "/a-test";
  35. fdt-dummy0 = "/translation-test@8000/dev@0,0";
  36. fdt-dummy1 = "/translation-test@8000/dev@1,100";
  37. fdt-dummy2 = "/translation-test@8000/dev@2,200";
  38. fdt-dummy3 = "/translation-test@8000/noxlatebus@3,300/dev@42";
  39. usb0 = &usb_0;
  40. usb1 = &usb_1;
  41. usb2 = &usb_2;
  42. axi0 = &axi;
  43. osd0 = "/osd";
  44. };
  45. audio: audio-codec {
  46. compatible = "sandbox,audio-codec";
  47. #sound-dai-cells = <1>;
  48. };
  49. cros_ec: cros-ec {
  50. reg = <0 0>;
  51. compatible = "google,cros-ec-sandbox";
  52. /*
  53. * This describes the flash memory within the EC. Note
  54. * that the STM32L flash erases to 0, not 0xff.
  55. */
  56. flash {
  57. image-pos = <0x08000000>;
  58. size = <0x20000>;
  59. erase-value = <0>;
  60. /* Information for sandbox */
  61. ro {
  62. image-pos = <0>;
  63. size = <0xf000>;
  64. };
  65. wp-ro {
  66. image-pos = <0xf000>;
  67. size = <0x1000>;
  68. };
  69. rw {
  70. image-pos = <0x10000>;
  71. size = <0x10000>;
  72. };
  73. };
  74. };
  75. dsi_host: dsi_host {
  76. compatible = "sandbox,dsi-host";
  77. };
  78. a-test {
  79. reg = <0 1>;
  80. compatible = "denx,u-boot-fdt-test";
  81. ping-expect = <0>;
  82. ping-add = <0>;
  83. u-boot,dm-pre-reloc;
  84. test-gpios = <&gpio_a 1>, <&gpio_a 4>,
  85. <&gpio_b 5 GPIO_ACTIVE_HIGH 3 2 1>,
  86. <0>, <&gpio_a 12>;
  87. test2-gpios = <&gpio_a 1>, <&gpio_a 4>,
  88. <&gpio_b 6 GPIO_ACTIVE_LOW 3 2 1>,
  89. <&gpio_b 7 GPIO_IN 3 2 1>,
  90. <&gpio_b 8 GPIO_OUT 3 2 1>,
  91. <&gpio_b 9 (GPIO_OUT|GPIO_OUT_ACTIVE) 3 2 1>;
  92. test3-gpios =
  93. <&gpio_c 0 (GPIO_OUT|GPIO_OPEN_DRAIN)>,
  94. <&gpio_c 1 (GPIO_OUT|GPIO_OPEN_SOURCE)>,
  95. <&gpio_c 2 GPIO_OUT>,
  96. <&gpio_c 3 (GPIO_IN|GPIO_PULL_UP)>,
  97. <&gpio_c 4 (GPIO_IN|GPIO_PULL_DOWN)>,
  98. <&gpio_c 5 GPIO_IN>,
  99. <&gpio_c 6 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_DRAIN)>,
  100. <&gpio_c 7 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_SOURCE)>;
  101. int-value = <1234>;
  102. uint-value = <(-1234)>;
  103. int64-value = /bits/ 64 <0x1111222233334444>;
  104. int-array = <5678 9123 4567>;
  105. interrupts-extended = <&irq 3 0>;
  106. };
  107. junk {
  108. reg = <1 1>;
  109. compatible = "not,compatible";
  110. };
  111. no-compatible {
  112. reg = <2 1>;
  113. };
  114. backlight: backlight {
  115. compatible = "pwm-backlight";
  116. enable-gpios = <&gpio_a 1>;
  117. power-supply = <&ldo_1>;
  118. pwms = <&pwm 0 1000>;
  119. default-brightness-level = <5>;
  120. brightness-levels = <0 16 32 64 128 170 202 234 255>;
  121. };
  122. bind-test {
  123. bind-test-child1 {
  124. compatible = "sandbox,phy";
  125. #phy-cells = <1>;
  126. };
  127. bind-test-child2 {
  128. compatible = "simple-bus";
  129. };
  130. };
  131. b-test {
  132. reg = <3 1>;
  133. compatible = "denx,u-boot-fdt-test";
  134. ping-expect = <3>;
  135. ping-add = <3>;
  136. };
  137. phy_provider0: gen_phy@0 {
  138. compatible = "sandbox,phy";
  139. #phy-cells = <1>;
  140. };
  141. phy_provider1: gen_phy@1 {
  142. compatible = "sandbox,phy";
  143. #phy-cells = <0>;
  144. broken;
  145. };
  146. phy_provider2: gen_phy@2 {
  147. compatible = "sandbox,phy";
  148. #phy-cells = <0>;
  149. };
  150. gen_phy_user: gen_phy_user {
  151. compatible = "simple-bus";
  152. phys = <&phy_provider0 0>, <&phy_provider0 1>, <&phy_provider1>;
  153. phy-names = "phy1", "phy2", "phy3";
  154. };
  155. gen_phy_user1: gen_phy_user1 {
  156. compatible = "simple-bus";
  157. phys = <&phy_provider0 0>, <&phy_provider2>;
  158. phy-names = "phy1", "phy2";
  159. };
  160. some-bus {
  161. #address-cells = <1>;
  162. #size-cells = <0>;
  163. compatible = "denx,u-boot-test-bus";
  164. reg = <3 1>;
  165. ping-expect = <4>;
  166. ping-add = <4>;
  167. c-test@5 {
  168. compatible = "denx,u-boot-fdt-test";
  169. reg = <5>;
  170. ping-expect = <5>;
  171. ping-add = <5>;
  172. };
  173. c-test@0 {
  174. compatible = "denx,u-boot-fdt-test";
  175. reg = <0>;
  176. ping-expect = <6>;
  177. ping-add = <6>;
  178. };
  179. c-test@1 {
  180. compatible = "denx,u-boot-fdt-test";
  181. reg = <1>;
  182. ping-expect = <7>;
  183. ping-add = <7>;
  184. };
  185. };
  186. d-test {
  187. reg = <3 1>;
  188. ping-expect = <6>;
  189. ping-add = <6>;
  190. compatible = "google,another-fdt-test";
  191. };
  192. e-test {
  193. reg = <3 1>;
  194. ping-expect = <6>;
  195. ping-add = <6>;
  196. compatible = "google,another-fdt-test";
  197. };
  198. f-test {
  199. compatible = "denx,u-boot-fdt-test";
  200. };
  201. g-test {
  202. compatible = "denx,u-boot-fdt-test";
  203. };
  204. h-test {
  205. compatible = "denx,u-boot-fdt-test1";
  206. };
  207. i-test {
  208. compatible = "mediatek,u-boot-fdt-test";
  209. #address-cells = <1>;
  210. #size-cells = <0>;
  211. subnode@0 {
  212. reg = <0>;
  213. };
  214. subnode@1 {
  215. reg = <1>;
  216. };
  217. subnode@2 {
  218. reg = <2>;
  219. };
  220. };
  221. devres-test {
  222. compatible = "denx,u-boot-devres-test";
  223. };
  224. acpi-test {
  225. compatible = "denx,u-boot-acpi-test";
  226. };
  227. acpi-test2 {
  228. compatible = "denx,u-boot-acpi-test";
  229. };
  230. clocks {
  231. clk_fixed: clk-fixed {
  232. compatible = "fixed-clock";
  233. #clock-cells = <0>;
  234. clock-frequency = <1234>;
  235. };
  236. clk_fixed_factor: clk-fixed-factor {
  237. compatible = "fixed-factor-clock";
  238. #clock-cells = <0>;
  239. clock-div = <3>;
  240. clock-mult = <2>;
  241. clocks = <&clk_fixed>;
  242. };
  243. osc {
  244. compatible = "fixed-clock";
  245. #clock-cells = <0>;
  246. clock-frequency = <20000000>;
  247. };
  248. };
  249. clk_sandbox: clk-sbox {
  250. compatible = "sandbox,clk";
  251. #clock-cells = <1>;
  252. assigned-clocks = <&clk_sandbox 3>;
  253. assigned-clock-rates = <321>;
  254. };
  255. clk-test {
  256. compatible = "sandbox,clk-test";
  257. clocks = <&clk_fixed>,
  258. <&clk_sandbox 1>,
  259. <&clk_sandbox 0>,
  260. <&clk_sandbox 3>,
  261. <&clk_sandbox 2>;
  262. clock-names = "fixed", "i2c", "spi", "uart2", "uart1";
  263. };
  264. ccf: clk-ccf {
  265. compatible = "sandbox,clk-ccf";
  266. };
  267. eth@10002000 {
  268. compatible = "sandbox,eth";
  269. reg = <0x10002000 0x1000>;
  270. fake-host-hwaddr = [00 00 66 44 22 00];
  271. };
  272. eth_5: eth@10003000 {
  273. compatible = "sandbox,eth";
  274. reg = <0x10003000 0x1000>;
  275. fake-host-hwaddr = [00 00 66 44 22 11];
  276. };
  277. eth_3: sbe5 {
  278. compatible = "sandbox,eth";
  279. reg = <0x10005000 0x1000>;
  280. fake-host-hwaddr = [00 00 66 44 22 33];
  281. };
  282. eth@10004000 {
  283. compatible = "sandbox,eth";
  284. reg = <0x10004000 0x1000>;
  285. fake-host-hwaddr = [00 00 66 44 22 22];
  286. };
  287. firmware {
  288. sandbox_firmware: sandbox-firmware {
  289. compatible = "sandbox,firmware";
  290. };
  291. };
  292. pinctrl-gpio {
  293. compatible = "sandbox,pinctrl-gpio";
  294. gpio_a: base-gpios {
  295. compatible = "sandbox,gpio";
  296. gpio-controller;
  297. #gpio-cells = <1>;
  298. gpio-bank-name = "a";
  299. sandbox,gpio-count = <20>;
  300. hog_input_active_low {
  301. gpio-hog;
  302. input;
  303. gpios = <0 GPIO_ACTIVE_LOW>;
  304. };
  305. hog_input_active_high {
  306. gpio-hog;
  307. input;
  308. gpios = <1 GPIO_ACTIVE_HIGH>;
  309. };
  310. hog_output_low {
  311. gpio-hog;
  312. output-low;
  313. gpios = <2 GPIO_ACTIVE_HIGH>;
  314. };
  315. hog_output_high {
  316. gpio-hog;
  317. output-high;
  318. gpios = <3 GPIO_ACTIVE_HIGH>;
  319. };
  320. };
  321. gpio_b: extra-gpios {
  322. compatible = "sandbox,gpio";
  323. gpio-controller;
  324. #gpio-cells = <5>;
  325. gpio-bank-name = "b";
  326. sandbox,gpio-count = <10>;
  327. };
  328. gpio_c: pinmux-gpios {
  329. compatible = "sandbox,gpio";
  330. gpio-controller;
  331. #gpio-cells = <2>;
  332. gpio-bank-name = "c";
  333. sandbox,gpio-count = <10>;
  334. };
  335. };
  336. i2c@0 {
  337. #address-cells = <1>;
  338. #size-cells = <0>;
  339. reg = <0 1>;
  340. compatible = "sandbox,i2c";
  341. clock-frequency = <100000>;
  342. eeprom@2c {
  343. reg = <0x2c>;
  344. compatible = "i2c-eeprom";
  345. sandbox,emul = <&emul_eeprom>;
  346. };
  347. rtc_0: rtc@43 {
  348. reg = <0x43>;
  349. compatible = "sandbox-rtc";
  350. sandbox,emul = <&emul0>;
  351. };
  352. rtc_1: rtc@61 {
  353. reg = <0x61>;
  354. compatible = "sandbox-rtc";
  355. sandbox,emul = <&emul1>;
  356. };
  357. i2c_emul: emul {
  358. reg = <0xff>;
  359. compatible = "sandbox,i2c-emul-parent";
  360. emul_eeprom: emul-eeprom {
  361. compatible = "sandbox,i2c-eeprom";
  362. sandbox,filename = "i2c.bin";
  363. sandbox,size = <256>;
  364. };
  365. emul0: emul0 {
  366. compatible = "sandbox,i2c-rtc";
  367. };
  368. emul1: emull {
  369. compatible = "sandbox,i2c-rtc";
  370. };
  371. };
  372. sandbox_pmic: sandbox_pmic {
  373. reg = <0x40>;
  374. sandbox,emul = <&emul_pmic0>;
  375. };
  376. mc34708: pmic@41 {
  377. reg = <0x41>;
  378. sandbox,emul = <&emul_pmic1>;
  379. };
  380. };
  381. bootcount@0 {
  382. compatible = "u-boot,bootcount-rtc";
  383. rtc = <&rtc_1>;
  384. offset = <0x13>;
  385. };
  386. adc@0 {
  387. compatible = "sandbox,adc";
  388. vdd-supply = <&buck2>;
  389. vss-microvolts = <0>;
  390. };
  391. irq: irq {
  392. compatible = "sandbox,irq";
  393. interrupt-controller;
  394. #interrupt-cells = <2>;
  395. };
  396. lcd {
  397. u-boot,dm-pre-reloc;
  398. compatible = "sandbox,lcd-sdl";
  399. xres = <1366>;
  400. yres = <768>;
  401. };
  402. leds {
  403. compatible = "gpio-leds";
  404. iracibble {
  405. gpios = <&gpio_a 1 0>;
  406. label = "sandbox:red";
  407. };
  408. martinet {
  409. gpios = <&gpio_a 2 0>;
  410. label = "sandbox:green";
  411. };
  412. default_on {
  413. gpios = <&gpio_a 5 0>;
  414. label = "sandbox:default_on";
  415. default-state = "on";
  416. };
  417. default_off {
  418. gpios = <&gpio_a 6 0>;
  419. label = "sandbox:default_off";
  420. default-state = "off";
  421. };
  422. };
  423. mbox: mbox {
  424. compatible = "sandbox,mbox";
  425. #mbox-cells = <1>;
  426. };
  427. mbox-test {
  428. compatible = "sandbox,mbox-test";
  429. mboxes = <&mbox 100>, <&mbox 1>;
  430. mbox-names = "other", "test";
  431. };
  432. cpus {
  433. cpu-test1 {
  434. compatible = "sandbox,cpu_sandbox";
  435. u-boot,dm-pre-reloc;
  436. };
  437. cpu-test2 {
  438. compatible = "sandbox,cpu_sandbox";
  439. u-boot,dm-pre-reloc;
  440. };
  441. cpu-test3 {
  442. compatible = "sandbox,cpu_sandbox";
  443. u-boot,dm-pre-reloc;
  444. };
  445. };
  446. i2s: i2s {
  447. compatible = "sandbox,i2s";
  448. #sound-dai-cells = <1>;
  449. sandbox,silent; /* Don't emit sounds while testing */
  450. };
  451. nop-test_0 {
  452. compatible = "sandbox,nop_sandbox1";
  453. nop-test_1 {
  454. compatible = "sandbox,nop_sandbox2";
  455. bind = "True";
  456. };
  457. nop-test_2 {
  458. compatible = "sandbox,nop_sandbox2";
  459. bind = "False";
  460. };
  461. };
  462. misc-test {
  463. compatible = "sandbox,misc_sandbox";
  464. };
  465. mmc2 {
  466. compatible = "sandbox,mmc";
  467. };
  468. mmc1 {
  469. compatible = "sandbox,mmc";
  470. };
  471. mmc0 {
  472. compatible = "sandbox,mmc";
  473. };
  474. pch {
  475. compatible = "sandbox,pch";
  476. };
  477. pci0: pci@0 {
  478. compatible = "sandbox,pci";
  479. device_type = "pci";
  480. bus-range = <0x00 0xff>;
  481. #address-cells = <3>;
  482. #size-cells = <2>;
  483. ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000000
  484. 0x01000000 0 0x20000000 0x20000000 0 0x2000>;
  485. pci@0,0 {
  486. compatible = "pci-generic";
  487. reg = <0x0000 0 0 0 0>;
  488. sandbox,emul = <&swap_case_emul0_0>;
  489. };
  490. pci@1,0 {
  491. compatible = "pci-generic";
  492. /* reg 0 is at 0x14, using FDT_PCI_SPACE_MEM32 */
  493. reg = <0x02000814 0 0 0 0
  494. 0x01000810 0 0 0 0>;
  495. sandbox,emul = <&swap_case_emul0_1>;
  496. };
  497. p2sb-pci@2,0 {
  498. compatible = "sandbox,p2sb";
  499. reg = <0x02001010 0 0 0 0>;
  500. sandbox,emul = <&p2sb_emul>;
  501. adder {
  502. intel,p2sb-port-id = <3>;
  503. compatible = "sandbox,adder";
  504. };
  505. };
  506. pci@1e,0 {
  507. compatible = "sandbox,pmc";
  508. reg = <0xf000 0 0 0 0>;
  509. sandbox,emul = <&pmc_emul1e>;
  510. acpi-base = <0x400>;
  511. gpe0-dwx-mask = <0xf>;
  512. gpe0-dwx-shift-base = <4>;
  513. gpe0-dw = <6 7 9>;
  514. gpe0-sts = <0x20>;
  515. gpe0-en = <0x30>;
  516. };
  517. pci@1f,0 {
  518. compatible = "pci-generic";
  519. /* reg 0 is at 0x10, using FDT_PCI_SPACE_IO */
  520. reg = <0x0100f810 0 0 0 0>;
  521. sandbox,emul = <&swap_case_emul0_1f>;
  522. };
  523. };
  524. pci-emul0 {
  525. compatible = "sandbox,pci-emul-parent";
  526. swap_case_emul0_0: emul0@0,0 {
  527. compatible = "sandbox,swap-case";
  528. };
  529. swap_case_emul0_1: emul0@1,0 {
  530. compatible = "sandbox,swap-case";
  531. use-ea;
  532. };
  533. swap_case_emul0_1f: emul0@1f,0 {
  534. compatible = "sandbox,swap-case";
  535. };
  536. p2sb_emul: emul@2,0 {
  537. compatible = "sandbox,p2sb-emul";
  538. };
  539. pmc_emul1e: emul@1e,0 {
  540. compatible = "sandbox,pmc-emul";
  541. };
  542. };
  543. pci1: pci@1 {
  544. compatible = "sandbox,pci";
  545. device_type = "pci";
  546. bus-range = <0x00 0xff>;
  547. #address-cells = <3>;
  548. #size-cells = <2>;
  549. ranges = <0x02000000 0 0x30000000 0x30000000 0 0x2000
  550. 0x01000000 0 0x40000000 0x40000000 0 0x2000>;
  551. sandbox,dev-info = <0x08 0x00 0x1234 0x5678
  552. 0x0c 0x00 0x1234 0x5678
  553. 0x10 0x00 0x1234 0x5678>;
  554. pci@10,0 {
  555. reg = <0x8000 0 0 0 0>;
  556. };
  557. };
  558. pci2: pci@2 {
  559. compatible = "sandbox,pci";
  560. device_type = "pci";
  561. bus-range = <0x00 0xff>;
  562. #address-cells = <3>;
  563. #size-cells = <2>;
  564. ranges = <0x02000000 0 0x50000000 0x50000000 0 0x2000
  565. 0x01000000 0 0x60000000 0x60000000 0 0x2000>;
  566. sandbox,dev-info = <0x08 0x00 0x1234 0x5678>;
  567. pci@1f,0 {
  568. compatible = "pci-generic";
  569. reg = <0xf800 0 0 0 0>;
  570. sandbox,emul = <&swap_case_emul2_1f>;
  571. };
  572. };
  573. pci-emul2 {
  574. compatible = "sandbox,pci-emul-parent";
  575. swap_case_emul2_1f: emul2@1f,0 {
  576. compatible = "sandbox,swap-case";
  577. };
  578. };
  579. pci_ep: pci_ep {
  580. compatible = "sandbox,pci_ep";
  581. };
  582. probing {
  583. compatible = "simple-bus";
  584. test1 {
  585. compatible = "denx,u-boot-probe-test";
  586. };
  587. test2 {
  588. compatible = "denx,u-boot-probe-test";
  589. };
  590. test3 {
  591. compatible = "denx,u-boot-probe-test";
  592. };
  593. test4 {
  594. compatible = "denx,u-boot-probe-test";
  595. first-syscon = <&syscon0>;
  596. second-sys-ctrl = <&another_system_controller>;
  597. third-syscon = <&syscon2>;
  598. };
  599. };
  600. pwrdom: power-domain {
  601. compatible = "sandbox,power-domain";
  602. #power-domain-cells = <1>;
  603. };
  604. power-domain-test {
  605. compatible = "sandbox,power-domain-test";
  606. power-domains = <&pwrdom 2>;
  607. };
  608. pwm: pwm {
  609. compatible = "sandbox,pwm";
  610. #pwm-cells = <2>;
  611. };
  612. pwm2 {
  613. compatible = "sandbox,pwm";
  614. #pwm-cells = <2>;
  615. };
  616. ram {
  617. compatible = "sandbox,ram";
  618. };
  619. reset@0 {
  620. compatible = "sandbox,warm-reset";
  621. };
  622. reset@1 {
  623. compatible = "sandbox,reset";
  624. };
  625. resetc: reset-ctl {
  626. compatible = "sandbox,reset-ctl";
  627. #reset-cells = <1>;
  628. };
  629. reset-ctl-test {
  630. compatible = "sandbox,reset-ctl-test";
  631. resets = <&resetc 100>, <&resetc 2>;
  632. reset-names = "other", "test";
  633. };
  634. rng {
  635. compatible = "sandbox,sandbox-rng";
  636. };
  637. rproc_1: rproc@1 {
  638. compatible = "sandbox,test-processor";
  639. remoteproc-name = "remoteproc-test-dev1";
  640. };
  641. rproc_2: rproc@2 {
  642. compatible = "sandbox,test-processor";
  643. internal-memory-mapped;
  644. remoteproc-name = "remoteproc-test-dev2";
  645. };
  646. panel {
  647. compatible = "simple-panel";
  648. backlight = <&backlight 0 100>;
  649. };
  650. smem@0 {
  651. compatible = "sandbox,smem";
  652. };
  653. sound {
  654. compatible = "sandbox,sound";
  655. cpu {
  656. sound-dai = <&i2s 0>;
  657. };
  658. codec {
  659. sound-dai = <&audio 0>;
  660. };
  661. };
  662. spi@0 {
  663. #address-cells = <1>;
  664. #size-cells = <0>;
  665. reg = <0 1>;
  666. compatible = "sandbox,spi";
  667. cs-gpios = <0>, <&gpio_a 0>;
  668. spi.bin@0 {
  669. reg = <0>;
  670. compatible = "spansion,m25p16", "jedec,spi-nor";
  671. spi-max-frequency = <40000000>;
  672. sandbox,filename = "spi.bin";
  673. };
  674. };
  675. syscon0: syscon@0 {
  676. compatible = "sandbox,syscon0";
  677. reg = <0x10 16>;
  678. };
  679. another_system_controller: syscon@1 {
  680. compatible = "sandbox,syscon1";
  681. reg = <0x20 5
  682. 0x28 6
  683. 0x30 7
  684. 0x38 8>;
  685. };
  686. syscon2: syscon@2 {
  687. compatible = "simple-mfd", "syscon";
  688. reg = <0x40 5
  689. 0x48 6
  690. 0x50 7
  691. 0x58 8>;
  692. };
  693. timer {
  694. compatible = "sandbox,timer";
  695. clock-frequency = <1000000>;
  696. };
  697. tpm2 {
  698. compatible = "sandbox,tpm2";
  699. };
  700. uart0: serial {
  701. compatible = "sandbox,serial";
  702. u-boot,dm-pre-reloc;
  703. };
  704. usb_0: usb@0 {
  705. compatible = "sandbox,usb";
  706. status = "disabled";
  707. hub {
  708. compatible = "sandbox,usb-hub";
  709. #address-cells = <1>;
  710. #size-cells = <0>;
  711. flash-stick {
  712. reg = <0>;
  713. compatible = "sandbox,usb-flash";
  714. };
  715. };
  716. };
  717. usb_1: usb@1 {
  718. compatible = "sandbox,usb";
  719. hub {
  720. compatible = "usb-hub";
  721. usb,device-class = <9>;
  722. #address-cells = <1>;
  723. #size-cells = <0>;
  724. hub-emul {
  725. compatible = "sandbox,usb-hub";
  726. #address-cells = <1>;
  727. #size-cells = <0>;
  728. flash-stick@0 {
  729. reg = <0>;
  730. compatible = "sandbox,usb-flash";
  731. sandbox,filepath = "testflash.bin";
  732. };
  733. flash-stick@1 {
  734. reg = <1>;
  735. compatible = "sandbox,usb-flash";
  736. sandbox,filepath = "testflash1.bin";
  737. };
  738. flash-stick@2 {
  739. reg = <2>;
  740. compatible = "sandbox,usb-flash";
  741. sandbox,filepath = "testflash2.bin";
  742. };
  743. keyb@3 {
  744. reg = <3>;
  745. compatible = "sandbox,usb-keyb";
  746. };
  747. };
  748. usbstor@1 {
  749. reg = <1>;
  750. };
  751. usbstor@3 {
  752. reg = <3>;
  753. };
  754. };
  755. };
  756. usb_2: usb@2 {
  757. compatible = "sandbox,usb";
  758. status = "disabled";
  759. };
  760. spmi: spmi@0 {
  761. compatible = "sandbox,spmi";
  762. #address-cells = <0x1>;
  763. #size-cells = <0x1>;
  764. ranges;
  765. pm8916@0 {
  766. compatible = "qcom,spmi-pmic";
  767. reg = <0x0 0x1>;
  768. #address-cells = <0x1>;
  769. #size-cells = <0x1>;
  770. ranges;
  771. spmi_gpios: gpios@c000 {
  772. compatible = "qcom,pm8916-gpio";
  773. reg = <0xc000 0x400>;
  774. gpio-controller;
  775. gpio-count = <4>;
  776. #gpio-cells = <2>;
  777. gpio-bank-name="spmi";
  778. };
  779. };
  780. };
  781. wdt0: wdt@0 {
  782. compatible = "sandbox,wdt";
  783. };
  784. axi: axi@0 {
  785. compatible = "sandbox,axi";
  786. #address-cells = <0x1>;
  787. #size-cells = <0x1>;
  788. store@0 {
  789. compatible = "sandbox,sandbox_store";
  790. reg = <0x0 0x400>;
  791. };
  792. };
  793. chosen {
  794. #address-cells = <1>;
  795. #size-cells = <1>;
  796. setting = "sunrise ohoka";
  797. other-node = "/some-bus/c-test@5";
  798. int-values = <0x1937 72993>;
  799. chosen-test {
  800. compatible = "denx,u-boot-fdt-test";
  801. reg = <9 1>;
  802. };
  803. };
  804. translation-test@8000 {
  805. compatible = "simple-bus";
  806. reg = <0x8000 0x4000>;
  807. #address-cells = <0x2>;
  808. #size-cells = <0x1>;
  809. ranges = <0 0x0 0x8000 0x1000
  810. 1 0x100 0x9000 0x1000
  811. 2 0x200 0xA000 0x1000
  812. 3 0x300 0xB000 0x1000
  813. >;
  814. dma-ranges = <0 0x000 0x10000000 0x1000
  815. 1 0x100 0x20000000 0x1000
  816. >;
  817. dev@0,0 {
  818. compatible = "denx,u-boot-fdt-dummy";
  819. reg = <0 0x0 0x1000>;
  820. reg-names = "sandbox-dummy-0";
  821. };
  822. dev@1,100 {
  823. compatible = "denx,u-boot-fdt-dummy";
  824. reg = <1 0x100 0x1000>;
  825. };
  826. dev@2,200 {
  827. compatible = "denx,u-boot-fdt-dummy";
  828. reg = <2 0x200 0x1000>;
  829. };
  830. noxlatebus@3,300 {
  831. compatible = "simple-bus";
  832. reg = <3 0x300 0x1000>;
  833. #address-cells = <0x1>;
  834. #size-cells = <0x0>;
  835. dev@42 {
  836. compatible = "denx,u-boot-fdt-dummy";
  837. reg = <0x42>;
  838. };
  839. };
  840. };
  841. osd {
  842. compatible = "sandbox,sandbox_osd";
  843. };
  844. board {
  845. compatible = "sandbox,board_sandbox";
  846. };
  847. sandbox_tee {
  848. compatible = "sandbox,tee";
  849. };
  850. sandbox_virtio1 {
  851. compatible = "sandbox,virtio1";
  852. };
  853. sandbox_virtio2 {
  854. compatible = "sandbox,virtio2";
  855. };
  856. pinctrl {
  857. compatible = "sandbox,pinctrl";
  858. pinctrl-names = "default";
  859. pinctrl-0 = <&gpios>;
  860. gpios: gpios {
  861. gpio0 {
  862. pins = "GPIO0";
  863. bias-pull-up;
  864. input-disable;
  865. };
  866. gpio1 {
  867. pins = "GPIO1";
  868. output-high;
  869. drive-open-drain;
  870. };
  871. gpio2 {
  872. pins = "GPIO2";
  873. bias-pull-down;
  874. input-enable;
  875. };
  876. gpio3 {
  877. pins = "GPIO3";
  878. bias-disable;
  879. };
  880. };
  881. };
  882. hwspinlock@0 {
  883. compatible = "sandbox,hwspinlock";
  884. };
  885. dma: dma {
  886. compatible = "sandbox,dma";
  887. #dma-cells = <1>;
  888. dmas = <&dma 0>, <&dma 1>, <&dma 2>;
  889. dma-names = "m2m", "tx0", "rx0";
  890. };
  891. /*
  892. * keep mdio-mux ahead of mdio so that the mux is removed first at the
  893. * end of the test. If parent mdio is removed first, clean-up of the
  894. * mux will trigger a 2nd probe of parent-mdio, leaving parent-mdio
  895. * active at the end of the test. That it turn doesn't allow the mdio
  896. * class to be destroyed, triggering an error.
  897. */
  898. mdio-mux-test {
  899. compatible = "sandbox,mdio-mux";
  900. #address-cells = <1>;
  901. #size-cells = <0>;
  902. mdio-parent-bus = <&mdio>;
  903. mdio-ch-test@0 {
  904. reg = <0>;
  905. };
  906. mdio-ch-test@1 {
  907. reg = <1>;
  908. };
  909. };
  910. mdio: mdio-test {
  911. compatible = "sandbox,mdio";
  912. };
  913. pm-bus-test {
  914. compatible = "simple-pm-bus";
  915. clocks = <&clk_sandbox 4>;
  916. power-domains = <&pwrdom 1>;
  917. };
  918. resetc2: syscon-reset {
  919. compatible = "syscon-reset";
  920. #reset-cells = <1>;
  921. regmap = <&syscon0>;
  922. offset = <1>;
  923. mask = <0x27FFFFFF>;
  924. assert-high = <0>;
  925. };
  926. syscon-reset-test {
  927. compatible = "sandbox,misc_sandbox";
  928. resets = <&resetc2 15>, <&resetc2 30>, <&resetc2 60>;
  929. reset-names = "valid", "no_mask", "out_of_range";
  930. };
  931. };
  932. #include "sandbox_pmic.dtsi"