k210.dtsi 14 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
  4. */
  5. #include <dt-bindings/clock/k210-sysctl.h>
  6. #include <dt-bindings/mfd/k210-sysctl.h>
  7. #include <dt-bindings/reset/k210-sysctl.h>
  8. / {
  9. /*
  10. * Although the K210 is a 64-bit CPU, the address bus is only 32-bits
  11. * wide, and the upper half of all addresses is ignored.
  12. */
  13. #address-cells = <1>;
  14. #size-cells = <1>;
  15. compatible = "kendryte,k210";
  16. aliases {
  17. dma0 = &dmac0;
  18. gpio0 = &gpio0;
  19. gpio1 = &gpio1_0;
  20. i2c0 = &i2c0;
  21. i2c1 = &i2c1;
  22. i2c2 = &i2c2;
  23. pinctrl0 = &fpioa;
  24. serial0 = &uarths0;
  25. serial1 = &uart1;
  26. serial2 = &uart2;
  27. serial3 = &uart3;
  28. spi0 = &spi0;
  29. spi1 = &spi1;
  30. spi2 = &spi2;
  31. spi3 = &spi3;
  32. timer0 = &timer0;
  33. timer1 = &timer1;
  34. timer2 = &timer2;
  35. };
  36. cpus {
  37. #address-cells = <1>;
  38. #size-cells = <0>;
  39. timebase-frequency = <7800000>;
  40. cpu0: cpu@0 {
  41. device_type = "cpu";
  42. compatible = "kendryte,k210", "sifive,rocket0", "riscv";
  43. reg = <0>;
  44. riscv,isa = "rv64imafdgc";
  45. mmu-type = "sv39";
  46. i-cache-block-size = <64>;
  47. i-cache-size = <0x8000>;
  48. d-cache-block-size = <64>;
  49. d-cache-size = <0x8000>;
  50. clocks = <&sysclk K210_CLK_CPU>;
  51. cpu0_intc: interrupt-controller {
  52. #interrupt-cells = <1>;
  53. interrupt-controller;
  54. compatible = "riscv,cpu-intc";
  55. };
  56. };
  57. cpu1: cpu@1 {
  58. device_type = "cpu";
  59. compatible = "kendryte,k210", "sifive,rocket0", "riscv";
  60. reg = <1>;
  61. riscv,isa = "rv64imafdgc";
  62. mmu-type = "sv39";
  63. i-cache-block-size = <64>;
  64. i-cache-size = <0x8000>;
  65. d-cache-block-size = <64>;
  66. d-cache-size = <0x8000>;
  67. clocks = <&sysclk K210_CLK_CPU>;
  68. cpu1_intc: interrupt-controller {
  69. #interrupt-cells = <1>;
  70. interrupt-controller;
  71. compatible = "riscv,cpu-intc";
  72. };
  73. };
  74. };
  75. sram: memory@80000000 {
  76. device_type = "memory";
  77. compatible = "kendryte,k210-sram";
  78. reg = <0x80000000 0x400000>,
  79. <0x80400000 0x200000>,
  80. <0x80600000 0x200000>;
  81. reg-names = "sram0", "sram1", "airam";
  82. clocks = <&sysclk K210_CLK_SRAM0>,
  83. <&sysclk K210_CLK_SRAM1>,
  84. <&sysclk K210_CLK_PLL1>;
  85. clock-names = "sram0", "sram1", "airam";
  86. };
  87. reserved-memory {
  88. #address-cells = <1>;
  89. #size-cells = <1>;
  90. ranges;
  91. ai_reserved: ai@80600000 {
  92. reg = <0x80600000 0x200000>;
  93. reusable;
  94. };
  95. };
  96. clocks {
  97. in0: osc {
  98. compatible = "fixed-clock";
  99. #clock-cells = <0>;
  100. clock-frequency = <26000000>;
  101. };
  102. };
  103. soc {
  104. #address-cells = <1>;
  105. #size-cells = <1>;
  106. compatible = "kendryte,k210-soc", "simple-bus";
  107. ranges;
  108. interrupt-parent = <&plic0>;
  109. debug0: debug@0 {
  110. compatible = "kendryte,k210-debug", "riscv,debug";
  111. reg = <0x0 0x1000>;
  112. };
  113. rom0: nvmem@1000 {
  114. reg = <0x1000 0x1000>;
  115. read-only;
  116. };
  117. clint0: interrupt-controller@2000000 {
  118. #interrupt-cells = <1>;
  119. compatible = "kendryte,k210-clint", "riscv,clint0";
  120. reg = <0x2000000 0xC000>;
  121. interrupt-controller;
  122. interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>,
  123. <&cpu1_intc 3>, <&cpu1_intc 7>;
  124. clocks = <&sysclk K210_CLK_CPU>;
  125. };
  126. plic0: interrupt-controller@C000000 {
  127. #interrupt-cells = <1>;
  128. compatible = "kendryte,k210-plic", "riscv,plic0";
  129. reg = <0xC000000 0x4000000>;
  130. interrupt-controller;
  131. interrupts-extended = <&cpu0_intc 9>, <&cpu0_intc 11>,
  132. <&cpu1_intc 9>, <&cpu1_intc 11>;
  133. riscv,ndev = <65>;
  134. riscv,max-priority = <7>;
  135. };
  136. uarths0: serial@38000000 {
  137. compatible = "kendryte,k210-uarths", "sifive,uart0";
  138. reg = <0x38000000 0x1000>;
  139. interrupts = <33>;
  140. clocks = <&sysclk K210_CLK_CPU>;
  141. status = "disabled";
  142. };
  143. gpio0: gpio-controller@38001000 {
  144. #interrupt-cells = <2>;
  145. #gpio-cells = <2>;
  146. compatible = "kendryte,k210-gpiohs", "sifive,gpio0";
  147. reg = <0x38001000 0x1000>;
  148. interrupt-controller;
  149. interrupts = <34 35 36 37 38 39 40 41
  150. 42 43 44 45 46 47 48 49
  151. 50 51 52 53 54 55 56 57
  152. 58 59 60 61 62 63 64 65>;
  153. gpio-controller;
  154. ngpios = <32>;
  155. status = "disabled";
  156. };
  157. kpu0: kpu@40800000 {
  158. compatible = "kendryte,k210-kpu";
  159. reg = <0x40800000 0xc00000>;
  160. interrupts = <25>;
  161. clocks = <&sysclk K210_CLK_AI>;
  162. memory-region = <&ai_reserved>;
  163. status = "disabled";
  164. };
  165. fft0: fft@42000000 {
  166. compatible = "kendryte,k210-fft";
  167. reg = <0x42000000 0x400000>;
  168. interrupts = <26>;
  169. clocks = <&sysclk K210_CLK_FFT>;
  170. resets = <&sysrst K210_RST_FFT>;
  171. status = "disabled";
  172. };
  173. dmac0: dma-controller@50000000 {
  174. compatible = "kendryte,k210-dmac", "snps,axi-dma-1.01a";
  175. reg = <0x50000000 0x1000>;
  176. interrupts = <27 28 29 30 31 32>;
  177. clocks = <&sysclk K210_CLK_DMA>, <&sysclk K210_CLK_DMA>;
  178. clock-names = "core-clk", "cfgr-clk";
  179. resets = <&sysrst K210_RST_DMA>;
  180. dma-channels = <6>;
  181. snps,dma-masters = <2>;
  182. snps,data-width = <5>;
  183. snps,block-size = <0x400000 0x400000 0x400000
  184. 0x400000 0x400000 0x400000>;
  185. snps,axi-max-burst-len = <256>;
  186. status = "disabled";
  187. };
  188. apb0: bus@50200000 {
  189. #address-cells = <1>;
  190. #size-cells = <1>;
  191. compatible = "kendryte,k210-apb", "simple-pm-bus";
  192. ranges;
  193. clocks = <&sysclk K210_CLK_APB0>;
  194. gpio1: gpio-controller@50200000 {
  195. #address-cells = <1>;
  196. #size-cells = <0>;
  197. compatible = "kendryte,k210-gpio",
  198. "snps,dw-apb-gpio";
  199. reg = <0x50200000 0x80>;
  200. clocks = <&sysclk K210_CLK_GPIO>;
  201. resets = <&sysrst K210_RST_GPIO>;
  202. status = "disabled";
  203. gpio1_0: gpio1@0 {
  204. #gpio-cells = <2>;
  205. #interrupt-cells = <2>;
  206. compatible = "snps,dw-apb-gpio-port";
  207. reg = <0>;
  208. interrupt-controller;
  209. interrupts = <23>;
  210. gpio-controller;
  211. snps,nr-gpios = <8>;
  212. };
  213. };
  214. uart1: serial@50210000 {
  215. compatible = "kendryte,k210-uart",
  216. "snps,dw-apb-uart";
  217. reg = <0x50210000 0x100>;
  218. interrupts = <11>;
  219. clocks = <&sysclk K210_CLK_UART1>;
  220. resets = <&sysrst K210_RST_UART1>;
  221. reg-io-width = <4>;
  222. reg-shift = <2>;
  223. dcd-override;
  224. dsr-override;
  225. cts-override;
  226. ri-override;
  227. status = "disabled";
  228. };
  229. uart2: serial@50220000 {
  230. compatible = "kendryte,k210-uart",
  231. "snps,dw-apb-uart";
  232. reg = <0x50220000 0x100>;
  233. interrupts = <12>;
  234. clocks = <&sysclk K210_CLK_UART2>;
  235. resets = <&sysrst K210_RST_UART2>;
  236. reg-io-width = <4>;
  237. reg-shift = <2>;
  238. dcd-override;
  239. dsr-override;
  240. cts-override;
  241. ri-override;
  242. status = "disabled";
  243. };
  244. uart3: serial@50230000 {
  245. compatible = "kendryte,k210-uart",
  246. "snps,dw-apb-uart";
  247. reg = <0x50230000 0x100>;
  248. interrupts = <13>;
  249. clocks = <&sysclk K210_CLK_UART3>;
  250. resets = <&sysrst K210_RST_UART3>;
  251. reg-io-width = <4>;
  252. reg-shift = <2>;
  253. dcd-override;
  254. dsr-override;
  255. cts-override;
  256. ri-override;
  257. status = "disabled";
  258. };
  259. spi2: spi@50240000 {
  260. compatible = "kendryte,k120-spislave",
  261. "snps,dw-apb-ssi";
  262. spi-slave;
  263. reg = <0x50240000 0x100>;
  264. interrupts = <2>;
  265. clocks = <&sysclk K210_CLK_SPI2>;
  266. resets = <&sysrst K210_RST_SPI2>;
  267. spi-max-frequency = <25000000>;
  268. status = "disabled";
  269. };
  270. i2s0: i2s@50250000 {
  271. compatible = "kendryte,k210-i2s",
  272. "snps,designware-i2s";
  273. reg = <0x50250000 0x200>;
  274. interrupts = <5>;
  275. clocks = <&sysclk K210_CLK_I2S0>;
  276. clock-names = "i2sclk";
  277. resets = <&sysrst K210_RST_I2S0>;
  278. status = "disabled";
  279. };
  280. apu0: sound@520250200 {
  281. compatible = "kendryte,k210-apu";
  282. reg = <0x50250200 0x200>;
  283. status = "disabled";
  284. };
  285. i2s1: i2s@50260000 {
  286. compatible = "kendryte,k210-i2s",
  287. "snps,designware-i2s";
  288. reg = <0x50260000 0x200>;
  289. interrupts = <6>;
  290. clocks = <&sysclk K210_CLK_I2S1>;
  291. clock-names = "i2sclk";
  292. resets = <&sysrst K210_RST_I2S1>;
  293. status = "disabled";
  294. };
  295. i2s2: i2s@50270000 {
  296. compatible = "kendryte,k210-i2s",
  297. "snps,designware-i2s";
  298. reg = <0x50270000 0x200>;
  299. interrupts = <7>;
  300. clocks = <&sysclk K210_CLK_I2S2>;
  301. clock-names = "i2sclk";
  302. resets = <&sysrst K210_RST_I2S2>;
  303. status = "disabled";
  304. };
  305. i2c0: i2c@50280000 {
  306. compatible = "kendryte,k210-i2c",
  307. "snps,designware-i2c";
  308. reg = <0x50280000 0x100>;
  309. interrupts = <8>;
  310. clocks = <&sysclk K210_CLK_I2C0>;
  311. resets = <&sysrst K210_RST_I2C0>;
  312. status = "disabled";
  313. };
  314. i2c1: i2c@50290000 {
  315. compatible = "kendryte,k210-i2c",
  316. "snps,designware-i2c";
  317. reg = <0x50290000 0x100>;
  318. interrupts = <9>;
  319. clocks = <&sysclk K210_CLK_I2C1>;
  320. resets = <&sysrst K210_RST_I2C1>;
  321. status = "disabled";
  322. };
  323. i2c2: i2c@502A0000 {
  324. compatible = "kendryte,k210-i2c",
  325. "snps,designware-i2c";
  326. reg = <0x502A0000 0x100>;
  327. interrupts = <10>;
  328. clocks = <&sysclk K210_CLK_I2C2>;
  329. resets = <&sysrst K210_RST_I2C2>;
  330. status = "disabled";
  331. };
  332. fpioa: pinmux@502B0000 {
  333. compatible = "kendryte,k210-fpioa";
  334. reg = <0x502B0000 0x100>;
  335. clocks = <&sysclk K210_CLK_FPIOA>;
  336. resets = <&sysrst K210_RST_FPIOA>;
  337. status = "disabled";
  338. };
  339. sha256: sha256@502C0000 {
  340. compatible = "kendryte,k210-sha256";
  341. reg = <0x502C0000 0x100>;
  342. clocks = <&sysclk K210_CLK_SHA>;
  343. resets = <&sysrst K210_RST_SHA>;
  344. status = "disabled";
  345. };
  346. timer0: timer@502D0000 {
  347. compatible = "kendryte,k210-timer",
  348. "snps,dw-apb-timer";
  349. reg = <0x502D0000 0x100>;
  350. interrupts = <14 15>;
  351. clocks = <&sysclk K210_CLK_TIMER0>;
  352. clock-names = "timer";
  353. resets = <&sysrst K210_RST_TIMER0>;
  354. status = "disabled";
  355. };
  356. timer1: timer@502E0000 {
  357. compatible = "kendryte,k210-timer",
  358. "snps,dw-apb-timer";
  359. reg = <0x502E0000 0x100>;
  360. interrupts = <16 17>;
  361. clocks = <&sysclk K210_CLK_TIMER1>;
  362. clock-names = "timer";
  363. resets = <&sysrst K210_RST_TIMER1>;
  364. status = "disabled";
  365. };
  366. timer2: timer@502F0000 {
  367. compatible = "kendryte,k210-timer",
  368. "snps,dw-apb-timer";
  369. reg = <0x502F0000 0x100>;
  370. interrupts = <18 19>;
  371. clocks = <&sysclk K210_CLK_TIMER2>;
  372. clock-names = "timer";
  373. resets = <&sysrst K210_RST_TIMER2>;
  374. status = "disabled";
  375. };
  376. };
  377. apb1: bus@50400000 {
  378. #address-cells = <1>;
  379. #size-cells = <1>;
  380. compatible = "kendryte,k210-apb", "simple-pm-bus";
  381. ranges;
  382. clocks = <&sysclk K210_CLK_APB1>;
  383. wdt0: watchdog@50400000 {
  384. compatible = "kendryte,k210-wdt", "snps,dw-wdt";
  385. reg = <0x50400000 0x100>;
  386. interrupts = <21>;
  387. clocks = <&sysclk K210_CLK_WDT0>;
  388. resets = <&sysrst K210_RST_WDT0>;
  389. status = "disabled";
  390. };
  391. wdt1: watchdog@50410000 {
  392. compatible = "kendryte,k210-wdt", "snps,dw-wdt";
  393. reg = <0x50410000 0x100>;
  394. interrupts = <22>;
  395. clocks = <&sysclk K210_CLK_WDT1>;
  396. resets = <&sysrst K210_RST_WDT1>;
  397. status = "disabled";
  398. };
  399. otp0: nvmem@50420000 {
  400. #address-cells = <1>;
  401. #size-cells = <1>;
  402. compatible = "kendryte,k210-otp";
  403. reg = <0x50420000 0x100>,
  404. <0x88000000 0x20000>;
  405. reg-names = "reg", "mem";
  406. clocks = <&sysclk K210_CLK_ROM>;
  407. resets = <&sysrst K210_RST_ROM>;
  408. read-only;
  409. status = "disabled";
  410. /* Bootloader */
  411. firmware@00000 {
  412. reg = <0x00000 0xC200>;
  413. };
  414. /*
  415. * config string as described in RISC-V
  416. * privileged spec 1.9
  417. */
  418. config-1-9@1c000 {
  419. reg = <0x1C000 0x1000>;
  420. };
  421. /*
  422. * Device tree containing only registers,
  423. * interrupts, and cpus
  424. */
  425. fdt@1d000 {
  426. reg = <0x1D000 0x2000>;
  427. };
  428. /* CPU/ROM credits */
  429. credits@1f000 {
  430. reg = <0x1F000 0x1000>;
  431. };
  432. };
  433. dvp0: camera@50430000 {
  434. compatible = "kendryte,k210-dvp";
  435. reg = <0x50430000 0x100>;
  436. interrupts = <24>;
  437. clocks = <&sysclk K210_CLK_DVP>;
  438. resets = <&sysrst K210_RST_DVP>;
  439. status = "disabled";
  440. };
  441. sysctl: syscon@50440000 {
  442. compatible = "kendryte,k210-sysctl",
  443. "syscon", "simple-mfd";
  444. reg = <0x50440000 0x100>;
  445. reg-io-width = <4>;
  446. sysclk: clock-controller {
  447. #clock-cells = <1>;
  448. compatible = "kendryte,k210-clk";
  449. clocks = <&in0>;
  450. };
  451. sysrst: reset-controller {
  452. compatible = "kendryte,k210-rst",
  453. "syscon-reset";
  454. #reset-cells = <1>;
  455. regmap = <&sysctl>;
  456. offset = <K210_SYSCTL_PERI_RESET>;
  457. mask = <0x27FFFFFF>;
  458. assert-high = <1>;
  459. };
  460. reboot {
  461. compatible = "syscon-reboot";
  462. regmap = <&sysctl>;
  463. offset = <K210_SYSCTL_SOFT_RESET>;
  464. mask = <1>;
  465. value = <1>;
  466. };
  467. };
  468. aes0: aes@50450000 {
  469. compatible = "kendryte,k210-aes";
  470. reg = <0x50450000 0x100>;
  471. clocks = <&sysclk K210_CLK_AES>;
  472. resets = <&sysrst K210_RST_AES>;
  473. status = "disabled";
  474. };
  475. rtc: rtc@50460000 {
  476. compatible = "kendryte,k210-rtc";
  477. reg = <0x50460000 0x100>;
  478. clocks = <&in0>;
  479. resets = <&sysrst K210_RST_RTC>;
  480. interrupts = <20>;
  481. status = "disabled";
  482. };
  483. };
  484. apb2: bus@52000000 {
  485. #address-cells = <1>;
  486. #size-cells = <1>;
  487. compatible = "kendryte,k210-apb", "simple-pm-bus";
  488. ranges;
  489. clocks = <&sysclk K210_CLK_APB2>;
  490. spi0: spi@52000000 {
  491. #address-cells = <1>;
  492. #size-cells = <0>;
  493. compatible = "kendryte,k210-spi",
  494. "snps,dw-apb-ssi";
  495. reg = <0x52000000 0x100>;
  496. interrupts = <1>;
  497. clocks = <&sysclk K210_CLK_SPI0>;
  498. clock-names = "ssi_clk";
  499. resets = <&sysrst K210_RST_SPI0>;
  500. spi-max-frequency = <25000000>;
  501. num-cs = <4>;
  502. reg-io-width = <4>;
  503. status = "disabled";
  504. };
  505. spi1: spi@53000000 {
  506. #address-cells = <1>;
  507. #size-cells = <0>;
  508. compatible = "kendryte,k210-spi",
  509. "snps,dw-apb-ssi";
  510. reg = <0x53000000 0x100>;
  511. interrupts = <2>;
  512. clocks = <&sysclk K210_CLK_SPI1>;
  513. clock-names = "ssi_clk";
  514. resets = <&sysrst K210_RST_SPI1>;
  515. spi-max-frequency = <25000000>;
  516. num-cs = <4>;
  517. reg-io-width = <4>;
  518. status = "disabled";
  519. };
  520. spi3: spi@54000000 {
  521. #address-cells = <1>;
  522. #size-cells = <0>;
  523. compatible = "kendryte,k210-spi",
  524. "snps,dw-apb-ssi";
  525. reg = <0x54000000 0x200>;
  526. interrupts = <4>;
  527. clocks = <&sysclk K210_CLK_SPI3>;
  528. clock-names = "ssi_clk";
  529. resets = <&sysrst K210_RST_SPI3>;
  530. /* Could possibly go up to 200 MHz */
  531. spi-max-frequency = <100000000>;
  532. num-cs = <4>;
  533. reg-io-width = <4>;
  534. status = "disabled";
  535. };
  536. };
  537. };
  538. };