roc-pc-rk3399.c 1.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2016 Rockchip Electronics Co., Ltd
  4. */
  5. #include <common.h>
  6. #include <dm.h>
  7. #include <env.h>
  8. #include <log.h>
  9. #include <spl_gpio.h>
  10. #include <asm/io.h>
  11. #include <power/regulator.h>
  12. #include <asm/arch-rockchip/cru.h>
  13. #include <asm/arch-rockchip/gpio.h>
  14. #include <asm/arch-rockchip/grf_rk3399.h>
  15. #ifndef CONFIG_SPL_BUILD
  16. int board_early_init_f(void)
  17. {
  18. struct udevice *regulator;
  19. int ret;
  20. ret = regulator_get_by_platname("vcc5v0_host", &regulator);
  21. if (ret) {
  22. debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret);
  23. goto out;
  24. }
  25. ret = regulator_set_enable(regulator, true);
  26. if (ret)
  27. debug("%s vcc5v0-host-en set fail! ret %d\n", __func__, ret);
  28. out:
  29. return 0;
  30. }
  31. #else
  32. #define PMUGRF_BASE 0xff320000
  33. #define GPIO0_BASE 0xff720000
  34. /**
  35. * LED setup for roc-rk3399-pc
  36. *
  37. * 1. Set the low power leds (only during POR, pwr_key env is 'y')
  38. * glow yellow LED, termed as low power
  39. * poll for on board power key press
  40. * once powe key pressed, turn off yellow
  41. * 2. Turn on red LED, indicating full power mode
  42. */
  43. void led_setup(void)
  44. {
  45. struct rockchip_gpio_regs * const gpio0 = (void *)GPIO0_BASE;
  46. struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE;
  47. bool press_pwr_key = false;
  48. if (IS_ENABLED(CONFIG_SPL_ENV_SUPPORT)) {
  49. env_init();
  50. env_load();
  51. if (env_get_yesno("pwr_key") == 1)
  52. press_pwr_key = true;
  53. }
  54. if (press_pwr_key && !strcmp(get_reset_cause(), "POR")) {
  55. spl_gpio_output(gpio0, GPIO(BANK_A, 2), 1);
  56. spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_A, 5),
  57. GPIO_PULL_NORMAL);
  58. while (readl(&gpio0->ext_port) & 0x20)
  59. ;
  60. spl_gpio_output(gpio0, GPIO(BANK_A, 2), 0);
  61. }
  62. spl_gpio_output(gpio0, GPIO(BANK_B, 5), 1);
  63. }
  64. #endif