evm.c 8.6 KB

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  1. /*
  2. * (C) Copyright 2004-2011
  3. * Texas Instruments, <www.ti.com>
  4. *
  5. * Author :
  6. * Manikandan Pillai <mani.pillai@ti.com>
  7. *
  8. * Derived from Beagle Board and 3430 SDP code by
  9. * Richard Woodruff <r-woodruff2@ti.com>
  10. * Syed Mohammed Khasim <khasim@ti.com>
  11. *
  12. * SPDX-License-Identifier: GPL-2.0+
  13. */
  14. #include <common.h>
  15. #include <dm.h>
  16. #include <ns16550.h>
  17. #include <netdev.h>
  18. #include <asm/io.h>
  19. #include <asm/arch/mem.h>
  20. #include <asm/arch/mux.h>
  21. #include <asm/arch/sys_proto.h>
  22. #include <asm/arch/mmc_host_def.h>
  23. #include <asm/gpio.h>
  24. #include <i2c.h>
  25. #include <twl4030.h>
  26. #include <asm/mach-types.h>
  27. #include <asm/omap_musb.h>
  28. #include <linux/mtd/rawnand.h>
  29. #include <linux/usb/ch9.h>
  30. #include <linux/usb/gadget.h>
  31. #include <linux/usb/musb.h>
  32. #include "evm.h"
  33. #ifdef CONFIG_USB_EHCI_HCD
  34. #include <usb.h>
  35. #include <asm/ehci-omap.h>
  36. #endif
  37. #define OMAP3EVM_GPIO_ETH_RST_GEN1 64
  38. #define OMAP3EVM_GPIO_ETH_RST_GEN2 7
  39. DECLARE_GLOBAL_DATA_PTR;
  40. static const struct ns16550_platdata omap3_evm_serial = {
  41. .base = OMAP34XX_UART1,
  42. .reg_shift = 2,
  43. .clock = V_NS16550_CLK,
  44. .fcr = UART_FCR_DEFVAL,
  45. };
  46. U_BOOT_DEVICE(omap3_evm_uart) = {
  47. "ns16550_serial",
  48. &omap3_evm_serial
  49. };
  50. static u32 omap3_evm_version;
  51. u32 get_omap3_evm_rev(void)
  52. {
  53. return omap3_evm_version;
  54. }
  55. static void omap3_evm_get_revision(void)
  56. {
  57. #if defined(CONFIG_CMD_NET)
  58. /*
  59. * Board revision can be ascertained only by identifying
  60. * the Ethernet chipset.
  61. */
  62. unsigned int smsc_id;
  63. /* Ethernet PHY ID is stored at ID_REV register */
  64. smsc_id = readl(CONFIG_SMC911X_BASE + 0x50) & 0xFFFF0000;
  65. printf("Read back SMSC id 0x%x\n", smsc_id);
  66. switch (smsc_id) {
  67. /* SMSC9115 chipset */
  68. case 0x01150000:
  69. omap3_evm_version = OMAP3EVM_BOARD_GEN_1;
  70. break;
  71. /* SMSC 9220 chipset */
  72. case 0x92200000:
  73. default:
  74. omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
  75. }
  76. #else /* !CONFIG_CMD_NET */
  77. #if defined(CONFIG_STATIC_BOARD_REV)
  78. /* Look for static defintion of the board revision */
  79. omap3_evm_version = CONFIG_STATIC_BOARD_REV;
  80. #else
  81. /* Fallback to the default above */
  82. omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
  83. #endif /* CONFIG_STATIC_BOARD_REV */
  84. #endif /* CONFIG_CMD_NET */
  85. }
  86. #if defined(CONFIG_USB_MUSB_GADGET) || defined(CONFIG_USB_MUSB_HOST)
  87. /* MUSB port on OMAP3EVM Rev >= E requires extvbus programming. */
  88. u8 omap3_evm_need_extvbus(void)
  89. {
  90. u8 retval = 0;
  91. if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
  92. retval = 1;
  93. return retval;
  94. }
  95. #endif /* CONFIG_USB_MUSB_{GADGET,HOST} */
  96. /*
  97. * Routine: board_init
  98. * Description: Early hardware init.
  99. */
  100. int board_init(void)
  101. {
  102. gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
  103. /* board id for Linux */
  104. gd->bd->bi_arch_number = MACH_TYPE_OMAP3EVM;
  105. /* boot param addr */
  106. gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
  107. return 0;
  108. }
  109. #if defined(CONFIG_SPL_OS_BOOT)
  110. int spl_start_uboot(void)
  111. {
  112. /* break into full u-boot on 'c' */
  113. if (serial_tstc() && serial_getc() == 'c')
  114. return 1;
  115. return 0;
  116. }
  117. #endif /* CONFIG_SPL_OS_BOOT */
  118. #if defined(CONFIG_SPL_BUILD)
  119. /*
  120. * Routine: get_board_mem_timings
  121. * Description: If we use SPL then there is no x-loader nor config header
  122. * so we have to setup the DDR timings ourself on the first bank. This
  123. * provides the timing values back to the function that configures
  124. * the memory.
  125. */
  126. void get_board_mem_timings(struct board_sdrc_timings *timings)
  127. {
  128. int pop_mfr, pop_id;
  129. /*
  130. * We need to identify what PoP memory is on the board so that
  131. * we know what timings to use. To map the ID values please see
  132. * nand_ids.c
  133. */
  134. identify_nand_chip(&pop_mfr, &pop_id);
  135. if (pop_mfr == NAND_MFR_HYNIX && pop_id == 0xbc) {
  136. /* 256MB DDR */
  137. timings->mcfg = HYNIX_V_MCFG_200(256 << 20);
  138. timings->ctrla = HYNIX_V_ACTIMA_200;
  139. timings->ctrlb = HYNIX_V_ACTIMB_200;
  140. } else {
  141. /* 128MB DDR */
  142. timings->mcfg = MICRON_V_MCFG_165(128 << 20);
  143. timings->ctrla = MICRON_V_ACTIMA_165;
  144. timings->ctrlb = MICRON_V_ACTIMB_165;
  145. }
  146. timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
  147. timings->mr = MICRON_V_MR_165;
  148. }
  149. #endif /* CONFIG_SPL_BUILD */
  150. #if defined(CONFIG_USB_MUSB_OMAP2PLUS)
  151. static struct musb_hdrc_config musb_config = {
  152. .multipoint = 1,
  153. .dyn_fifo = 1,
  154. .num_eps = 16,
  155. .ram_bits = 12,
  156. };
  157. static struct omap_musb_board_data musb_board_data = {
  158. .interface_type = MUSB_INTERFACE_ULPI,
  159. };
  160. static struct musb_hdrc_platform_data musb_plat = {
  161. #if defined(CONFIG_USB_MUSB_HOST)
  162. .mode = MUSB_HOST,
  163. #elif defined(CONFIG_USB_MUSB_GADGET)
  164. .mode = MUSB_PERIPHERAL,
  165. #else
  166. #error "Please define either CONFIG_USB_MUSB_HOST or CONFIG_USB_MUSB_GADGET"
  167. #endif /* CONFIG_USB_MUSB_{GADGET,HOST} */
  168. .config = &musb_config,
  169. .power = 100,
  170. .platform_ops = &omap2430_ops,
  171. .board_data = &musb_board_data,
  172. };
  173. #endif /* CONFIG_USB_MUSB_OMAP2PLUS */
  174. /*
  175. * Routine: misc_init_r
  176. * Description: Init ethernet (done here so udelay works)
  177. */
  178. int misc_init_r(void)
  179. {
  180. twl4030_power_init();
  181. #ifdef CONFIG_SYS_I2C_OMAP24XX
  182. i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
  183. #endif
  184. #if defined(CONFIG_CMD_NET)
  185. setup_net_chip();
  186. #endif
  187. omap3_evm_get_revision();
  188. #if defined(CONFIG_CMD_NET)
  189. reset_net_chip();
  190. #endif
  191. omap_die_id_display();
  192. #if defined(CONFIG_USB_MUSB_OMAP2PLUS)
  193. musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE);
  194. #endif
  195. #if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET)
  196. omap_die_id_usbethaddr();
  197. #endif
  198. return 0;
  199. }
  200. /*
  201. * Routine: set_muxconf_regs
  202. * Description: Setting up the configuration Mux registers specific to the
  203. * hardware. Many pins need to be moved from protect to primary
  204. * mode.
  205. */
  206. void set_muxconf_regs(void)
  207. {
  208. MUX_EVM();
  209. }
  210. #if defined(CONFIG_CMD_NET)
  211. /*
  212. * Routine: setup_net_chip
  213. * Description: Setting up the configuration GPMC registers specific to the
  214. * Ethernet hardware.
  215. */
  216. static void setup_net_chip(void)
  217. {
  218. struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
  219. /* Configure GPMC registers */
  220. writel(NET_GPMC_CONFIG1, &gpmc_cfg->cs[5].config1);
  221. writel(NET_GPMC_CONFIG2, &gpmc_cfg->cs[5].config2);
  222. writel(NET_GPMC_CONFIG3, &gpmc_cfg->cs[5].config3);
  223. writel(NET_GPMC_CONFIG4, &gpmc_cfg->cs[5].config4);
  224. writel(NET_GPMC_CONFIG5, &gpmc_cfg->cs[5].config5);
  225. writel(NET_GPMC_CONFIG6, &gpmc_cfg->cs[5].config6);
  226. writel(NET_GPMC_CONFIG7, &gpmc_cfg->cs[5].config7);
  227. /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
  228. writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
  229. /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
  230. writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
  231. /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
  232. writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
  233. &ctrl_base->gpmc_nadv_ale);
  234. }
  235. /**
  236. * Reset the ethernet chip.
  237. */
  238. static void reset_net_chip(void)
  239. {
  240. int ret;
  241. int rst_gpio;
  242. if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1) {
  243. rst_gpio = OMAP3EVM_GPIO_ETH_RST_GEN1;
  244. } else {
  245. rst_gpio = OMAP3EVM_GPIO_ETH_RST_GEN2;
  246. }
  247. ret = gpio_request(rst_gpio, "");
  248. if (ret < 0) {
  249. printf("Unable to get GPIO %d\n", rst_gpio);
  250. return ;
  251. }
  252. /* Configure as output */
  253. gpio_direction_output(rst_gpio, 0);
  254. /* Send a pulse on the GPIO pin */
  255. gpio_set_value(rst_gpio, 1);
  256. udelay(1);
  257. gpio_set_value(rst_gpio, 0);
  258. udelay(1);
  259. gpio_set_value(rst_gpio, 1);
  260. }
  261. int board_eth_init(bd_t *bis)
  262. {
  263. int rc = 0;
  264. #if defined(CONFIG_SMC911X)
  265. #define STR_ENV_ETHADDR "ethaddr"
  266. struct eth_device *dev;
  267. uchar eth_addr[6];
  268. rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
  269. if (!eth_env_get_enetaddr(STR_ENV_ETHADDR, eth_addr)) {
  270. dev = eth_get_dev_by_index(0);
  271. if (dev) {
  272. eth_env_set_enetaddr(STR_ENV_ETHADDR, dev->enetaddr);
  273. } else {
  274. printf("omap3evm: Couldn't get eth device\n");
  275. rc = -1;
  276. }
  277. }
  278. #endif /* CONFIG_SMC911X */
  279. return rc;
  280. }
  281. #endif /* CONFIG_CMD_NET */
  282. #if defined(CONFIG_MMC)
  283. int board_mmc_init(bd_t *bis)
  284. {
  285. return omap_mmc_init(0, 0, 0, -1, -1);
  286. }
  287. void board_mmc_power_init(void)
  288. {
  289. twl4030_power_mmc_init(0);
  290. }
  291. #endif /* CONFIG_MMC */
  292. #if defined(CONFIG_USB_EHCI_HCD) && !defined(CONFIG_SPL_BUILD)
  293. /* Call usb_stop() before starting the kernel */
  294. void show_boot_progress(int val)
  295. {
  296. if (val == BOOTSTAGE_ID_RUN_OS)
  297. usb_stop();
  298. }
  299. static struct omap_usbhs_board_data usbhs_bdata = {
  300. .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
  301. .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
  302. .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
  303. };
  304. int ehci_hcd_init(int index, enum usb_init_type init,
  305. struct ehci_hccr **hccr, struct ehci_hcor **hcor)
  306. {
  307. return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
  308. }
  309. int ehci_hcd_stop(int index)
  310. {
  311. return omap_ehci_hcd_stop();
  312. }
  313. #endif /* CONFIG_USB_EHCI_HCD */
  314. #if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET) && !defined(CONFIG_CMD_NET)
  315. int board_eth_init(bd_t *bis)
  316. {
  317. return usb_eth_initialize(bis);
  318. }
  319. #endif /* CONFIG_USB_ETHER */