board_f.c 25 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071
  1. /*
  2. * Copyright (c) 2011 The Chromium OS Authors.
  3. * (C) Copyright 2002-2006
  4. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  5. *
  6. * (C) Copyright 2002
  7. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  8. * Marius Groeger <mgroeger@sysgo.de>
  9. *
  10. * SPDX-License-Identifier: GPL-2.0+
  11. */
  12. #include <common.h>
  13. #include <linux/compiler.h>
  14. #include <version.h>
  15. #include <environment.h>
  16. #include <fdtdec.h>
  17. #include <fs.h>
  18. #if defined(CONFIG_CMD_IDE)
  19. #include <ide.h>
  20. #endif
  21. #include <i2c.h>
  22. #include <initcall.h>
  23. #include <logbuff.h>
  24. /* TODO: Can we move these into arch/ headers? */
  25. #ifdef CONFIG_8xx
  26. #include <mpc8xx.h>
  27. #endif
  28. #ifdef CONFIG_5xx
  29. #include <mpc5xx.h>
  30. #endif
  31. #ifdef CONFIG_MPC5xxx
  32. #include <mpc5xxx.h>
  33. #endif
  34. #include <os.h>
  35. #include <post.h>
  36. #include <spi.h>
  37. #include <trace.h>
  38. #include <watchdog.h>
  39. #include <asm/errno.h>
  40. #include <asm/io.h>
  41. #ifdef CONFIG_MP
  42. #include <asm/mp.h>
  43. #endif
  44. #include <asm/sections.h>
  45. #ifdef CONFIG_X86
  46. #include <asm/init_helpers.h>
  47. #include <asm/relocate.h>
  48. #endif
  49. #ifdef CONFIG_SANDBOX
  50. #include <asm/state.h>
  51. #endif
  52. #include <linux/compiler.h>
  53. /*
  54. * Pointer to initial global data area
  55. *
  56. * Here we initialize it if needed.
  57. */
  58. #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
  59. #undef XTRN_DECLARE_GLOBAL_DATA_PTR
  60. #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
  61. DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
  62. #else
  63. DECLARE_GLOBAL_DATA_PTR;
  64. #endif
  65. /*
  66. * sjg: IMO this code should be
  67. * refactored to a single function, something like:
  68. *
  69. * void led_set_state(enum led_colour_t colour, int on);
  70. */
  71. /************************************************************************
  72. * Coloured LED functionality
  73. ************************************************************************
  74. * May be supplied by boards if desired
  75. */
  76. inline void __coloured_LED_init(void) {}
  77. void coloured_LED_init(void)
  78. __attribute__((weak, alias("__coloured_LED_init")));
  79. inline void __red_led_on(void) {}
  80. void red_led_on(void) __attribute__((weak, alias("__red_led_on")));
  81. inline void __red_led_off(void) {}
  82. void red_led_off(void) __attribute__((weak, alias("__red_led_off")));
  83. inline void __green_led_on(void) {}
  84. void green_led_on(void) __attribute__((weak, alias("__green_led_on")));
  85. inline void __green_led_off(void) {}
  86. void green_led_off(void) __attribute__((weak, alias("__green_led_off")));
  87. inline void __yellow_led_on(void) {}
  88. void yellow_led_on(void) __attribute__((weak, alias("__yellow_led_on")));
  89. inline void __yellow_led_off(void) {}
  90. void yellow_led_off(void) __attribute__((weak, alias("__yellow_led_off")));
  91. inline void __blue_led_on(void) {}
  92. void blue_led_on(void) __attribute__((weak, alias("__blue_led_on")));
  93. inline void __blue_led_off(void) {}
  94. void blue_led_off(void) __attribute__((weak, alias("__blue_led_off")));
  95. /*
  96. * Why is gd allocated a register? Prior to reloc it might be better to
  97. * just pass it around to each function in this file?
  98. *
  99. * After reloc one could argue that it is hardly used and doesn't need
  100. * to be in a register. Or if it is it should perhaps hold pointers to all
  101. * global data for all modules, so that post-reloc we can avoid the massive
  102. * literal pool we get on ARM. Or perhaps just encourage each module to use
  103. * a structure...
  104. */
  105. /*
  106. * Could the CONFIG_SPL_BUILD infection become a flag in gd?
  107. */
  108. #if defined(CONFIG_WATCHDOG)
  109. static int init_func_watchdog_init(void)
  110. {
  111. puts(" Watchdog enabled\n");
  112. WATCHDOG_RESET();
  113. return 0;
  114. }
  115. int init_func_watchdog_reset(void)
  116. {
  117. WATCHDOG_RESET();
  118. return 0;
  119. }
  120. #endif /* CONFIG_WATCHDOG */
  121. void __board_add_ram_info(int use_default)
  122. {
  123. /* please define platform specific board_add_ram_info() */
  124. }
  125. void board_add_ram_info(int)
  126. __attribute__ ((weak, alias("__board_add_ram_info")));
  127. static int init_baud_rate(void)
  128. {
  129. gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
  130. return 0;
  131. }
  132. static int display_text_info(void)
  133. {
  134. #ifndef CONFIG_SANDBOX
  135. ulong bss_start, bss_end;
  136. #ifdef CONFIG_SYS_SYM_OFFSETS
  137. bss_start = _bss_start_ofs + _TEXT_BASE;
  138. bss_end = _bss_end_ofs + _TEXT_BASE;
  139. #else
  140. bss_start = (ulong)&__bss_start;
  141. bss_end = (ulong)&__bss_end;
  142. #endif
  143. debug("U-Boot code: %08X -> %08lX BSS: -> %08lX\n",
  144. CONFIG_SYS_TEXT_BASE, bss_start, bss_end);
  145. #endif
  146. #ifdef CONFIG_MODEM_SUPPORT
  147. debug("Modem Support enabled\n");
  148. #endif
  149. #ifdef CONFIG_USE_IRQ
  150. debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
  151. debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
  152. #endif
  153. return 0;
  154. }
  155. static int announce_dram_init(void)
  156. {
  157. puts("DRAM: ");
  158. return 0;
  159. }
  160. #ifdef CONFIG_PPC
  161. static int init_func_ram(void)
  162. {
  163. #ifdef CONFIG_BOARD_TYPES
  164. int board_type = gd->board_type;
  165. #else
  166. int board_type = 0; /* use dummy arg */
  167. #endif
  168. gd->ram_size = initdram(board_type);
  169. if (gd->ram_size > 0)
  170. return 0;
  171. puts("*** failed ***\n");
  172. return 1;
  173. }
  174. #endif
  175. static int show_dram_config(void)
  176. {
  177. ulong size;
  178. #ifdef CONFIG_NR_DRAM_BANKS
  179. int i;
  180. debug("\nRAM Configuration:\n");
  181. for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
  182. size += gd->bd->bi_dram[i].size;
  183. debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
  184. #ifdef DEBUG
  185. print_size(gd->bd->bi_dram[i].size, "\n");
  186. #endif
  187. }
  188. debug("\nDRAM: ");
  189. #else
  190. size = gd->ram_size;
  191. #endif
  192. print_size(size, "");
  193. board_add_ram_info(0);
  194. putc('\n');
  195. return 0;
  196. }
  197. ulong get_effective_memsize(void)
  198. {
  199. #ifndef CONFIG_VERY_BIG_RAM
  200. return gd->ram_size;
  201. #else
  202. /* limit stack to what we can reasonable map */
  203. return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ?
  204. CONFIG_MAX_MEM_MAPPED : gd->ram_size);
  205. #endif
  206. }
  207. void __dram_init_banksize(void)
  208. {
  209. #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
  210. gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
  211. gd->bd->bi_dram[0].size = get_effective_memsize();
  212. #endif
  213. }
  214. void dram_init_banksize(void)
  215. __attribute__((weak, alias("__dram_init_banksize")));
  216. #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
  217. static int init_func_i2c(void)
  218. {
  219. puts("I2C: ");
  220. #ifdef CONFIG_SYS_I2C
  221. i2c_init_all();
  222. #else
  223. i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  224. #endif
  225. puts("ready\n");
  226. return 0;
  227. }
  228. #endif
  229. #if defined(CONFIG_HARD_SPI)
  230. static int init_func_spi(void)
  231. {
  232. puts("SPI: ");
  233. spi_init();
  234. puts("ready\n");
  235. return 0;
  236. }
  237. #endif
  238. __maybe_unused
  239. static int zero_global_data(void)
  240. {
  241. memset((void *)gd, '\0', sizeof(gd_t));
  242. return 0;
  243. }
  244. static int setup_mon_len(void)
  245. {
  246. #ifdef CONFIG_SYS_SYM_OFFSETS
  247. gd->mon_len = _bss_end_ofs;
  248. #elif defined(CONFIG_SANDBOX)
  249. gd->mon_len = (ulong)&_end - (ulong)_init;
  250. #else
  251. /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
  252. gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
  253. #endif
  254. return 0;
  255. }
  256. __weak int arch_cpu_init(void)
  257. {
  258. return 0;
  259. }
  260. #ifdef CONFIG_OF_HOSTFILE
  261. #define CHECK(x) err = (x); if (err) goto failed;
  262. /* Create an empty device tree blob */
  263. static int make_empty_fdt(void *fdt)
  264. {
  265. int err;
  266. CHECK(fdt_create(fdt, 256));
  267. CHECK(fdt_finish_reservemap(fdt));
  268. CHECK(fdt_begin_node(fdt, ""));
  269. CHECK(fdt_end_node(fdt));
  270. CHECK(fdt_finish(fdt));
  271. return 0;
  272. failed:
  273. printf("Unable to create empty FDT: %s\n", fdt_strerror(err));
  274. return -EACCES;
  275. }
  276. static int read_fdt_from_file(void)
  277. {
  278. struct sandbox_state *state = state_get_current();
  279. void *blob;
  280. int size;
  281. int err;
  282. blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0);
  283. if (!state->fdt_fname) {
  284. err = make_empty_fdt(blob);
  285. if (!err)
  286. goto done;
  287. return err;
  288. }
  289. err = fs_set_blk_dev("host", NULL, FS_TYPE_SANDBOX);
  290. if (err)
  291. return err;
  292. size = fs_read(state->fdt_fname, CONFIG_SYS_FDT_LOAD_ADDR, 0, 0);
  293. if (size < 0)
  294. return -EIO;
  295. done:
  296. gd->fdt_blob = blob;
  297. return 0;
  298. }
  299. #endif
  300. #ifdef CONFIG_SANDBOX
  301. static int setup_ram_buf(void)
  302. {
  303. struct sandbox_state *state = state_get_current();
  304. gd->arch.ram_buf = state->ram_buf;
  305. gd->ram_size = state->ram_size;
  306. return 0;
  307. }
  308. #endif
  309. static int setup_fdt(void)
  310. {
  311. #ifdef CONFIG_OF_EMBED
  312. /* Get a pointer to the FDT */
  313. gd->fdt_blob = __dtb_dt_begin;
  314. #elif defined CONFIG_OF_SEPARATE
  315. /* FDT is at end of image */
  316. # ifdef CONFIG_SYS_SYM_OFFSETS
  317. gd->fdt_blob = (void *)(_end_ofs + CONFIG_SYS_TEXT_BASE);
  318. # else
  319. gd->fdt_blob = (ulong *)&_end;
  320. # endif
  321. #elif defined(CONFIG_OF_HOSTFILE)
  322. if (read_fdt_from_file()) {
  323. puts("Failed to read control FDT\n");
  324. return -1;
  325. }
  326. #endif
  327. /* Allow the early environment to override the fdt address */
  328. gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
  329. (uintptr_t)gd->fdt_blob);
  330. return 0;
  331. }
  332. /* Get the top of usable RAM */
  333. __weak ulong board_get_usable_ram_top(ulong total_size)
  334. {
  335. return gd->ram_top;
  336. }
  337. static int setup_dest_addr(void)
  338. {
  339. debug("Monitor len: %08lX\n", gd->mon_len);
  340. /*
  341. * Ram is setup, size stored in gd !!
  342. */
  343. debug("Ram size: %08lX\n", (ulong)gd->ram_size);
  344. #if defined(CONFIG_SYS_MEM_TOP_HIDE)
  345. /*
  346. * Subtract specified amount of memory to hide so that it won't
  347. * get "touched" at all by U-Boot. By fixing up gd->ram_size
  348. * the Linux kernel should now get passed the now "corrected"
  349. * memory size and won't touch it either. This should work
  350. * for arch/ppc and arch/powerpc. Only Linux board ports in
  351. * arch/powerpc with bootwrapper support, that recalculate the
  352. * memory size from the SDRAM controller setup will have to
  353. * get fixed.
  354. */
  355. gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
  356. #endif
  357. #ifdef CONFIG_SYS_SDRAM_BASE
  358. gd->ram_top = CONFIG_SYS_SDRAM_BASE;
  359. #endif
  360. gd->ram_top += get_effective_memsize();
  361. gd->ram_top = board_get_usable_ram_top(gd->mon_len);
  362. gd->relocaddr = gd->ram_top;
  363. debug("Ram top: %08lX\n", (ulong)gd->ram_top);
  364. #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
  365. /*
  366. * We need to make sure the location we intend to put secondary core
  367. * boot code is reserved and not used by any part of u-boot
  368. */
  369. if (gd->relocaddr > determine_mp_bootpg(NULL)) {
  370. gd->relocaddr = determine_mp_bootpg(NULL);
  371. debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
  372. }
  373. #endif
  374. return 0;
  375. }
  376. #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
  377. static int reserve_logbuffer(void)
  378. {
  379. /* reserve kernel log buffer */
  380. gd->relocaddr -= LOGBUFF_RESERVE;
  381. debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
  382. gd->relocaddr);
  383. return 0;
  384. }
  385. #endif
  386. #ifdef CONFIG_PRAM
  387. /* reserve protected RAM */
  388. static int reserve_pram(void)
  389. {
  390. ulong reg;
  391. reg = getenv_ulong("pram", 10, CONFIG_PRAM);
  392. gd->relocaddr -= (reg << 10); /* size is in kB */
  393. debug("Reserving %ldk for protected RAM at %08lx\n", reg,
  394. gd->relocaddr);
  395. return 0;
  396. }
  397. #endif /* CONFIG_PRAM */
  398. /* Round memory pointer down to next 4 kB limit */
  399. static int reserve_round_4k(void)
  400. {
  401. gd->relocaddr &= ~(4096 - 1);
  402. return 0;
  403. }
  404. #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
  405. defined(CONFIG_ARM)
  406. static int reserve_mmu(void)
  407. {
  408. /* reserve TLB table */
  409. gd->arch.tlb_size = PGTABLE_SIZE;
  410. gd->relocaddr -= gd->arch.tlb_size;
  411. /* round down to next 64 kB limit */
  412. gd->relocaddr &= ~(0x10000 - 1);
  413. gd->arch.tlb_addr = gd->relocaddr;
  414. debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
  415. gd->arch.tlb_addr + gd->arch.tlb_size);
  416. return 0;
  417. }
  418. #endif
  419. #ifdef CONFIG_LCD
  420. static int reserve_lcd(void)
  421. {
  422. #ifdef CONFIG_FB_ADDR
  423. gd->fb_base = CONFIG_FB_ADDR;
  424. #else
  425. /* reserve memory for LCD display (always full pages) */
  426. gd->relocaddr = lcd_setmem(gd->relocaddr);
  427. gd->fb_base = gd->relocaddr;
  428. #endif /* CONFIG_FB_ADDR */
  429. return 0;
  430. }
  431. #endif /* CONFIG_LCD */
  432. static int reserve_trace(void)
  433. {
  434. #ifdef CONFIG_TRACE
  435. gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
  436. gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
  437. debug("Reserving %dk for trace data at: %08lx\n",
  438. CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
  439. #endif
  440. return 0;
  441. }
  442. #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
  443. && !defined(CONFIG_ARM) && !defined(CONFIG_X86)
  444. static int reserve_video(void)
  445. {
  446. /* reserve memory for video display (always full pages) */
  447. gd->relocaddr = video_setmem(gd->relocaddr);
  448. gd->fb_base = gd->relocaddr;
  449. return 0;
  450. }
  451. #endif
  452. static int reserve_uboot(void)
  453. {
  454. /*
  455. * reserve memory for U-Boot code, data & bss
  456. * round down to next 4 kB limit
  457. */
  458. gd->relocaddr -= gd->mon_len;
  459. gd->relocaddr &= ~(4096 - 1);
  460. #ifdef CONFIG_E500
  461. /* round down to next 64 kB limit so that IVPR stays aligned */
  462. gd->relocaddr &= ~(65536 - 1);
  463. #endif
  464. debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
  465. gd->relocaddr);
  466. gd->start_addr_sp = gd->relocaddr;
  467. return 0;
  468. }
  469. #ifndef CONFIG_SPL_BUILD
  470. /* reserve memory for malloc() area */
  471. static int reserve_malloc(void)
  472. {
  473. gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
  474. debug("Reserving %dk for malloc() at: %08lx\n",
  475. TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
  476. return 0;
  477. }
  478. /* (permanently) allocate a Board Info struct */
  479. static int reserve_board(void)
  480. {
  481. gd->start_addr_sp -= sizeof(bd_t);
  482. gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
  483. memset(gd->bd, '\0', sizeof(bd_t));
  484. debug("Reserving %zu Bytes for Board Info at: %08lx\n",
  485. sizeof(bd_t), gd->start_addr_sp);
  486. return 0;
  487. }
  488. #endif
  489. static int setup_machine(void)
  490. {
  491. #ifdef CONFIG_MACH_TYPE
  492. gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
  493. #endif
  494. return 0;
  495. }
  496. static int reserve_global_data(void)
  497. {
  498. gd->start_addr_sp -= sizeof(gd_t);
  499. gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
  500. debug("Reserving %zu Bytes for Global Data at: %08lx\n",
  501. sizeof(gd_t), gd->start_addr_sp);
  502. return 0;
  503. }
  504. static int reserve_fdt(void)
  505. {
  506. /*
  507. * If the device tree is sitting immediate above our image then we
  508. * must relocate it. If it is embedded in the data section, then it
  509. * will be relocated with other data.
  510. */
  511. if (gd->fdt_blob) {
  512. gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
  513. gd->start_addr_sp -= gd->fdt_size;
  514. gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
  515. debug("Reserving %lu Bytes for FDT at: %08lx\n",
  516. gd->fdt_size, gd->start_addr_sp);
  517. }
  518. return 0;
  519. }
  520. static int reserve_stacks(void)
  521. {
  522. #ifdef CONFIG_SPL_BUILD
  523. # ifdef CONFIG_ARM
  524. gd->start_addr_sp -= 128; /* leave 32 words for abort-stack */
  525. gd->irq_sp = gd->start_addr_sp;
  526. # endif
  527. #else
  528. # ifdef CONFIG_PPC
  529. ulong *s;
  530. # endif
  531. /* setup stack pointer for exceptions */
  532. gd->start_addr_sp -= 16;
  533. gd->start_addr_sp &= ~0xf;
  534. gd->irq_sp = gd->start_addr_sp;
  535. /*
  536. * Handle architecture-specific things here
  537. * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack()
  538. * to handle this and put in arch/xxx/lib/stack.c
  539. */
  540. # if defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
  541. # ifdef CONFIG_USE_IRQ
  542. gd->start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);
  543. debug("Reserving %zu Bytes for IRQ stack at: %08lx\n",
  544. CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->start_addr_sp);
  545. /* 8-byte alignment for ARM ABI compliance */
  546. gd->start_addr_sp &= ~0x07;
  547. # endif
  548. /* leave 3 words for abort-stack, plus 1 for alignment */
  549. gd->start_addr_sp -= 16;
  550. # elif defined(CONFIG_PPC)
  551. /* Clear initial stack frame */
  552. s = (ulong *) gd->start_addr_sp;
  553. *s = 0; /* Terminate back chain */
  554. *++s = 0; /* NULL return address */
  555. # endif /* Architecture specific code */
  556. return 0;
  557. #endif
  558. }
  559. static int display_new_sp(void)
  560. {
  561. debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
  562. return 0;
  563. }
  564. #ifdef CONFIG_PPC
  565. static int setup_board_part1(void)
  566. {
  567. bd_t *bd = gd->bd;
  568. /*
  569. * Save local variables to board info struct
  570. */
  571. bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
  572. bd->bi_memsize = gd->ram_size; /* size in bytes */
  573. #ifdef CONFIG_SYS_SRAM_BASE
  574. bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
  575. bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
  576. #endif
  577. #if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
  578. defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
  579. bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
  580. #endif
  581. #if defined(CONFIG_MPC5xxx)
  582. bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
  583. #endif
  584. #if defined(CONFIG_MPC83xx)
  585. bd->bi_immrbar = CONFIG_SYS_IMMR;
  586. #endif
  587. return 0;
  588. }
  589. static int setup_board_part2(void)
  590. {
  591. bd_t *bd = gd->bd;
  592. bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
  593. bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
  594. #if defined(CONFIG_CPM2)
  595. bd->bi_cpmfreq = gd->arch.cpm_clk;
  596. bd->bi_brgfreq = gd->arch.brg_clk;
  597. bd->bi_sccfreq = gd->arch.scc_clk;
  598. bd->bi_vco = gd->arch.vco_out;
  599. #endif /* CONFIG_CPM2 */
  600. #if defined(CONFIG_MPC512X)
  601. bd->bi_ipsfreq = gd->arch.ips_clk;
  602. #endif /* CONFIG_MPC512X */
  603. #if defined(CONFIG_MPC5xxx)
  604. bd->bi_ipbfreq = gd->arch.ipb_clk;
  605. bd->bi_pcifreq = gd->pci_clk;
  606. #endif /* CONFIG_MPC5xxx */
  607. return 0;
  608. }
  609. #endif
  610. #ifdef CONFIG_SYS_EXTBDINFO
  611. static int setup_board_extra(void)
  612. {
  613. bd_t *bd = gd->bd;
  614. strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
  615. strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
  616. sizeof(bd->bi_r_version));
  617. bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
  618. bd->bi_plb_busfreq = gd->bus_clk;
  619. #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
  620. defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
  621. defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
  622. bd->bi_pci_busfreq = get_PCI_freq();
  623. bd->bi_opbfreq = get_OPB_freq();
  624. #elif defined(CONFIG_XILINX_405)
  625. bd->bi_pci_busfreq = get_PCI_freq();
  626. #endif
  627. return 0;
  628. }
  629. #endif
  630. #ifdef CONFIG_POST
  631. static int init_post(void)
  632. {
  633. post_bootmode_init();
  634. post_run(NULL, POST_ROM | post_bootmode_get(0));
  635. return 0;
  636. }
  637. #endif
  638. static int setup_baud_rate(void)
  639. {
  640. /* Ick, can we get rid of this line? */
  641. gd->bd->bi_baudrate = gd->baudrate;
  642. return 0;
  643. }
  644. static int setup_dram_config(void)
  645. {
  646. /* Ram is board specific, so move it to board code ... */
  647. dram_init_banksize();
  648. return 0;
  649. }
  650. static int reloc_fdt(void)
  651. {
  652. if (gd->new_fdt) {
  653. memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
  654. gd->fdt_blob = gd->new_fdt;
  655. }
  656. return 0;
  657. }
  658. static int setup_reloc(void)
  659. {
  660. gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
  661. memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
  662. debug("Relocation Offset is: %08lx\n", gd->reloc_off);
  663. debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
  664. gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
  665. gd->start_addr_sp);
  666. return 0;
  667. }
  668. /* ARM calls relocate_code from its crt0.S */
  669. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
  670. static int jump_to_copy(void)
  671. {
  672. /*
  673. * x86 is special, but in a nice way. It uses a trampoline which
  674. * enables the dcache if possible.
  675. *
  676. * For now, other archs use relocate_code(), which is implemented
  677. * similarly for all archs. When we do generic relocation, hopefully
  678. * we can make all archs enable the dcache prior to relocation.
  679. */
  680. #ifdef CONFIG_X86
  681. /*
  682. * SDRAM and console are now initialised. The final stack can now
  683. * be setup in SDRAM. Code execution will continue in Flash, but
  684. * with the stack in SDRAM and Global Data in temporary memory
  685. * (CPU cache)
  686. */
  687. board_init_f_r_trampoline(gd->start_addr_sp);
  688. #else
  689. relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
  690. #endif
  691. return 0;
  692. }
  693. #endif
  694. /* Record the board_init_f() bootstage (after arch_cpu_init()) */
  695. static int mark_bootstage(void)
  696. {
  697. bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
  698. return 0;
  699. }
  700. static init_fnc_t init_sequence_f[] = {
  701. #ifdef CONFIG_SANDBOX
  702. setup_ram_buf,
  703. #endif
  704. setup_mon_len,
  705. setup_fdt,
  706. trace_early_init,
  707. #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
  708. /* TODO: can this go into arch_cpu_init()? */
  709. probecpu,
  710. #endif
  711. arch_cpu_init, /* basic arch cpu dependent setup */
  712. #ifdef CONFIG_X86
  713. cpu_init_f, /* TODO(sjg@chromium.org): remove */
  714. # ifdef CONFIG_OF_CONTROL
  715. find_fdt, /* TODO(sjg@chromium.org): remove */
  716. # endif
  717. #endif
  718. mark_bootstage,
  719. #ifdef CONFIG_OF_CONTROL
  720. fdtdec_check_fdt,
  721. #endif
  722. #if defined(CONFIG_BOARD_EARLY_INIT_F)
  723. board_early_init_f,
  724. #endif
  725. /* TODO: can any of this go into arch_cpu_init()? */
  726. #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
  727. get_clocks, /* get CPU and bus clocks (etc.) */
  728. #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
  729. && !defined(CONFIG_TQM885D)
  730. adjust_sdram_tbs_8xx,
  731. #endif
  732. /* TODO: can we rename this to timer_init()? */
  733. init_timebase,
  734. #endif
  735. #ifdef CONFIG_ARM
  736. timer_init, /* initialize timer */
  737. #endif
  738. #ifdef CONFIG_SYS_ALLOC_DPRAM
  739. #if !defined(CONFIG_CPM2)
  740. dpram_init,
  741. #endif
  742. #endif
  743. #if defined(CONFIG_BOARD_POSTCLK_INIT)
  744. board_postclk_init,
  745. #endif
  746. #ifdef CONFIG_FSL_ESDHC
  747. get_clocks,
  748. #endif
  749. env_init, /* initialize environment */
  750. #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
  751. /* get CPU and bus clocks according to the environment variable */
  752. get_clocks_866,
  753. /* adjust sdram refresh rate according to the new clock */
  754. sdram_adjust_866,
  755. init_timebase,
  756. #endif
  757. init_baud_rate, /* initialze baudrate settings */
  758. serial_init, /* serial communications setup */
  759. console_init_f, /* stage 1 init of console */
  760. #ifdef CONFIG_SANDBOX
  761. sandbox_early_getopt_check,
  762. #endif
  763. #ifdef CONFIG_OF_CONTROL
  764. fdtdec_prepare_fdt,
  765. #endif
  766. display_options, /* say that we are here */
  767. display_text_info, /* show debugging info if required */
  768. #if defined(CONFIG_8260)
  769. prt_8260_rsr,
  770. prt_8260_clks,
  771. #endif /* CONFIG_8260 */
  772. #if defined(CONFIG_MPC83xx)
  773. prt_83xx_rsr,
  774. #endif
  775. #ifdef CONFIG_PPC
  776. checkcpu,
  777. #endif
  778. #if defined(CONFIG_DISPLAY_CPUINFO)
  779. print_cpuinfo, /* display cpu info (and speed) */
  780. #endif
  781. #if defined(CONFIG_MPC5xxx)
  782. prt_mpc5xxx_clks,
  783. #endif /* CONFIG_MPC5xxx */
  784. #if defined(CONFIG_DISPLAY_BOARDINFO)
  785. checkboard, /* display board info */
  786. #endif
  787. INIT_FUNC_WATCHDOG_INIT
  788. #if defined(CONFIG_MISC_INIT_F)
  789. misc_init_f,
  790. #endif
  791. INIT_FUNC_WATCHDOG_RESET
  792. #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
  793. init_func_i2c,
  794. #endif
  795. #if defined(CONFIG_HARD_SPI)
  796. init_func_spi,
  797. #endif
  798. #ifdef CONFIG_X86
  799. dram_init_f, /* configure available RAM banks */
  800. calculate_relocation_address,
  801. #endif
  802. announce_dram_init,
  803. /* TODO: unify all these dram functions? */
  804. #ifdef CONFIG_ARM
  805. dram_init, /* configure available RAM banks */
  806. #endif
  807. #ifdef CONFIG_PPC
  808. init_func_ram,
  809. #endif
  810. #ifdef CONFIG_POST
  811. post_init_f,
  812. #endif
  813. INIT_FUNC_WATCHDOG_RESET
  814. #if defined(CONFIG_SYS_DRAM_TEST)
  815. testdram,
  816. #endif /* CONFIG_SYS_DRAM_TEST */
  817. INIT_FUNC_WATCHDOG_RESET
  818. #ifdef CONFIG_POST
  819. init_post,
  820. #endif
  821. INIT_FUNC_WATCHDOG_RESET
  822. /*
  823. * Now that we have DRAM mapped and working, we can
  824. * relocate the code and continue running from DRAM.
  825. *
  826. * Reserve memory at end of RAM for (top down in that order):
  827. * - area that won't get touched by U-Boot and Linux (optional)
  828. * - kernel log buffer
  829. * - protected RAM
  830. * - LCD framebuffer
  831. * - monitor code
  832. * - board info struct
  833. */
  834. setup_dest_addr,
  835. #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
  836. reserve_logbuffer,
  837. #endif
  838. #ifdef CONFIG_PRAM
  839. reserve_pram,
  840. #endif
  841. reserve_round_4k,
  842. #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
  843. defined(CONFIG_ARM)
  844. reserve_mmu,
  845. #endif
  846. #ifdef CONFIG_LCD
  847. reserve_lcd,
  848. #endif
  849. reserve_trace,
  850. /* TODO: Why the dependency on CONFIG_8xx? */
  851. #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
  852. && !defined(CONFIG_ARM) && !defined(CONFIG_X86)
  853. reserve_video,
  854. #endif
  855. reserve_uboot,
  856. #ifndef CONFIG_SPL_BUILD
  857. reserve_malloc,
  858. reserve_board,
  859. #endif
  860. setup_machine,
  861. reserve_global_data,
  862. reserve_fdt,
  863. reserve_stacks,
  864. setup_dram_config,
  865. show_dram_config,
  866. #ifdef CONFIG_PPC
  867. setup_board_part1,
  868. INIT_FUNC_WATCHDOG_RESET
  869. setup_board_part2,
  870. #endif
  871. setup_baud_rate,
  872. display_new_sp,
  873. #ifdef CONFIG_SYS_EXTBDINFO
  874. setup_board_extra,
  875. #endif
  876. INIT_FUNC_WATCHDOG_RESET
  877. reloc_fdt,
  878. setup_reloc,
  879. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
  880. jump_to_copy,
  881. #endif
  882. NULL,
  883. };
  884. void board_init_f(ulong boot_flags)
  885. {
  886. #ifndef CONFIG_X86
  887. gd_t data;
  888. gd = &data;
  889. #endif
  890. /*
  891. * Clear global data before it is accessed at debug print
  892. * in initcall_run_list. Otherwise the debug print probably
  893. * get the wrong vaule of gd->have_console.
  894. */
  895. #if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \
  896. !defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \
  897. !defined(CONFIG_MPC86xx) && !defined(CONFIG_X86)
  898. zero_global_data();
  899. #endif
  900. gd->flags = boot_flags;
  901. gd->have_console = 0;
  902. if (initcall_run_list(init_sequence_f))
  903. hang();
  904. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
  905. /* NOTREACHED - jump_to_copy() does not return */
  906. hang();
  907. #endif
  908. }
  909. #ifdef CONFIG_X86
  910. /*
  911. * For now this code is only used on x86.
  912. *
  913. * init_sequence_f_r is the list of init functions which are run when
  914. * U-Boot is executing from Flash with a semi-limited 'C' environment.
  915. * The following limitations must be considered when implementing an
  916. * '_f_r' function:
  917. * - 'static' variables are read-only
  918. * - Global Data (gd->xxx) is read/write
  919. *
  920. * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
  921. * supported). It _should_, if possible, copy global data to RAM and
  922. * initialise the CPU caches (to speed up the relocation process)
  923. *
  924. * NOTE: At present only x86 uses this route, but it is intended that
  925. * all archs will move to this when generic relocation is implemented.
  926. */
  927. static init_fnc_t init_sequence_f_r[] = {
  928. init_cache_f_r,
  929. copy_uboot_to_ram,
  930. clear_bss,
  931. do_elf_reloc_fixups,
  932. NULL,
  933. };
  934. void board_init_f_r(void)
  935. {
  936. if (initcall_run_list(init_sequence_f_r))
  937. hang();
  938. /*
  939. * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
  940. * Transfer execution from Flash to RAM by calculating the address
  941. * of the in-RAM copy of board_init_r() and calling it
  942. */
  943. (board_init_r + gd->reloc_off)(gd, gd->relocaddr);
  944. /* NOTREACHED - board_init_r() does not return */
  945. hang();
  946. }
  947. #endif /* CONFIG_X86 */