hwinit-common.c 7.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. *
  4. * Common functions for OMAP4/5 based boards
  5. *
  6. * (C) Copyright 2010
  7. * Texas Instruments, <www.ti.com>
  8. *
  9. * Author :
  10. * Aneesh V <aneesh@ti.com>
  11. * Steve Sakoman <steve@sakoman.com>
  12. */
  13. #include <common.h>
  14. #include <debug_uart.h>
  15. #include <fdtdec.h>
  16. #include <init.h>
  17. #include <spl.h>
  18. #include <asm/arch/sys_proto.h>
  19. #include <linux/sizes.h>
  20. #include <asm/emif.h>
  21. #include <asm/omap_common.h>
  22. #include <linux/compiler.h>
  23. #include <asm/system.h>
  24. #include <dm/root.h>
  25. DECLARE_GLOBAL_DATA_PTR;
  26. void do_set_mux(u32 base, struct pad_conf_entry const *array, int size)
  27. {
  28. int i;
  29. struct pad_conf_entry *pad = (struct pad_conf_entry *) array;
  30. for (i = 0; i < size; i++, pad++)
  31. writew(pad->val, base + pad->offset);
  32. }
  33. static void set_mux_conf_regs(void)
  34. {
  35. switch (omap_hw_init_context()) {
  36. case OMAP_INIT_CONTEXT_SPL:
  37. set_muxconf_regs();
  38. break;
  39. case OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL:
  40. break;
  41. case OMAP_INIT_CONTEXT_UBOOT_FROM_NOR:
  42. case OMAP_INIT_CONTEXT_UBOOT_AFTER_CH:
  43. set_muxconf_regs();
  44. break;
  45. }
  46. }
  47. u32 cortex_rev(void)
  48. {
  49. unsigned int rev;
  50. /* Read Main ID Register (MIDR) */
  51. asm ("mrc p15, 0, %0, c0, c0, 0" : "=r" (rev));
  52. return rev;
  53. }
  54. static void omap_rev_string(void)
  55. {
  56. u32 omap_rev = omap_revision();
  57. u32 soc_variant = (omap_rev & 0xF0000000) >> 28;
  58. u32 omap_variant = (omap_rev & 0xFFFF0000) >> 16;
  59. u32 major_rev = (omap_rev & 0x00000F00) >> 8;
  60. u32 minor_rev = (omap_rev & 0x000000F0) >> 4;
  61. const char *sec_s, *package = NULL;
  62. switch (get_device_type()) {
  63. case TST_DEVICE:
  64. sec_s = "TST";
  65. break;
  66. case EMU_DEVICE:
  67. sec_s = "EMU";
  68. break;
  69. case HS_DEVICE:
  70. sec_s = "HS";
  71. break;
  72. case GP_DEVICE:
  73. sec_s = "GP";
  74. break;
  75. default:
  76. sec_s = "?";
  77. }
  78. #if defined(CONFIG_DRA7XX)
  79. if (is_dra76x()) {
  80. switch (omap_rev & 0xF) {
  81. case DRA762_ABZ_PACKAGE:
  82. package = "ABZ";
  83. break;
  84. case DRA762_ACD_PACKAGE:
  85. default:
  86. package = "ACD";
  87. break;
  88. }
  89. }
  90. #endif
  91. if (soc_variant)
  92. printf("OMAP");
  93. else
  94. printf("DRA");
  95. printf("%x-%s ES%x.%x", omap_variant, sec_s, major_rev, minor_rev);
  96. if (package)
  97. printf(" %s package\n", package);
  98. else
  99. puts("\n");
  100. }
  101. #ifdef CONFIG_SPL_BUILD
  102. void spl_display_print(void)
  103. {
  104. omap_rev_string();
  105. }
  106. #endif
  107. void __weak srcomp_enable(void)
  108. {
  109. }
  110. /**
  111. * do_board_detect() - Detect board description
  112. *
  113. * Function to detect board description. This is expected to be
  114. * overridden in the SoC family board file where desired.
  115. */
  116. void __weak do_board_detect(void)
  117. {
  118. }
  119. /**
  120. * vcores_init() - Assign omap_vcores based on board
  121. *
  122. * Function to pick the vcores based on board. This is expected to be
  123. * overridden in the SoC family board file where desired.
  124. */
  125. void __weak vcores_init(void)
  126. {
  127. }
  128. void s_init(void)
  129. {
  130. }
  131. /**
  132. * init_package_revision() - Initialize package revision
  133. *
  134. * Function to get the pacakage information. This is expected to be
  135. * overridden in the SoC family file where desired.
  136. */
  137. void __weak init_package_revision(void)
  138. {
  139. }
  140. /**
  141. * early_system_init - Does Early system initialization.
  142. *
  143. * Does early system init of watchdog, muxing, andclocks
  144. * Watchdog disable is done always. For the rest what gets done
  145. * depends on the boot mode in which this function is executed when
  146. * 1. SPL running from SRAM
  147. * 2. U-Boot running from FLASH
  148. * 3. U-Boot loaded to SDRAM by SPL
  149. * 4. U-Boot loaded to SDRAM by ROM code using the
  150. * Configuration Header feature
  151. * Please have a look at the respective functions to see what gets
  152. * done in each of these cases
  153. * This function is called with SRAM stack.
  154. */
  155. void early_system_init(void)
  156. {
  157. #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_MULTI_DTB_FIT)
  158. int ret;
  159. int rescan;
  160. #endif
  161. init_omap_revision();
  162. hw_data_init();
  163. init_package_revision();
  164. #ifdef CONFIG_SPL_BUILD
  165. if (warm_reset())
  166. force_emif_self_refresh();
  167. #endif
  168. watchdog_init();
  169. set_mux_conf_regs();
  170. #ifdef CONFIG_SPL_BUILD
  171. srcomp_enable();
  172. do_io_settings();
  173. #endif
  174. setup_early_clocks();
  175. #ifdef CONFIG_SPL_BUILD
  176. /*
  177. * Save the boot parameters passed from romcode.
  178. * We cannot delay the saving further than this,
  179. * to prevent overwrites.
  180. */
  181. save_omap_boot_params();
  182. spl_early_init();
  183. #endif
  184. do_board_detect();
  185. #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_MULTI_DTB_FIT)
  186. /*
  187. * Board detection has been done.
  188. * Let us see if another dtb wouldn't be a better match
  189. * for our board
  190. */
  191. ret = fdtdec_resetup(&rescan);
  192. if (!ret && rescan) {
  193. dm_uninit();
  194. dm_init_and_scan(true);
  195. }
  196. #endif
  197. vcores_init();
  198. #ifdef CONFIG_DEBUG_UART_OMAP
  199. debug_uart_init();
  200. #endif
  201. prcm_init();
  202. }
  203. #ifdef CONFIG_SPL_BUILD
  204. void board_init_f(ulong dummy)
  205. {
  206. early_system_init();
  207. #ifdef CONFIG_BOARD_EARLY_INIT_F
  208. board_early_init_f();
  209. #endif
  210. /* For regular u-boot sdram_init() is called from dram_init() */
  211. sdram_init();
  212. gd->ram_size = omap_sdram_size();
  213. }
  214. #endif
  215. int arch_cpu_init_dm(void)
  216. {
  217. early_system_init();
  218. return 0;
  219. }
  220. /*
  221. * Routine: wait_for_command_complete
  222. * Description: Wait for posting to finish on watchdog
  223. */
  224. void wait_for_command_complete(struct watchdog *wd_base)
  225. {
  226. int pending = 1;
  227. do {
  228. pending = readl(&wd_base->wwps);
  229. } while (pending);
  230. }
  231. /*
  232. * Routine: watchdog_init
  233. * Description: Shut down watch dogs
  234. */
  235. void watchdog_init(void)
  236. {
  237. struct watchdog *wd2_base = (struct watchdog *)WDT2_BASE;
  238. writel(WD_UNLOCK1, &wd2_base->wspr);
  239. wait_for_command_complete(wd2_base);
  240. writel(WD_UNLOCK2, &wd2_base->wspr);
  241. }
  242. /*
  243. * This function finds the SDRAM size available in the system
  244. * based on DMM section configurations
  245. * This is needed because the size of memory installed may be
  246. * different on different versions of the board
  247. */
  248. u32 omap_sdram_size(void)
  249. {
  250. u32 section, i, valid;
  251. u64 sdram_start = 0, sdram_end = 0, addr,
  252. size, total_size = 0, trap_size = 0, trap_start = 0;
  253. for (i = 0; i < 4; i++) {
  254. section = __raw_readl(DMM_BASE + i*4);
  255. valid = (section & EMIF_SDRC_ADDRSPC_MASK) >>
  256. (EMIF_SDRC_ADDRSPC_SHIFT);
  257. addr = section & EMIF_SYS_ADDR_MASK;
  258. /* See if the address is valid */
  259. if ((addr >= TI_ARMV7_DRAM_ADDR_SPACE_START) &&
  260. (addr < TI_ARMV7_DRAM_ADDR_SPACE_END)) {
  261. size = ((section & EMIF_SYS_SIZE_MASK) >>
  262. EMIF_SYS_SIZE_SHIFT);
  263. size = 1 << size;
  264. size *= SZ_16M;
  265. if (valid != DMM_SDRC_ADDR_SPC_INVALID) {
  266. if (!sdram_start || (addr < sdram_start))
  267. sdram_start = addr;
  268. if (!sdram_end || ((addr + size) > sdram_end))
  269. sdram_end = addr + size;
  270. } else {
  271. trap_size = size;
  272. trap_start = addr;
  273. }
  274. }
  275. }
  276. if ((trap_start >= sdram_start) && (trap_start < sdram_end))
  277. total_size = (sdram_end - sdram_start) - (trap_size);
  278. else
  279. total_size = sdram_end - sdram_start;
  280. return total_size;
  281. }
  282. /*
  283. * Routine: dram_init
  284. * Description: sets uboots idea of sdram size
  285. */
  286. int dram_init(void)
  287. {
  288. sdram_init();
  289. gd->ram_size = omap_sdram_size();
  290. return 0;
  291. }
  292. /*
  293. * Print board information
  294. */
  295. int checkboard(void)
  296. {
  297. puts(sysinfo.board_string);
  298. return 0;
  299. }
  300. #if defined(CONFIG_DISPLAY_CPUINFO)
  301. /*
  302. * Print CPU information
  303. */
  304. int print_cpuinfo(void)
  305. {
  306. puts("CPU : ");
  307. omap_rev_string();
  308. return 0;
  309. }
  310. #endif