cpu.c 2.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2014-2016, Freescale Semiconductor, Inc.
  4. */
  5. #include <common.h>
  6. #include <cpu_func.h>
  7. #include <init.h>
  8. #include <asm/cache.h>
  9. #include <asm/io.h>
  10. #include <asm/system.h>
  11. #include <asm/armv8/mmu.h>
  12. #include <asm/io.h>
  13. #include <asm/arch/mc_me_regs.h>
  14. #include "cpu.h"
  15. u32 cpu_mask(void)
  16. {
  17. return readl(MC_ME_CS);
  18. }
  19. #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
  20. #define S32V234_IRAM_BASE 0x3e800000UL
  21. #define S32V234_IRAM_SIZE 0x800000UL
  22. #define S32V234_DRAM_BASE1 0x80000000UL
  23. #define S32V234_DRAM_SIZE1 0x40000000UL
  24. #define S32V234_DRAM_BASE2 0xC0000000UL
  25. #define S32V234_DRAM_SIZE2 0x20000000UL
  26. #define S32V234_PERIPH_BASE 0x40000000UL
  27. #define S32V234_PERIPH_SIZE 0x40000000UL
  28. static struct mm_region s32v234_mem_map[] = {
  29. {
  30. .virt = S32V234_IRAM_BASE,
  31. .phys = S32V234_IRAM_BASE,
  32. .size = S32V234_IRAM_SIZE,
  33. .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
  34. PTE_BLOCK_OUTER_SHARE
  35. }, {
  36. .virt = S32V234_DRAM_BASE1,
  37. .phys = S32V234_DRAM_BASE1,
  38. .size = S32V234_DRAM_SIZE1,
  39. .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
  40. PTE_BLOCK_OUTER_SHARE
  41. }, {
  42. .virt = S32V234_PERIPH_BASE,
  43. .phys = S32V234_PERIPH_BASE,
  44. .size = S32V234_PERIPH_SIZE,
  45. .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  46. PTE_BLOCK_NON_SHARE
  47. /* TODO: Do we need these? */
  48. /* | PTE_BLOCK_PXN | PTE_BLOCK_UXN */
  49. }, {
  50. .virt = S32V234_DRAM_BASE2,
  51. .phys = S32V234_DRAM_BASE2,
  52. .size = S32V234_DRAM_SIZE2,
  53. .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
  54. PTE_BLOCK_OUTER_SHARE
  55. }, {
  56. /* List terminator */
  57. 0,
  58. }
  59. };
  60. struct mm_region *mem_map = s32v234_mem_map;
  61. #endif
  62. /*
  63. * Return the number of cores on this SOC.
  64. */
  65. int cpu_numcores(void)
  66. {
  67. int numcores;
  68. u32 mask;
  69. mask = cpu_mask();
  70. numcores = hweight32(cpu_mask());
  71. /* Verify if M4 is deactivated */
  72. if (mask & 0x1)
  73. numcores--;
  74. return numcores;
  75. }
  76. #if defined(CONFIG_ARCH_EARLY_INIT_R)
  77. int arch_early_init_r(void)
  78. {
  79. int rv;
  80. asm volatile ("dsb sy");
  81. rv = fsl_s32v234_wake_seconday_cores();
  82. if (rv)
  83. printf("Did not wake secondary cores\n");
  84. asm volatile ("sev");
  85. return 0;
  86. }
  87. #endif /* CONFIG_ARCH_EARLY_INIT_R */