timer.c 2.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2007-2011
  4. * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
  5. * Tom Cubie <tangliang@allwinnertech.com>
  6. */
  7. #include <common.h>
  8. #include <init.h>
  9. #include <time.h>
  10. #include <asm/io.h>
  11. #include <asm/arch/timer.h>
  12. DECLARE_GLOBAL_DATA_PTR;
  13. #define TIMER_MODE (0x0 << 7) /* continuous mode */
  14. #define TIMER_DIV (0x0 << 4) /* pre scale 1 */
  15. #define TIMER_SRC (0x1 << 2) /* osc24m */
  16. #define TIMER_RELOAD (0x1 << 1) /* reload internal value */
  17. #define TIMER_EN (0x1 << 0) /* enable timer */
  18. #define TIMER_CLOCK (24 * 1000 * 1000)
  19. #define COUNT_TO_USEC(x) ((x) / 24)
  20. #define USEC_TO_COUNT(x) ((x) * 24)
  21. #define TICKS_PER_HZ (TIMER_CLOCK / CONFIG_SYS_HZ)
  22. #define TICKS_TO_HZ(x) ((x) / TICKS_PER_HZ)
  23. #define TIMER_LOAD_VAL 0xffffffff
  24. #define TIMER_NUM 0 /* we use timer 0 */
  25. /* read the 32-bit timer */
  26. static ulong read_timer(void)
  27. {
  28. struct sunxi_timer_reg *timers =
  29. (struct sunxi_timer_reg *)SUNXI_TIMER_BASE;
  30. struct sunxi_timer *timer = &timers->timer[TIMER_NUM];
  31. /*
  32. * The hardware timer counts down, therefore we invert to
  33. * produce an incrementing timer.
  34. */
  35. return ~readl(&timer->val);
  36. }
  37. /* init timer register */
  38. int timer_init(void)
  39. {
  40. struct sunxi_timer_reg *timers =
  41. (struct sunxi_timer_reg *)SUNXI_TIMER_BASE;
  42. struct sunxi_timer *timer = &timers->timer[TIMER_NUM];
  43. writel(TIMER_LOAD_VAL, &timer->inter);
  44. writel(TIMER_MODE | TIMER_DIV | TIMER_SRC | TIMER_RELOAD | TIMER_EN,
  45. &timer->ctl);
  46. return 0;
  47. }
  48. /* timer without interrupts */
  49. static ulong get_timer_masked(void)
  50. {
  51. /* current tick value */
  52. ulong now = TICKS_TO_HZ(read_timer());
  53. if (now >= gd->arch.lastinc) /* normal (non rollover) */
  54. gd->arch.tbl += (now - gd->arch.lastinc);
  55. else {
  56. /* rollover */
  57. gd->arch.tbl += (TICKS_TO_HZ(TIMER_LOAD_VAL)
  58. - gd->arch.lastinc) + now;
  59. }
  60. gd->arch.lastinc = now;
  61. return gd->arch.tbl;
  62. }
  63. ulong get_timer(ulong base)
  64. {
  65. return get_timer_masked() - base;
  66. }
  67. /* delay x useconds */
  68. void __udelay(unsigned long usec)
  69. {
  70. long tmo = USEC_TO_COUNT(usec);
  71. ulong now, last = read_timer();
  72. while (tmo > 0) {
  73. now = read_timer();
  74. if (now > last) /* normal (non rollover) */
  75. tmo -= now - last;
  76. else /* rollover */
  77. tmo -= TIMER_LOAD_VAL - last + now;
  78. last = now;
  79. }
  80. }
  81. /*
  82. * This function is derived from PowerPC code (read timebase as long long).
  83. * On ARM it just returns the timer value.
  84. */
  85. unsigned long long get_ticks(void)
  86. {
  87. return get_timer(0);
  88. }
  89. /*
  90. * This function is derived from PowerPC code (timebase clock frequency).
  91. * On ARM it returns the number of timer ticks per second.
  92. */
  93. ulong get_tbclk(void)
  94. {
  95. return CONFIG_SYS_HZ;
  96. }