mcfmii.c 7.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
  4. * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
  5. */
  6. #include <common.h>
  7. #include <config.h>
  8. #include <net.h>
  9. #include <netdev.h>
  10. #ifdef CONFIG_MCF547x_8x
  11. #include <asm/fsl_mcdmafec.h>
  12. #else
  13. #include <asm/fec.h>
  14. #endif
  15. #include <asm/immap.h>
  16. #include <linux/mii.h>
  17. DECLARE_GLOBAL_DATA_PTR;
  18. #if defined(CONFIG_CMD_NET)
  19. #undef MII_DEBUG
  20. #undef ET_DEBUG
  21. /*extern int fecpin_setclear(struct eth_device *dev, int setclear);*/
  22. #if defined(CONFIG_SYS_DISCOVER_PHY) || defined(CONFIG_CMD_MII)
  23. #include <miiphy.h>
  24. /* Make MII read/write commands for the FEC. */
  25. #define mk_mii_read(ADDR, REG) (0x60020000 | ((ADDR << 23) | \
  26. (REG & 0x1f) << 18))
  27. #define mk_mii_write(ADDR, REG, VAL) (0x50020000 | ((ADDR << 23) | \
  28. (REG & 0x1f) << 18) | (VAL & 0xffff))
  29. #ifndef CONFIG_SYS_UNSPEC_PHYID
  30. # define CONFIG_SYS_UNSPEC_PHYID 0
  31. #endif
  32. #ifndef CONFIG_SYS_UNSPEC_STRID
  33. # define CONFIG_SYS_UNSPEC_STRID 0
  34. #endif
  35. #ifdef CONFIG_MCF547x_8x
  36. typedef struct fec_info_dma FEC_INFO_T;
  37. #define FEC_T fecdma_t
  38. #else
  39. typedef struct fec_info_s FEC_INFO_T;
  40. #define FEC_T fec_t
  41. #endif
  42. typedef struct phy_info_struct {
  43. u32 phyid;
  44. char *strid;
  45. } phy_info_t;
  46. phy_info_t phyinfo[] = {
  47. {0x0022561B, "AMD79C784VC"}, /* AMD 79C784VC */
  48. {0x00406322, "BCM5222"}, /* Broadcom 5222 */
  49. {0x02a80150, "Intel82555"}, /* Intel 82555 */
  50. {0x0016f870, "LSI80225"}, /* LSI 80225 */
  51. {0x0016f880, "LSI80225/B"}, /* LSI 80225/B */
  52. {0x78100000, "LXT970"}, /* LXT970 */
  53. {0x001378e0, "LXT971"}, /* LXT971 and 972 */
  54. {0x00221619, "KS8721BL"}, /* Micrel KS8721BL/SL */
  55. {0x00221512, "KSZ8041NL"}, /* Micrel KSZ8041NL */
  56. {0x20005CE1, "N83640"}, /* National 83640 */
  57. {0x20005C90, "N83848"}, /* National 83848 */
  58. {0x20005CA2, "N83849"}, /* National 83849 */
  59. {0x01814400, "QS6612"}, /* QS6612 */
  60. #if defined(CONFIG_SYS_UNSPEC_PHYID) && defined(CONFIG_SYS_UNSPEC_STRID)
  61. {CONFIG_SYS_UNSPEC_PHYID, CONFIG_SYS_UNSPEC_STRID},
  62. #endif
  63. {0, 0}
  64. };
  65. /*
  66. * mii_init -- Initialize the MII for MII command without ethernet
  67. * This function is a subset of eth_init
  68. */
  69. void mii_reset(FEC_INFO_T *info)
  70. {
  71. volatile FEC_T *fecp = (FEC_T *) (info->miibase);
  72. int i;
  73. fecp->ecr = FEC_ECR_RESET;
  74. for (i = 0; (fecp->ecr & FEC_ECR_RESET) && (i < FEC_RESET_DELAY); ++i) {
  75. udelay(1);
  76. }
  77. if (i == FEC_RESET_DELAY)
  78. printf("FEC_RESET_DELAY timeout\n");
  79. }
  80. /* send command to phy using mii, wait for result */
  81. uint mii_send(uint mii_cmd)
  82. {
  83. FEC_INFO_T *info;
  84. volatile FEC_T *ep;
  85. struct eth_device *dev;
  86. uint mii_reply;
  87. int j = 0;
  88. /* retrieve from register structure */
  89. dev = eth_get_dev();
  90. info = dev->priv;
  91. ep = (FEC_T *) info->miibase;
  92. ep->mmfr = mii_cmd; /* command to phy */
  93. /* wait for mii complete */
  94. while (!(ep->eir & FEC_EIR_MII) && (j < MCFFEC_TOUT_LOOP)) {
  95. udelay(1);
  96. j++;
  97. }
  98. if (j >= MCFFEC_TOUT_LOOP) {
  99. printf("MII not complete\n");
  100. return -1;
  101. }
  102. mii_reply = ep->mmfr; /* result from phy */
  103. ep->eir = FEC_EIR_MII; /* clear MII complete */
  104. #ifdef ET_DEBUG
  105. printf("%s[%d] %s: sent=0x%8.8x, reply=0x%8.8x\n",
  106. __FILE__, __LINE__, __FUNCTION__, mii_cmd, mii_reply);
  107. #endif
  108. return (mii_reply & 0xffff); /* data read from phy */
  109. }
  110. #endif /* CONFIG_SYS_DISCOVER_PHY || (CONFIG_MII) */
  111. #if defined(CONFIG_SYS_DISCOVER_PHY)
  112. int mii_discover_phy(struct eth_device *dev)
  113. {
  114. #define MAX_PHY_PASSES 11
  115. FEC_INFO_T *info = dev->priv;
  116. int phyaddr, pass;
  117. uint phyno, phytype;
  118. int i, found = 0;
  119. if (info->phyname_init)
  120. return info->phy_addr;
  121. phyaddr = -1; /* didn't find a PHY yet */
  122. for (pass = 1; pass <= MAX_PHY_PASSES && phyaddr < 0; ++pass) {
  123. if (pass > 1) {
  124. /* PHY may need more time to recover from reset.
  125. * The LXT970 needs 50ms typical, no maximum is
  126. * specified, so wait 10ms before try again.
  127. * With 11 passes this gives it 100ms to wake up.
  128. */
  129. udelay(10000); /* wait 10ms */
  130. }
  131. for (phyno = 0; phyno < 32 && phyaddr < 0; ++phyno) {
  132. phytype = mii_send(mk_mii_read(phyno, MII_PHYSID1));
  133. #ifdef ET_DEBUG
  134. printf("PHY type 0x%x pass %d type\n", phytype, pass);
  135. #endif
  136. if (phytype == 0xffff)
  137. continue;
  138. phyaddr = phyno;
  139. phytype <<= 16;
  140. phytype |=
  141. mii_send(mk_mii_read(phyno, MII_PHYSID2));
  142. #ifdef ET_DEBUG
  143. printf("PHY @ 0x%x pass %d\n", phyno, pass);
  144. #endif
  145. for (i = 0; (i < ARRAY_SIZE(phyinfo))
  146. && (phyinfo[i].phyid != 0); i++) {
  147. if (phyinfo[i].phyid == phytype) {
  148. #ifdef ET_DEBUG
  149. printf("phyid %x - %s\n",
  150. phyinfo[i].phyid,
  151. phyinfo[i].strid);
  152. #endif
  153. strcpy(info->phy_name, phyinfo[i].strid);
  154. info->phyname_init = 1;
  155. found = 1;
  156. break;
  157. }
  158. }
  159. if (!found) {
  160. #ifdef ET_DEBUG
  161. printf("0x%08x\n", phytype);
  162. #endif
  163. strcpy(info->phy_name, "unknown");
  164. info->phyname_init = 1;
  165. break;
  166. }
  167. }
  168. }
  169. if (phyaddr < 0)
  170. printf("No PHY device found.\n");
  171. return phyaddr;
  172. }
  173. #endif /* CONFIG_SYS_DISCOVER_PHY */
  174. void mii_init(void) __attribute__((weak,alias("__mii_init")));
  175. void __mii_init(void)
  176. {
  177. FEC_INFO_T *info;
  178. volatile FEC_T *fecp;
  179. struct eth_device *dev;
  180. int miispd = 0, i = 0;
  181. u16 status = 0;
  182. u16 linkgood = 0;
  183. /* retrieve from register structure */
  184. dev = eth_get_dev();
  185. info = dev->priv;
  186. fecp = (FEC_T *) info->miibase;
  187. fecpin_setclear(dev, 1);
  188. mii_reset(info);
  189. /* We use strictly polling mode only */
  190. fecp->eimr = 0;
  191. /* Clear any pending interrupt */
  192. fecp->eir = 0xffffffff;
  193. /* Set MII speed */
  194. miispd = (gd->bus_clk / 1000000) / 5;
  195. fecp->mscr = miispd << 1;
  196. info->phy_addr = mii_discover_phy(dev);
  197. while (i < MCFFEC_TOUT_LOOP) {
  198. status = 0;
  199. i++;
  200. /* Read PHY control register */
  201. miiphy_read(dev->name, info->phy_addr, MII_BMCR, &status);
  202. /* If phy set to autonegotiate, wait for autonegotiation done,
  203. * if phy is not autonegotiating, just wait for link up.
  204. */
  205. if ((status & BMCR_ANENABLE) == BMCR_ANENABLE) {
  206. linkgood = (BMSR_ANEGCOMPLETE | BMSR_LSTATUS);
  207. } else {
  208. linkgood = BMSR_LSTATUS;
  209. }
  210. /* Read PHY status register */
  211. miiphy_read(dev->name, info->phy_addr, MII_BMSR, &status);
  212. if ((status & linkgood) == linkgood)
  213. break;
  214. udelay(1);
  215. }
  216. if (i >= MCFFEC_TOUT_LOOP) {
  217. printf("Link UP timeout\n");
  218. }
  219. /* adapt to the duplex and speed settings of the phy */
  220. info->dup_spd = miiphy_duplex(dev->name, info->phy_addr) << 16;
  221. info->dup_spd |= miiphy_speed(dev->name, info->phy_addr);
  222. }
  223. /*
  224. * Read and write a MII PHY register, routines used by MII Utilities
  225. *
  226. * FIXME: These routines are expected to return 0 on success, but mii_send
  227. * does _not_ return an error code. Maybe 0xFFFF means error, i.e.
  228. * no PHY connected...
  229. * For now always return 0.
  230. * FIXME: These routines only work after calling eth_init() at least once!
  231. * Otherwise they hang in mii_send() !!! Sorry!
  232. */
  233. int mcffec_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
  234. {
  235. short rdreg; /* register working value */
  236. #ifdef MII_DEBUG
  237. printf("miiphy_read(0x%x) @ 0x%x = ", reg, addr);
  238. #endif
  239. rdreg = mii_send(mk_mii_read(addr, reg));
  240. #ifdef MII_DEBUG
  241. printf("0x%04x\n", rdreg);
  242. #endif
  243. return rdreg;
  244. }
  245. int mcffec_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,
  246. u16 value)
  247. {
  248. #ifdef MII_DEBUG
  249. printf("miiphy_write(0x%x) @ 0x%x = 0x%04x\n", reg, addr, value);
  250. #endif
  251. mii_send(mk_mii_write(addr, reg, value));
  252. return 0;
  253. }
  254. #endif /* CONFIG_CMD_NET */