ns16550.c 16 KB

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  1. /*
  2. * COM1 NS16550 support
  3. * originally from linux source (arch/powerpc/boot/ns16550.c)
  4. * modified to use CONFIG_SYS_ISA_MEM and new defines
  5. */
  6. #include <clock_legacy.h>
  7. #include <common.h>
  8. #include <clk.h>
  9. #include <dm.h>
  10. #include <errno.h>
  11. #include <ns16550.h>
  12. #include <reset.h>
  13. #include <serial.h>
  14. #include <watchdog.h>
  15. #include <linux/types.h>
  16. #include <asm/io.h>
  17. DECLARE_GLOBAL_DATA_PTR;
  18. #define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
  19. #define UART_MCRVAL (UART_MCR_DTR | \
  20. UART_MCR_RTS) /* RTS/DTR */
  21. #if !CONFIG_IS_ENABLED(DM_SERIAL)
  22. #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
  23. #define serial_out(x, y) outb(x, (ulong)y)
  24. #define serial_in(y) inb((ulong)y)
  25. #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
  26. #define serial_out(x, y) out_be32(y, x)
  27. #define serial_in(y) in_be32(y)
  28. #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
  29. #define serial_out(x, y) out_le32(y, x)
  30. #define serial_in(y) in_le32(y)
  31. #else
  32. #define serial_out(x, y) writeb(x, y)
  33. #define serial_in(y) readb(y)
  34. #endif
  35. #endif /* !CONFIG_DM_SERIAL */
  36. #if defined(CONFIG_SOC_KEYSTONE)
  37. #define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0
  38. #define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0))
  39. #undef UART_MCRVAL
  40. #ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
  41. #define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE)
  42. #else
  43. #define UART_MCRVAL (UART_MCR_RTS)
  44. #endif
  45. #endif
  46. #ifndef CONFIG_SYS_NS16550_IER
  47. #define CONFIG_SYS_NS16550_IER 0x00
  48. #endif /* CONFIG_SYS_NS16550_IER */
  49. static inline void serial_out_shift(void *addr, int shift, int value)
  50. {
  51. #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
  52. outb(value, (ulong)addr);
  53. #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
  54. out_le32(addr, value);
  55. #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
  56. out_be32(addr, value);
  57. #elif defined(CONFIG_SYS_NS16550_MEM32)
  58. writel(value, addr);
  59. #elif defined(CONFIG_SYS_BIG_ENDIAN)
  60. writeb(value, addr + (1 << shift) - 1);
  61. #else
  62. writeb(value, addr);
  63. #endif
  64. }
  65. static inline int serial_in_shift(void *addr, int shift)
  66. {
  67. #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
  68. return inb((ulong)addr);
  69. #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
  70. return in_le32(addr);
  71. #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
  72. return in_be32(addr);
  73. #elif defined(CONFIG_SYS_NS16550_MEM32)
  74. return readl(addr);
  75. #elif defined(CONFIG_SYS_BIG_ENDIAN)
  76. return readb(addr + (1 << shift) - 1);
  77. #else
  78. return readb(addr);
  79. #endif
  80. }
  81. #if CONFIG_IS_ENABLED(DM_SERIAL)
  82. #ifndef CONFIG_SYS_NS16550_CLK
  83. #define CONFIG_SYS_NS16550_CLK 0
  84. #endif
  85. /*
  86. * Use this #ifdef for now since many platforms don't define in(), out(),
  87. * out_le32(), etc. but we don't have #defines to indicate this.
  88. *
  89. * TODO(sjg@chromium.org): Add CONFIG options to indicate what I/O is available
  90. * on a platform
  91. */
  92. #ifdef CONFIG_NS16550_DYNAMIC
  93. static void serial_out_dynamic(struct ns16550_platdata *plat, u8 *addr,
  94. int value)
  95. {
  96. if (plat->flags & NS16550_FLAG_IO) {
  97. outb(value, addr);
  98. } else if (plat->reg_width == 4) {
  99. if (plat->flags & NS16550_FLAG_ENDIAN) {
  100. if (plat->flags & NS16550_FLAG_BE)
  101. out_be32(addr, value);
  102. else
  103. out_le32(addr, value);
  104. } else {
  105. writel(value, addr);
  106. }
  107. } else if (plat->flags & NS16550_FLAG_BE) {
  108. writeb(value, addr + (1 << plat->reg_shift) - 1);
  109. } else {
  110. writeb(value, addr);
  111. }
  112. }
  113. static int serial_in_dynamic(struct ns16550_platdata *plat, u8 *addr)
  114. {
  115. if (plat->flags & NS16550_FLAG_IO) {
  116. return inb(addr);
  117. } else if (plat->reg_width == 4) {
  118. if (plat->flags & NS16550_FLAG_ENDIAN) {
  119. if (plat->flags & NS16550_FLAG_BE)
  120. return in_be32(addr);
  121. else
  122. return in_le32(addr);
  123. } else {
  124. return readl(addr);
  125. }
  126. } else if (plat->flags & NS16550_FLAG_BE) {
  127. return readb(addr + (1 << plat->reg_shift) - 1);
  128. } else {
  129. return readb(addr);
  130. }
  131. }
  132. #else
  133. static inline void serial_out_dynamic(struct ns16550_platdata *plat, u8 *addr,
  134. int value)
  135. {
  136. }
  137. static inline int serial_in_dynamic(struct ns16550_platdata *plat, u8 *addr)
  138. {
  139. return 0;
  140. }
  141. #endif /* CONFIG_NS16550_DYNAMIC */
  142. static void ns16550_writeb(NS16550_t port, int offset, int value)
  143. {
  144. struct ns16550_platdata *plat = port->plat;
  145. unsigned char *addr;
  146. offset *= 1 << plat->reg_shift;
  147. addr = (unsigned char *)plat->base + offset + plat->reg_offset;
  148. if (IS_ENABLED(CONFIG_NS16550_DYNAMIC))
  149. serial_out_dynamic(plat, addr, value);
  150. else
  151. serial_out_shift(addr, plat->reg_shift, value);
  152. }
  153. static int ns16550_readb(NS16550_t port, int offset)
  154. {
  155. struct ns16550_platdata *plat = port->plat;
  156. unsigned char *addr;
  157. offset *= 1 << plat->reg_shift;
  158. addr = (unsigned char *)plat->base + offset + plat->reg_offset;
  159. if (IS_ENABLED(CONFIG_NS16550_DYNAMIC))
  160. return serial_in_dynamic(plat, addr);
  161. else
  162. return serial_in_shift(addr, plat->reg_shift);
  163. }
  164. static u32 ns16550_getfcr(NS16550_t port)
  165. {
  166. struct ns16550_platdata *plat = port->plat;
  167. return plat->fcr;
  168. }
  169. /* We can clean these up once everything is moved to driver model */
  170. #define serial_out(value, addr) \
  171. ns16550_writeb(com_port, \
  172. (unsigned char *)addr - (unsigned char *)com_port, value)
  173. #define serial_in(addr) \
  174. ns16550_readb(com_port, \
  175. (unsigned char *)addr - (unsigned char *)com_port)
  176. #else
  177. static u32 ns16550_getfcr(NS16550_t port)
  178. {
  179. return UART_FCR_DEFVAL;
  180. }
  181. #endif
  182. int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
  183. {
  184. const unsigned int mode_x_div = 16;
  185. return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
  186. }
  187. static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
  188. {
  189. /* to keep serial format, read lcr before writing BKSE */
  190. int lcr_val = serial_in(&com_port->lcr) & ~UART_LCR_BKSE;
  191. serial_out(UART_LCR_BKSE | lcr_val, &com_port->lcr);
  192. serial_out(baud_divisor & 0xff, &com_port->dll);
  193. serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
  194. serial_out(lcr_val, &com_port->lcr);
  195. }
  196. void NS16550_init(NS16550_t com_port, int baud_divisor)
  197. {
  198. #if (defined(CONFIG_SPL_BUILD) && \
  199. (defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX)))
  200. /*
  201. * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
  202. * before SPL starts only THRE bit is set. We have to empty the
  203. * transmitter before initialization starts.
  204. */
  205. if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE))
  206. == UART_LSR_THRE) {
  207. if (baud_divisor != -1)
  208. NS16550_setbrg(com_port, baud_divisor);
  209. else {
  210. // Re-use old baud rate divisor to flush transmit reg.
  211. const int dll = serial_in(&com_port->dll);
  212. const int dlm = serial_in(&com_port->dlm);
  213. const int divisor = dll | (dlm << 8);
  214. NS16550_setbrg(com_port, divisor);
  215. }
  216. serial_out(0, &com_port->mdr1);
  217. }
  218. #endif
  219. while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
  220. ;
  221. serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
  222. #if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_OMAP_SERIAL)
  223. serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/
  224. #endif
  225. serial_out(UART_MCRVAL, &com_port->mcr);
  226. serial_out(ns16550_getfcr(com_port), &com_port->fcr);
  227. /* initialize serial config to 8N1 before writing baudrate */
  228. serial_out(UART_LCRVAL, &com_port->lcr);
  229. if (baud_divisor != -1)
  230. NS16550_setbrg(com_port, baud_divisor);
  231. #if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_SOC_DA8XX) || \
  232. defined(CONFIG_OMAP_SERIAL)
  233. /* /16 is proper to hit 115200 with 48MHz */
  234. serial_out(0, &com_port->mdr1);
  235. #endif
  236. #if defined(CONFIG_SOC_KEYSTONE)
  237. serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
  238. #endif
  239. }
  240. #ifndef CONFIG_NS16550_MIN_FUNCTIONS
  241. void NS16550_reinit(NS16550_t com_port, int baud_divisor)
  242. {
  243. serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
  244. NS16550_setbrg(com_port, 0);
  245. serial_out(UART_MCRVAL, &com_port->mcr);
  246. serial_out(ns16550_getfcr(com_port), &com_port->fcr);
  247. NS16550_setbrg(com_port, baud_divisor);
  248. }
  249. #endif /* CONFIG_NS16550_MIN_FUNCTIONS */
  250. void NS16550_putc(NS16550_t com_port, char c)
  251. {
  252. while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
  253. ;
  254. serial_out(c, &com_port->thr);
  255. /*
  256. * Call watchdog_reset() upon newline. This is done here in putc
  257. * since the environment code uses a single puts() to print the complete
  258. * environment upon "printenv". So we can't put this watchdog call
  259. * in puts().
  260. */
  261. if (c == '\n')
  262. WATCHDOG_RESET();
  263. }
  264. #ifndef CONFIG_NS16550_MIN_FUNCTIONS
  265. char NS16550_getc(NS16550_t com_port)
  266. {
  267. while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
  268. #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
  269. extern void usbtty_poll(void);
  270. usbtty_poll();
  271. #endif
  272. WATCHDOG_RESET();
  273. }
  274. return serial_in(&com_port->rbr);
  275. }
  276. int NS16550_tstc(NS16550_t com_port)
  277. {
  278. return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
  279. }
  280. #endif /* CONFIG_NS16550_MIN_FUNCTIONS */
  281. #ifdef CONFIG_DEBUG_UART_NS16550
  282. #include <debug_uart.h>
  283. static inline void _debug_uart_init(void)
  284. {
  285. struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
  286. int baud_divisor;
  287. /*
  288. * We copy the code from above because it is already horribly messy.
  289. * Trying to refactor to nicely remove the duplication doesn't seem
  290. * feasible. The better fix is to move all users of this driver to
  291. * driver model.
  292. */
  293. baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
  294. CONFIG_BAUDRATE);
  295. serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
  296. serial_dout(&com_port->mcr, UART_MCRVAL);
  297. serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
  298. serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
  299. serial_dout(&com_port->dll, baud_divisor & 0xff);
  300. serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
  301. serial_dout(&com_port->lcr, UART_LCRVAL);
  302. }
  303. static inline int NS16550_read_baud_divisor(struct NS16550 *com_port)
  304. {
  305. int ret;
  306. serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
  307. ret = serial_din(&com_port->dll) & 0xff;
  308. ret |= (serial_din(&com_port->dlm) & 0xff) << 8;
  309. serial_dout(&com_port->lcr, UART_LCRVAL);
  310. return ret;
  311. }
  312. static inline void _debug_uart_putc(int ch)
  313. {
  314. struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
  315. while (!(serial_din(&com_port->lsr) & UART_LSR_THRE)) {
  316. #ifdef CONFIG_DEBUG_UART_NS16550_CHECK_ENABLED
  317. if (!NS16550_read_baud_divisor(com_port))
  318. return;
  319. #endif
  320. }
  321. serial_dout(&com_port->thr, ch);
  322. }
  323. DEBUG_UART_FUNCS
  324. #endif
  325. #if CONFIG_IS_ENABLED(DM_SERIAL)
  326. static int ns16550_serial_putc(struct udevice *dev, const char ch)
  327. {
  328. struct NS16550 *const com_port = dev_get_priv(dev);
  329. if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
  330. return -EAGAIN;
  331. serial_out(ch, &com_port->thr);
  332. /*
  333. * Call watchdog_reset() upon newline. This is done here in putc
  334. * since the environment code uses a single puts() to print the complete
  335. * environment upon "printenv". So we can't put this watchdog call
  336. * in puts().
  337. */
  338. if (ch == '\n')
  339. WATCHDOG_RESET();
  340. return 0;
  341. }
  342. static int ns16550_serial_pending(struct udevice *dev, bool input)
  343. {
  344. struct NS16550 *const com_port = dev_get_priv(dev);
  345. if (input)
  346. return (serial_in(&com_port->lsr) & UART_LSR_DR) ? 1 : 0;
  347. else
  348. return (serial_in(&com_port->lsr) & UART_LSR_THRE) ? 0 : 1;
  349. }
  350. static int ns16550_serial_getc(struct udevice *dev)
  351. {
  352. struct NS16550 *const com_port = dev_get_priv(dev);
  353. if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
  354. return -EAGAIN;
  355. return serial_in(&com_port->rbr);
  356. }
  357. static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
  358. {
  359. struct NS16550 *const com_port = dev_get_priv(dev);
  360. struct ns16550_platdata *plat = com_port->plat;
  361. int clock_divisor;
  362. clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);
  363. NS16550_setbrg(com_port, clock_divisor);
  364. return 0;
  365. }
  366. static int ns16550_serial_setconfig(struct udevice *dev, uint serial_config)
  367. {
  368. struct NS16550 *const com_port = dev_get_priv(dev);
  369. int lcr_val = UART_LCR_WLS_8;
  370. uint parity = SERIAL_GET_PARITY(serial_config);
  371. uint bits = SERIAL_GET_BITS(serial_config);
  372. uint stop = SERIAL_GET_STOP(serial_config);
  373. /*
  374. * only parity config is implemented, check if other serial settings
  375. * are the default one.
  376. */
  377. if (bits != SERIAL_8_BITS || stop != SERIAL_ONE_STOP)
  378. return -ENOTSUPP; /* not supported in driver*/
  379. switch (parity) {
  380. case SERIAL_PAR_NONE:
  381. /* no bits to add */
  382. break;
  383. case SERIAL_PAR_ODD:
  384. lcr_val |= UART_LCR_PEN;
  385. break;
  386. case SERIAL_PAR_EVEN:
  387. lcr_val |= UART_LCR_PEN | UART_LCR_EPS;
  388. break;
  389. default:
  390. return -ENOTSUPP; /* not supported in driver*/
  391. }
  392. serial_out(lcr_val, &com_port->lcr);
  393. return 0;
  394. }
  395. static int ns16550_serial_getinfo(struct udevice *dev,
  396. struct serial_device_info *info)
  397. {
  398. struct NS16550 *const com_port = dev_get_priv(dev);
  399. struct ns16550_platdata *plat = com_port->plat;
  400. info->type = SERIAL_CHIP_16550_COMPATIBLE;
  401. #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
  402. info->addr_space = SERIAL_ADDRESS_SPACE_IO;
  403. #else
  404. info->addr_space = SERIAL_ADDRESS_SPACE_MEMORY;
  405. #endif
  406. info->addr = plat->base;
  407. info->reg_width = plat->reg_width;
  408. info->reg_shift = plat->reg_shift;
  409. info->reg_offset = plat->reg_offset;
  410. return 0;
  411. }
  412. int ns16550_serial_probe(struct udevice *dev)
  413. {
  414. struct NS16550 *const com_port = dev_get_priv(dev);
  415. struct reset_ctl_bulk reset_bulk;
  416. int ret;
  417. ret = reset_get_bulk(dev, &reset_bulk);
  418. if (!ret)
  419. reset_deassert_bulk(&reset_bulk);
  420. com_port->plat = dev_get_platdata(dev);
  421. NS16550_init(com_port, -1);
  422. return 0;
  423. }
  424. #if CONFIG_IS_ENABLED(OF_CONTROL)
  425. enum {
  426. PORT_NS16550 = 0,
  427. PORT_JZ4780,
  428. };
  429. #endif
  430. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  431. int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
  432. {
  433. struct ns16550_platdata *plat = dev->platdata;
  434. const u32 port_type = dev_get_driver_data(dev);
  435. fdt_addr_t addr;
  436. struct clk clk;
  437. int err;
  438. /* try Processor Local Bus device first */
  439. addr = dev_read_addr_pci(dev);
  440. if (addr == FDT_ADDR_T_NONE)
  441. return -EINVAL;
  442. #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
  443. plat->base = addr;
  444. #else
  445. plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE);
  446. #endif
  447. plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0);
  448. plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0);
  449. plat->reg_width = dev_read_u32_default(dev, "reg-io-width", 1);
  450. err = clk_get_by_index(dev, 0, &clk);
  451. if (!err) {
  452. err = clk_get_rate(&clk);
  453. if (!IS_ERR_VALUE(err))
  454. plat->clock = err;
  455. } else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) {
  456. debug("ns16550 failed to get clock\n");
  457. return err;
  458. }
  459. if (!plat->clock)
  460. plat->clock = dev_read_u32_default(dev, "clock-frequency",
  461. CONFIG_SYS_NS16550_CLK);
  462. if (!plat->clock) {
  463. debug("ns16550 clock not defined\n");
  464. return -EINVAL;
  465. }
  466. plat->fcr = UART_FCR_DEFVAL;
  467. if (port_type == PORT_JZ4780)
  468. plat->fcr |= UART_FCR_UME;
  469. return 0;
  470. }
  471. #endif
  472. const struct dm_serial_ops ns16550_serial_ops = {
  473. .putc = ns16550_serial_putc,
  474. .pending = ns16550_serial_pending,
  475. .getc = ns16550_serial_getc,
  476. .setbrg = ns16550_serial_setbrg,
  477. .setconfig = ns16550_serial_setconfig,
  478. .getinfo = ns16550_serial_getinfo,
  479. };
  480. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  481. /*
  482. * Please consider existing compatible strings before adding a new
  483. * one to keep this table compact. Or you may add a generic "ns16550"
  484. * compatible string to your dts.
  485. */
  486. static const struct udevice_id ns16550_serial_ids[] = {
  487. { .compatible = "ns16550", .data = PORT_NS16550 },
  488. { .compatible = "ns16550a", .data = PORT_NS16550 },
  489. { .compatible = "ingenic,jz4780-uart", .data = PORT_JZ4780 },
  490. { .compatible = "nvidia,tegra20-uart", .data = PORT_NS16550 },
  491. { .compatible = "snps,dw-apb-uart", .data = PORT_NS16550 },
  492. {}
  493. };
  494. #endif /* OF_CONTROL && !OF_PLATDATA */
  495. #if CONFIG_IS_ENABLED(SERIAL_PRESENT)
  496. /* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */
  497. #if !defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL)
  498. U_BOOT_DRIVER(ns16550_serial) = {
  499. .name = "ns16550_serial",
  500. .id = UCLASS_SERIAL,
  501. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  502. .of_match = ns16550_serial_ids,
  503. .ofdata_to_platdata = ns16550_serial_ofdata_to_platdata,
  504. .platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
  505. #endif
  506. .priv_auto_alloc_size = sizeof(struct NS16550),
  507. .probe = ns16550_serial_probe,
  508. .ops = &ns16550_serial_ops,
  509. #if !CONFIG_IS_ENABLED(OF_CONTROL)
  510. .flags = DM_FLAG_PRE_RELOC,
  511. #endif
  512. };
  513. #endif
  514. #endif /* SERIAL_PRESENT */
  515. #endif /* CONFIG_DM_SERIAL */