musb_dsps.c 19 KB

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  1. /*
  2. * Texas Instruments DSPS platforms "glue layer"
  3. *
  4. * Copyright (C) 2012, by Texas Instruments
  5. *
  6. * Based on the am35x "glue layer" code.
  7. *
  8. * This file is part of the Inventra Controller Driver for Linux.
  9. *
  10. * SPDX-License-Identifier: GPL-2.0
  11. *
  12. * musb_dsps.c will be a common file for all the TI DSPS platforms
  13. * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
  14. * For now only ti81x is using this and in future davinci.c, am35x.c
  15. * da8xx.c would be merged to this file after testing.
  16. */
  17. #ifndef __UBOOT__
  18. #include <linux/init.h>
  19. #include <linux/io.h>
  20. #include <linux/err.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/dma-mapping.h>
  23. #include <linux/pm_runtime.h>
  24. #include <linux/module.h>
  25. #include <linux/of.h>
  26. #include <linux/of_device.h>
  27. #include <linux/of_address.h>
  28. #include <plat/usb.h>
  29. #else
  30. #include <common.h>
  31. #include <asm/omap_musb.h>
  32. #include "linux-compat.h"
  33. #endif
  34. #include "musb_core.h"
  35. /**
  36. * avoid using musb_readx()/musb_writex() as glue layer should not be
  37. * dependent on musb core layer symbols.
  38. */
  39. static inline u8 dsps_readb(const void __iomem *addr, unsigned offset)
  40. { return __raw_readb(addr + offset); }
  41. static inline u32 dsps_readl(const void __iomem *addr, unsigned offset)
  42. { return __raw_readl(addr + offset); }
  43. static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data)
  44. { __raw_writeb(data, addr + offset); }
  45. static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data)
  46. { __raw_writel(data, addr + offset); }
  47. /**
  48. * DSPS musb wrapper register offset.
  49. * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
  50. * musb ips.
  51. */
  52. struct dsps_musb_wrapper {
  53. u16 revision;
  54. u16 control;
  55. u16 status;
  56. u16 eoi;
  57. u16 epintr_set;
  58. u16 epintr_clear;
  59. u16 epintr_status;
  60. u16 coreintr_set;
  61. u16 coreintr_clear;
  62. u16 coreintr_status;
  63. u16 phy_utmi;
  64. u16 mode;
  65. /* bit positions for control */
  66. unsigned reset:5;
  67. /* bit positions for interrupt */
  68. unsigned usb_shift:5;
  69. u32 usb_mask;
  70. u32 usb_bitmap;
  71. unsigned drvvbus:5;
  72. unsigned txep_shift:5;
  73. u32 txep_mask;
  74. u32 txep_bitmap;
  75. unsigned rxep_shift:5;
  76. u32 rxep_mask;
  77. u32 rxep_bitmap;
  78. /* bit positions for phy_utmi */
  79. unsigned otg_disable:5;
  80. /* bit positions for mode */
  81. unsigned iddig:5;
  82. /* miscellaneous stuff */
  83. u32 musb_core_offset;
  84. u8 poll_seconds;
  85. };
  86. static const struct dsps_musb_wrapper ti81xx_driver_data __devinitconst = {
  87. .revision = 0x00,
  88. .control = 0x14,
  89. .status = 0x18,
  90. .eoi = 0x24,
  91. .epintr_set = 0x38,
  92. .epintr_clear = 0x40,
  93. .epintr_status = 0x30,
  94. .coreintr_set = 0x3c,
  95. .coreintr_clear = 0x44,
  96. .coreintr_status = 0x34,
  97. .phy_utmi = 0xe0,
  98. .mode = 0xe8,
  99. .reset = 0,
  100. .otg_disable = 21,
  101. .iddig = 8,
  102. .usb_shift = 0,
  103. .usb_mask = 0x1ff,
  104. .usb_bitmap = (0x1ff << 0),
  105. .drvvbus = 8,
  106. .txep_shift = 0,
  107. .txep_mask = 0xffff,
  108. .txep_bitmap = (0xffff << 0),
  109. .rxep_shift = 16,
  110. .rxep_mask = 0xfffe,
  111. .rxep_bitmap = (0xfffe << 16),
  112. .musb_core_offset = 0x400,
  113. .poll_seconds = 2,
  114. };
  115. /**
  116. * DSPS glue structure.
  117. */
  118. struct dsps_glue {
  119. struct device *dev;
  120. struct platform_device *musb; /* child musb pdev */
  121. const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
  122. struct timer_list timer; /* otg_workaround timer */
  123. };
  124. /**
  125. * dsps_musb_enable - enable interrupts
  126. */
  127. #ifndef __UBOOT__
  128. static void dsps_musb_enable(struct musb *musb)
  129. #else
  130. static int dsps_musb_enable(struct musb *musb)
  131. #endif
  132. {
  133. #ifndef __UBOOT__
  134. struct device *dev = musb->controller;
  135. struct platform_device *pdev = to_platform_device(dev->parent);
  136. struct dsps_glue *glue = platform_get_drvdata(pdev);
  137. const struct dsps_musb_wrapper *wrp = glue->wrp;
  138. #else
  139. const struct dsps_musb_wrapper *wrp = &ti81xx_driver_data;
  140. #endif
  141. void __iomem *reg_base = musb->ctrl_base;
  142. u32 epmask, coremask;
  143. /* Workaround: setup IRQs through both register sets. */
  144. epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
  145. ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
  146. coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
  147. dsps_writel(reg_base, wrp->epintr_set, epmask);
  148. dsps_writel(reg_base, wrp->coreintr_set, coremask);
  149. /* Force the DRVVBUS IRQ so we can start polling for ID change. */
  150. #ifndef __UBOOT__
  151. if (is_otg_enabled(musb))
  152. dsps_writel(reg_base, wrp->coreintr_set,
  153. (1 << wrp->drvvbus) << wrp->usb_shift);
  154. #else
  155. return 0;
  156. #endif
  157. }
  158. /**
  159. * dsps_musb_disable - disable HDRC and flush interrupts
  160. */
  161. static void dsps_musb_disable(struct musb *musb)
  162. {
  163. #ifndef __UBOOT__
  164. struct device *dev = musb->controller;
  165. struct platform_device *pdev = to_platform_device(dev->parent);
  166. struct dsps_glue *glue = platform_get_drvdata(pdev);
  167. const struct dsps_musb_wrapper *wrp = glue->wrp;
  168. void __iomem *reg_base = musb->ctrl_base;
  169. dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
  170. dsps_writel(reg_base, wrp->epintr_clear,
  171. wrp->txep_bitmap | wrp->rxep_bitmap);
  172. dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
  173. dsps_writel(reg_base, wrp->eoi, 0);
  174. #endif
  175. }
  176. #ifndef __UBOOT__
  177. static void otg_timer(unsigned long _musb)
  178. {
  179. struct musb *musb = (void *)_musb;
  180. void __iomem *mregs = musb->mregs;
  181. struct device *dev = musb->controller;
  182. struct platform_device *pdev = to_platform_device(dev->parent);
  183. struct dsps_glue *glue = platform_get_drvdata(pdev);
  184. const struct dsps_musb_wrapper *wrp = glue->wrp;
  185. u8 devctl;
  186. unsigned long flags;
  187. /*
  188. * We poll because DSPS IP's won't expose several OTG-critical
  189. * status change events (from the transceiver) otherwise.
  190. */
  191. devctl = dsps_readb(mregs, MUSB_DEVCTL);
  192. dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
  193. otg_state_string(musb->xceiv->state));
  194. spin_lock_irqsave(&musb->lock, flags);
  195. switch (musb->xceiv->state) {
  196. case OTG_STATE_A_WAIT_BCON:
  197. devctl &= ~MUSB_DEVCTL_SESSION;
  198. dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  199. devctl = dsps_readb(musb->mregs, MUSB_DEVCTL);
  200. if (devctl & MUSB_DEVCTL_BDEVICE) {
  201. musb->xceiv->state = OTG_STATE_B_IDLE;
  202. MUSB_DEV_MODE(musb);
  203. } else {
  204. musb->xceiv->state = OTG_STATE_A_IDLE;
  205. MUSB_HST_MODE(musb);
  206. }
  207. break;
  208. case OTG_STATE_A_WAIT_VFALL:
  209. musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
  210. dsps_writel(musb->ctrl_base, wrp->coreintr_set,
  211. MUSB_INTR_VBUSERROR << wrp->usb_shift);
  212. break;
  213. case OTG_STATE_B_IDLE:
  214. if (!is_peripheral_enabled(musb))
  215. break;
  216. devctl = dsps_readb(mregs, MUSB_DEVCTL);
  217. if (devctl & MUSB_DEVCTL_BDEVICE)
  218. mod_timer(&glue->timer,
  219. jiffies + wrp->poll_seconds * HZ);
  220. else
  221. musb->xceiv->state = OTG_STATE_A_IDLE;
  222. break;
  223. default:
  224. break;
  225. }
  226. spin_unlock_irqrestore(&musb->lock, flags);
  227. }
  228. static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
  229. {
  230. struct device *dev = musb->controller;
  231. struct platform_device *pdev = to_platform_device(dev->parent);
  232. struct dsps_glue *glue = platform_get_drvdata(pdev);
  233. static unsigned long last_timer;
  234. if (!is_otg_enabled(musb))
  235. return;
  236. if (timeout == 0)
  237. timeout = jiffies + msecs_to_jiffies(3);
  238. /* Never idle if active, or when VBUS timeout is not set as host */
  239. if (musb->is_active || (musb->a_wait_bcon == 0 &&
  240. musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) {
  241. dev_dbg(musb->controller, "%s active, deleting timer\n",
  242. otg_state_string(musb->xceiv->state));
  243. del_timer(&glue->timer);
  244. last_timer = jiffies;
  245. return;
  246. }
  247. if (time_after(last_timer, timeout) && timer_pending(&glue->timer)) {
  248. dev_dbg(musb->controller,
  249. "Longer idle timer already pending, ignoring...\n");
  250. return;
  251. }
  252. last_timer = timeout;
  253. dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
  254. otg_state_string(musb->xceiv->state),
  255. jiffies_to_msecs(timeout - jiffies));
  256. mod_timer(&glue->timer, timeout);
  257. }
  258. #endif
  259. static irqreturn_t dsps_interrupt(int irq, void *hci)
  260. {
  261. struct musb *musb = hci;
  262. void __iomem *reg_base = musb->ctrl_base;
  263. #ifndef __UBOOT__
  264. struct device *dev = musb->controller;
  265. struct platform_device *pdev = to_platform_device(dev->parent);
  266. struct dsps_glue *glue = platform_get_drvdata(pdev);
  267. const struct dsps_musb_wrapper *wrp = glue->wrp;
  268. #else
  269. const struct dsps_musb_wrapper *wrp = &ti81xx_driver_data;
  270. #endif
  271. unsigned long flags;
  272. irqreturn_t ret = IRQ_NONE;
  273. u32 epintr, usbintr;
  274. spin_lock_irqsave(&musb->lock, flags);
  275. /* Get endpoint interrupts */
  276. epintr = dsps_readl(reg_base, wrp->epintr_status);
  277. musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
  278. musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
  279. if (epintr)
  280. dsps_writel(reg_base, wrp->epintr_status, epintr);
  281. /* Get usb core interrupts */
  282. usbintr = dsps_readl(reg_base, wrp->coreintr_status);
  283. if (!usbintr && !epintr)
  284. goto eoi;
  285. musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
  286. if (usbintr)
  287. dsps_writel(reg_base, wrp->coreintr_status, usbintr);
  288. dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
  289. usbintr, epintr);
  290. #ifndef __UBOOT__
  291. /*
  292. * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
  293. * DSPS IP's missing ID change IRQ. We need an ID change IRQ to
  294. * switch appropriately between halves of the OTG state machine.
  295. * Managing DEVCTL.SESSION per Mentor docs requires that we know its
  296. * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
  297. * Also, DRVVBUS pulses for SRP (but not at 5V) ...
  298. */
  299. if ((usbintr & MUSB_INTR_BABBLE) && is_host_enabled(musb))
  300. pr_info("CAUTION: musb: Babble Interrupt Occured\n");
  301. if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
  302. int drvvbus = dsps_readl(reg_base, wrp->status);
  303. void __iomem *mregs = musb->mregs;
  304. u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
  305. int err;
  306. err = is_host_enabled(musb) && (musb->int_usb &
  307. MUSB_INTR_VBUSERROR);
  308. if (err) {
  309. /*
  310. * The Mentor core doesn't debounce VBUS as needed
  311. * to cope with device connect current spikes. This
  312. * means it's not uncommon for bus-powered devices
  313. * to get VBUS errors during enumeration.
  314. *
  315. * This is a workaround, but newer RTL from Mentor
  316. * seems to allow a better one: "re"-starting sessions
  317. * without waiting for VBUS to stop registering in
  318. * devctl.
  319. */
  320. musb->int_usb &= ~MUSB_INTR_VBUSERROR;
  321. musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
  322. mod_timer(&glue->timer,
  323. jiffies + wrp->poll_seconds * HZ);
  324. WARNING("VBUS error workaround (delay coming)\n");
  325. } else if (is_host_enabled(musb) && drvvbus) {
  326. musb->is_active = 1;
  327. MUSB_HST_MODE(musb);
  328. musb->xceiv->otg->default_a = 1;
  329. musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
  330. del_timer(&glue->timer);
  331. } else {
  332. musb->is_active = 0;
  333. MUSB_DEV_MODE(musb);
  334. musb->xceiv->otg->default_a = 0;
  335. musb->xceiv->state = OTG_STATE_B_IDLE;
  336. }
  337. /* NOTE: this must complete power-on within 100 ms. */
  338. dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
  339. drvvbus ? "on" : "off",
  340. otg_state_string(musb->xceiv->state),
  341. err ? " ERROR" : "",
  342. devctl);
  343. ret = IRQ_HANDLED;
  344. }
  345. #endif
  346. if (musb->int_tx || musb->int_rx || musb->int_usb)
  347. ret |= musb_interrupt(musb);
  348. eoi:
  349. /* EOI needs to be written for the IRQ to be re-asserted. */
  350. if (ret == IRQ_HANDLED || epintr || usbintr)
  351. dsps_writel(reg_base, wrp->eoi, 1);
  352. #ifndef __UBOOT__
  353. /* Poll for ID change */
  354. if (is_otg_enabled(musb) && musb->xceiv->state == OTG_STATE_B_IDLE)
  355. mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
  356. #endif
  357. spin_unlock_irqrestore(&musb->lock, flags);
  358. return ret;
  359. }
  360. static int dsps_musb_init(struct musb *musb)
  361. {
  362. #ifndef __UBOOT__
  363. struct device *dev = musb->controller;
  364. struct musb_hdrc_platform_data *plat = dev->platform_data;
  365. struct platform_device *pdev = to_platform_device(dev->parent);
  366. struct dsps_glue *glue = platform_get_drvdata(pdev);
  367. const struct dsps_musb_wrapper *wrp = glue->wrp;
  368. struct omap_musb_board_data *data = plat->board_data;
  369. #else
  370. struct omap_musb_board_data *data =
  371. (struct omap_musb_board_data *)musb->controller;
  372. const struct dsps_musb_wrapper *wrp = &ti81xx_driver_data;
  373. #endif
  374. void __iomem *reg_base = musb->ctrl_base;
  375. u32 rev, val;
  376. int status;
  377. /* mentor core register starts at offset of 0x400 from musb base */
  378. musb->mregs += wrp->musb_core_offset;
  379. #ifndef __UBOOT__
  380. /* NOP driver needs change if supporting dual instance */
  381. usb_nop_xceiv_register();
  382. musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
  383. if (IS_ERR_OR_NULL(musb->xceiv))
  384. return -ENODEV;
  385. #endif
  386. /* Returns zero if e.g. not clocked */
  387. rev = dsps_readl(reg_base, wrp->revision);
  388. if (!rev) {
  389. status = -ENODEV;
  390. goto err0;
  391. }
  392. #ifndef __UBOOT__
  393. if (is_host_enabled(musb))
  394. setup_timer(&glue->timer, otg_timer, (unsigned long) musb);
  395. #endif
  396. /* Reset the musb */
  397. dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
  398. /* Start the on-chip PHY and its PLL. */
  399. if (data->set_phy_power)
  400. data->set_phy_power(1);
  401. musb->isr = dsps_interrupt;
  402. /* reset the otgdisable bit, needed for host mode to work */
  403. val = dsps_readl(reg_base, wrp->phy_utmi);
  404. val &= ~(1 << wrp->otg_disable);
  405. dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);
  406. /* clear level interrupt */
  407. dsps_writel(reg_base, wrp->eoi, 0);
  408. return 0;
  409. err0:
  410. #ifndef __UBOOT__
  411. usb_put_phy(musb->xceiv);
  412. usb_nop_xceiv_unregister();
  413. #endif
  414. return status;
  415. }
  416. static int dsps_musb_exit(struct musb *musb)
  417. {
  418. #ifndef __UBOOT__
  419. struct device *dev = musb->controller;
  420. struct musb_hdrc_platform_data *plat = dev->platform_data;
  421. struct omap_musb_board_data *data = plat->board_data;
  422. struct platform_device *pdev = to_platform_device(dev->parent);
  423. struct dsps_glue *glue = platform_get_drvdata(pdev);
  424. #else
  425. struct omap_musb_board_data *data =
  426. (struct omap_musb_board_data *)musb->controller;
  427. #endif
  428. #ifndef __UBOOT__
  429. if (is_host_enabled(musb))
  430. del_timer_sync(&glue->timer);
  431. #endif
  432. /* Shutdown the on-chip PHY and its PLL. */
  433. if (data->set_phy_power)
  434. data->set_phy_power(0);
  435. #ifndef __UBOOT__
  436. /* NOP driver needs change if supporting dual instance */
  437. usb_put_phy(musb->xceiv);
  438. usb_nop_xceiv_unregister();
  439. #endif
  440. return 0;
  441. }
  442. #ifndef __UBOOT__
  443. static struct musb_platform_ops dsps_ops = {
  444. #else
  445. struct musb_platform_ops musb_dsps_ops = {
  446. #endif
  447. .init = dsps_musb_init,
  448. .exit = dsps_musb_exit,
  449. .enable = dsps_musb_enable,
  450. .disable = dsps_musb_disable,
  451. #ifndef __UBOOT__
  452. .try_idle = dsps_musb_try_idle,
  453. #endif
  454. };
  455. #ifndef __UBOOT__
  456. static u64 musb_dmamask = DMA_BIT_MASK(32);
  457. #endif
  458. #ifndef __UBOOT__
  459. static int __devinit dsps_create_musb_pdev(struct dsps_glue *glue, u8 id)
  460. {
  461. struct device *dev = glue->dev;
  462. struct platform_device *pdev = to_platform_device(dev);
  463. struct musb_hdrc_platform_data *pdata = dev->platform_data;
  464. struct platform_device *musb;
  465. struct resource *res;
  466. struct resource resources[2];
  467. char res_name[10];
  468. int ret;
  469. /* get memory resource */
  470. sprintf(res_name, "musb%d", id);
  471. res = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name);
  472. if (!res) {
  473. dev_err(dev, "%s get mem resource failed\n", res_name);
  474. ret = -ENODEV;
  475. goto err0;
  476. }
  477. res->parent = NULL;
  478. resources[0] = *res;
  479. /* get irq resource */
  480. sprintf(res_name, "musb%d-irq", id);
  481. res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name);
  482. if (!res) {
  483. dev_err(dev, "%s get irq resource failed\n", res_name);
  484. ret = -ENODEV;
  485. goto err0;
  486. }
  487. res->parent = NULL;
  488. resources[1] = *res;
  489. resources[1].name = "mc";
  490. /* allocate the child platform device */
  491. musb = platform_device_alloc("musb-hdrc", -1);
  492. if (!musb) {
  493. dev_err(dev, "failed to allocate musb device\n");
  494. ret = -ENOMEM;
  495. goto err0;
  496. }
  497. musb->dev.parent = dev;
  498. musb->dev.dma_mask = &musb_dmamask;
  499. musb->dev.coherent_dma_mask = musb_dmamask;
  500. glue->musb = musb;
  501. pdata->platform_ops = &dsps_ops;
  502. ret = platform_device_add_resources(musb, resources, 2);
  503. if (ret) {
  504. dev_err(dev, "failed to add resources\n");
  505. goto err1;
  506. }
  507. ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
  508. if (ret) {
  509. dev_err(dev, "failed to add platform_data\n");
  510. goto err1;
  511. }
  512. ret = platform_device_add(musb);
  513. if (ret) {
  514. dev_err(dev, "failed to register musb device\n");
  515. goto err1;
  516. }
  517. return 0;
  518. err1:
  519. platform_device_put(musb);
  520. err0:
  521. return ret;
  522. }
  523. static void __devexit dsps_delete_musb_pdev(struct dsps_glue *glue)
  524. {
  525. platform_device_del(glue->musb);
  526. platform_device_put(glue->musb);
  527. }
  528. static int __devinit dsps_probe(struct platform_device *pdev)
  529. {
  530. const struct platform_device_id *id = platform_get_device_id(pdev);
  531. const struct dsps_musb_wrapper *wrp =
  532. (struct dsps_musb_wrapper *)id->driver_data;
  533. struct dsps_glue *glue;
  534. struct resource *iomem;
  535. int ret;
  536. /* allocate glue */
  537. glue = kzalloc(sizeof(*glue), GFP_KERNEL);
  538. if (!glue) {
  539. dev_err(&pdev->dev, "unable to allocate glue memory\n");
  540. ret = -ENOMEM;
  541. goto err0;
  542. }
  543. /* get memory resource */
  544. iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  545. if (!iomem) {
  546. dev_err(&pdev->dev, "failed to get usbss mem resource\n");
  547. ret = -ENODEV;
  548. goto err1;
  549. }
  550. glue->dev = &pdev->dev;
  551. glue->wrp = kmemdup(wrp, sizeof(*wrp), GFP_KERNEL);
  552. if (!glue->wrp) {
  553. dev_err(&pdev->dev, "failed to duplicate wrapper struct memory\n");
  554. ret = -ENOMEM;
  555. goto err1;
  556. }
  557. platform_set_drvdata(pdev, glue);
  558. /* enable the usbss clocks */
  559. pm_runtime_enable(&pdev->dev);
  560. ret = pm_runtime_get_sync(&pdev->dev);
  561. if (ret < 0) {
  562. dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
  563. goto err2;
  564. }
  565. /* create the child platform device for first instances of musb */
  566. ret = dsps_create_musb_pdev(glue, 0);
  567. if (ret != 0) {
  568. dev_err(&pdev->dev, "failed to create child pdev\n");
  569. goto err3;
  570. }
  571. return 0;
  572. err3:
  573. pm_runtime_put(&pdev->dev);
  574. err2:
  575. pm_runtime_disable(&pdev->dev);
  576. kfree(glue->wrp);
  577. err1:
  578. kfree(glue);
  579. err0:
  580. return ret;
  581. }
  582. static int __devexit dsps_remove(struct platform_device *pdev)
  583. {
  584. struct dsps_glue *glue = platform_get_drvdata(pdev);
  585. /* delete the child platform device */
  586. dsps_delete_musb_pdev(glue);
  587. /* disable usbss clocks */
  588. pm_runtime_put(&pdev->dev);
  589. pm_runtime_disable(&pdev->dev);
  590. kfree(glue->wrp);
  591. kfree(glue);
  592. return 0;
  593. }
  594. #ifdef CONFIG_PM_SLEEP
  595. static int dsps_suspend(struct device *dev)
  596. {
  597. struct musb_hdrc_platform_data *plat = dev->platform_data;
  598. struct omap_musb_board_data *data = plat->board_data;
  599. /* Shutdown the on-chip PHY and its PLL. */
  600. if (data->set_phy_power)
  601. data->set_phy_power(0);
  602. return 0;
  603. }
  604. static int dsps_resume(struct device *dev)
  605. {
  606. struct musb_hdrc_platform_data *plat = dev->platform_data;
  607. struct omap_musb_board_data *data = plat->board_data;
  608. /* Start the on-chip PHY and its PLL. */
  609. if (data->set_phy_power)
  610. data->set_phy_power(1);
  611. return 0;
  612. }
  613. #endif
  614. static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
  615. #endif
  616. #ifndef __UBOOT__
  617. static const struct platform_device_id musb_dsps_id_table[] __devinitconst = {
  618. {
  619. .name = "musb-ti81xx",
  620. .driver_data = (kernel_ulong_t) &ti81xx_driver_data,
  621. },
  622. { }, /* Terminating Entry */
  623. };
  624. MODULE_DEVICE_TABLE(platform, musb_dsps_id_table);
  625. static const struct of_device_id musb_dsps_of_match[] __devinitconst = {
  626. { .compatible = "musb-ti81xx", },
  627. { .compatible = "ti,ti81xx-musb", },
  628. { .compatible = "ti,am335x-musb", },
  629. { },
  630. };
  631. MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
  632. static struct platform_driver dsps_usbss_driver = {
  633. .probe = dsps_probe,
  634. .remove = __devexit_p(dsps_remove),
  635. .driver = {
  636. .name = "musb-dsps",
  637. .pm = &dsps_pm_ops,
  638. .of_match_table = musb_dsps_of_match,
  639. },
  640. .id_table = musb_dsps_id_table,
  641. };
  642. MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
  643. MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
  644. MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
  645. MODULE_LICENSE("GPL v2");
  646. static int __init dsps_init(void)
  647. {
  648. return platform_driver_register(&dsps_usbss_driver);
  649. }
  650. subsys_initcall(dsps_init);
  651. static void __exit dsps_exit(void)
  652. {
  653. platform_driver_unregister(&dsps_usbss_driver);
  654. }
  655. module_exit(dsps_exit);
  656. #endif