nand_base.c 135 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952395339543955395639573958395939603961396239633964396539663967396839693970397139723973397439753976397739783979398039813982398339843985398639873988398939903991399239933994399539963997399839994000400140024003400440054006400740084009401040114012401340144015401640174018401940204021402240234024402540264027402840294030403140324033403440354036403740384039404040414042404340444045404640474048404940504051405240534054405540564057405840594060406140624063406440654066406740684069407040714072407340744075407640774078407940804081408240834084408540864087408840894090409140924093409440954096409740984099410041014102410341044105410641074108410941104111411241134114411541164117411841194120412141224123412441254126412741284129413041314132413341344135413641374138413941404141414241434144414541464147414841494150415141524153415441554156415741584159416041614162416341644165416641674168416941704171417241734174417541764177417841794180418141824183418441854186418741884189419041914192419341944195419641974198419942004201420242034204420542064207420842094210421142124213421442154216421742184219422042214222422342244225422642274228422942304231423242334234423542364237423842394240424142424243424442454246424742484249425042514252425342544255425642574258425942604261426242634264426542664267426842694270427142724273427442754276427742784279428042814282428342844285428642874288428942904291429242934294429542964297429842994300430143024303430443054306430743084309431043114312431343144315431643174318431943204321432243234324432543264327432843294330433143324333433443354336433743384339434043414342434343444345434643474348434943504351435243534354435543564357435843594360436143624363436443654366436743684369437043714372437343744375437643774378437943804381438243834384438543864387438843894390439143924393439443954396439743984399440044014402440344044405440644074408440944104411441244134414441544164417441844194420442144224423442444254426442744284429443044314432443344344435443644374438443944404441444244434444444544464447444844494450445144524453445444554456445744584459446044614462446344644465446644674468446944704471447244734474447544764477447844794480448144824483448444854486448744884489449044914492449344944495449644974498449945004501450245034504450545064507450845094510451145124513451445154516451745184519452045214522452345244525452645274528452945304531453245334534453545364537453845394540454145424543454445454546454745484549455045514552455345544555455645574558455945604561456245634564456545664567456845694570457145724573457445754576457745784579458045814582458345844585458645874588458945904591459245934594459545964597459845994600460146024603460446054606460746084609461046114612461346144615461646174618461946204621462246234624462546264627462846294630463146324633463446354636463746384639464046414642464346444645464646474648464946504651465246534654465546564657465846594660466146624663466446654666466746684669467046714672467346744675467646774678467946804681468246834684468546864687468846894690469146924693469446954696469746984699470047014702470347044705470647074708470947104711471247134714471547164717471847194720472147224723472447254726472747284729473047314732473347344735473647374738473947404741474247434744474547464747474847494750475147524753475447554756475747584759476047614762476347644765476647674768476947704771477247734774477547764777477847794780478147824783478447854786478747884789479047914792479347944795479647974798479948004801480248034804480548064807480848094810481148124813481448154816481748184819482048214822482348244825482648274828482948304831483248334834483548364837483848394840484148424843484448454846484748484849485048514852485348544855485648574858485948604861486248634864486548664867486848694870487148724873487448754876487748784879488048814882488348844885488648874888488948904891489248934894489548964897489848994900490149024903490449054906490749084909491049114912491349144915491649174918491949204921492249234924492549264927492849294930493149324933493449354936493749384939494049414942494349444945494649474948494949504951495249534954495549564957495849594960496149624963496449654966496749684969497049714972497349744975497649774978497949804981498249834984498549864987498849894990499149924993499449954996499749984999500050015002500350045005500650075008500950105011501250135014501550165017501850195020502150225023502450255026502750285029503050315032503350345035503650375038503950405041504250435044504550465047504850495050505150525053505450555056505750585059506050615062506350645065506650675068506950705071507250735074507550765077507850795080508150825083508450855086508750885089509050915092509350945095509650975098509951005101510251035104510551065107510851095110511151125113511451155116511751185119512051215122512351245125512651275128512951305131513251335134513551365137513851395140514151425143514451455146514751485149515051515152515351545155515651575158515951605161516251635164516551665167516851695170517151725173517451755176517751785179518051815182518351845185518651875188518951905191519251935194519551965197519851995200520152025203520452055206520752085209521052115212521352145215521652175218521952205221522252235224522552265227522852295230523152325233523452355236523752385239524052415242524352445245524652475248524952505251525252535254525552565257525852595260526152625263526452655266526752685269527052715272527352745275527652775278527952805281528252835284528552865287528852895290529152925293529452955296529752985299530053015302530353045305530653075308530953105311531253135314531553165317
  1. /*
  2. * Overview:
  3. * This is the generic MTD driver for NAND flash devices. It should be
  4. * capable of working with almost all NAND chips currently available.
  5. *
  6. * Additional technical information is available on
  7. * http://www.linux-mtd.infradead.org/doc/nand.html
  8. *
  9. * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
  10. * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
  11. *
  12. * Credits:
  13. * David Woodhouse for adding multichip support
  14. *
  15. * Aleph One Ltd. and Toby Churchill Ltd. for supporting the
  16. * rework for 2K page size chips
  17. *
  18. * TODO:
  19. * Enable cached programming for 2k page size chips
  20. * Check, if mtd->ecctype should be set to MTD_ECC_HW
  21. * if we have HW ECC support.
  22. * BBT table is not serialized, has to be fixed
  23. *
  24. * This program is free software; you can redistribute it and/or modify
  25. * it under the terms of the GNU General Public License version 2 as
  26. * published by the Free Software Foundation.
  27. *
  28. */
  29. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30. #include <common.h>
  31. #if CONFIG_IS_ENABLED(OF_CONTROL)
  32. #include <fdtdec.h>
  33. #endif
  34. #include <malloc.h>
  35. #include <watchdog.h>
  36. #include <dm/devres.h>
  37. #include <linux/err.h>
  38. #include <linux/compat.h>
  39. #include <linux/mtd/mtd.h>
  40. #include <linux/mtd/rawnand.h>
  41. #include <linux/mtd/nand_ecc.h>
  42. #include <linux/mtd/nand_bch.h>
  43. #ifdef CONFIG_MTD_PARTITIONS
  44. #include <linux/mtd/partitions.h>
  45. #endif
  46. #include <asm/io.h>
  47. #include <linux/errno.h>
  48. /* Define default oob placement schemes for large and small page devices */
  49. #ifndef CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
  50. static struct nand_ecclayout nand_oob_8 = {
  51. .eccbytes = 3,
  52. .eccpos = {0, 1, 2},
  53. .oobfree = {
  54. {.offset = 3,
  55. .length = 2},
  56. {.offset = 6,
  57. .length = 2} }
  58. };
  59. static struct nand_ecclayout nand_oob_16 = {
  60. .eccbytes = 6,
  61. .eccpos = {0, 1, 2, 3, 6, 7},
  62. .oobfree = {
  63. {.offset = 8,
  64. . length = 8} }
  65. };
  66. static struct nand_ecclayout nand_oob_64 = {
  67. .eccbytes = 24,
  68. .eccpos = {
  69. 40, 41, 42, 43, 44, 45, 46, 47,
  70. 48, 49, 50, 51, 52, 53, 54, 55,
  71. 56, 57, 58, 59, 60, 61, 62, 63},
  72. .oobfree = {
  73. {.offset = 2,
  74. .length = 38} }
  75. };
  76. static struct nand_ecclayout nand_oob_128 = {
  77. .eccbytes = 48,
  78. .eccpos = {
  79. 80, 81, 82, 83, 84, 85, 86, 87,
  80. 88, 89, 90, 91, 92, 93, 94, 95,
  81. 96, 97, 98, 99, 100, 101, 102, 103,
  82. 104, 105, 106, 107, 108, 109, 110, 111,
  83. 112, 113, 114, 115, 116, 117, 118, 119,
  84. 120, 121, 122, 123, 124, 125, 126, 127},
  85. .oobfree = {
  86. {.offset = 2,
  87. .length = 78} }
  88. };
  89. #endif
  90. static int nand_get_device(struct mtd_info *mtd, int new_state);
  91. static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
  92. struct mtd_oob_ops *ops);
  93. /*
  94. * For devices which display every fart in the system on a separate LED. Is
  95. * compiled away when LED support is disabled.
  96. */
  97. DEFINE_LED_TRIGGER(nand_led_trigger);
  98. static int check_offs_len(struct mtd_info *mtd,
  99. loff_t ofs, uint64_t len)
  100. {
  101. struct nand_chip *chip = mtd_to_nand(mtd);
  102. int ret = 0;
  103. /* Start address must align on block boundary */
  104. if (ofs & ((1ULL << chip->phys_erase_shift) - 1)) {
  105. pr_debug("%s: unaligned address\n", __func__);
  106. ret = -EINVAL;
  107. }
  108. /* Length must align on block boundary */
  109. if (len & ((1ULL << chip->phys_erase_shift) - 1)) {
  110. pr_debug("%s: length not block aligned\n", __func__);
  111. ret = -EINVAL;
  112. }
  113. return ret;
  114. }
  115. /**
  116. * nand_release_device - [GENERIC] release chip
  117. * @mtd: MTD device structure
  118. *
  119. * Release chip lock and wake up anyone waiting on the device.
  120. */
  121. static void nand_release_device(struct mtd_info *mtd)
  122. {
  123. struct nand_chip *chip = mtd_to_nand(mtd);
  124. /* De-select the NAND device */
  125. chip->select_chip(mtd, -1);
  126. }
  127. /**
  128. * nand_read_byte - [DEFAULT] read one byte from the chip
  129. * @mtd: MTD device structure
  130. *
  131. * Default read function for 8bit buswidth
  132. */
  133. uint8_t nand_read_byte(struct mtd_info *mtd)
  134. {
  135. struct nand_chip *chip = mtd_to_nand(mtd);
  136. return readb(chip->IO_ADDR_R);
  137. }
  138. /**
  139. * nand_read_byte16 - [DEFAULT] read one byte endianness aware from the chip
  140. * @mtd: MTD device structure
  141. *
  142. * Default read function for 16bit buswidth with endianness conversion.
  143. *
  144. */
  145. static uint8_t nand_read_byte16(struct mtd_info *mtd)
  146. {
  147. struct nand_chip *chip = mtd_to_nand(mtd);
  148. return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R));
  149. }
  150. /**
  151. * nand_read_word - [DEFAULT] read one word from the chip
  152. * @mtd: MTD device structure
  153. *
  154. * Default read function for 16bit buswidth without endianness conversion.
  155. */
  156. static u16 nand_read_word(struct mtd_info *mtd)
  157. {
  158. struct nand_chip *chip = mtd_to_nand(mtd);
  159. return readw(chip->IO_ADDR_R);
  160. }
  161. /**
  162. * nand_select_chip - [DEFAULT] control CE line
  163. * @mtd: MTD device structure
  164. * @chipnr: chipnumber to select, -1 for deselect
  165. *
  166. * Default select function for 1 chip devices.
  167. */
  168. static void nand_select_chip(struct mtd_info *mtd, int chipnr)
  169. {
  170. struct nand_chip *chip = mtd_to_nand(mtd);
  171. switch (chipnr) {
  172. case -1:
  173. chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);
  174. break;
  175. case 0:
  176. break;
  177. default:
  178. BUG();
  179. }
  180. }
  181. /**
  182. * nand_write_byte - [DEFAULT] write single byte to chip
  183. * @mtd: MTD device structure
  184. * @byte: value to write
  185. *
  186. * Default function to write a byte to I/O[7:0]
  187. */
  188. static void nand_write_byte(struct mtd_info *mtd, uint8_t byte)
  189. {
  190. struct nand_chip *chip = mtd_to_nand(mtd);
  191. chip->write_buf(mtd, &byte, 1);
  192. }
  193. /**
  194. * nand_write_byte16 - [DEFAULT] write single byte to a chip with width 16
  195. * @mtd: MTD device structure
  196. * @byte: value to write
  197. *
  198. * Default function to write a byte to I/O[7:0] on a 16-bit wide chip.
  199. */
  200. static void nand_write_byte16(struct mtd_info *mtd, uint8_t byte)
  201. {
  202. struct nand_chip *chip = mtd_to_nand(mtd);
  203. uint16_t word = byte;
  204. /*
  205. * It's not entirely clear what should happen to I/O[15:8] when writing
  206. * a byte. The ONFi spec (Revision 3.1; 2012-09-19, Section 2.16) reads:
  207. *
  208. * When the host supports a 16-bit bus width, only data is
  209. * transferred at the 16-bit width. All address and command line
  210. * transfers shall use only the lower 8-bits of the data bus. During
  211. * command transfers, the host may place any value on the upper
  212. * 8-bits of the data bus. During address transfers, the host shall
  213. * set the upper 8-bits of the data bus to 00h.
  214. *
  215. * One user of the write_byte callback is nand_onfi_set_features. The
  216. * four parameters are specified to be written to I/O[7:0], but this is
  217. * neither an address nor a command transfer. Let's assume a 0 on the
  218. * upper I/O lines is OK.
  219. */
  220. chip->write_buf(mtd, (uint8_t *)&word, 2);
  221. }
  222. static void iowrite8_rep(void *addr, const uint8_t *buf, int len)
  223. {
  224. int i;
  225. for (i = 0; i < len; i++)
  226. writeb(buf[i], addr);
  227. }
  228. static void ioread8_rep(void *addr, uint8_t *buf, int len)
  229. {
  230. int i;
  231. for (i = 0; i < len; i++)
  232. buf[i] = readb(addr);
  233. }
  234. static void ioread16_rep(void *addr, void *buf, int len)
  235. {
  236. int i;
  237. u16 *p = (u16 *) buf;
  238. for (i = 0; i < len; i++)
  239. p[i] = readw(addr);
  240. }
  241. static void iowrite16_rep(void *addr, void *buf, int len)
  242. {
  243. int i;
  244. u16 *p = (u16 *) buf;
  245. for (i = 0; i < len; i++)
  246. writew(p[i], addr);
  247. }
  248. /**
  249. * nand_write_buf - [DEFAULT] write buffer to chip
  250. * @mtd: MTD device structure
  251. * @buf: data buffer
  252. * @len: number of bytes to write
  253. *
  254. * Default write function for 8bit buswidth.
  255. */
  256. void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
  257. {
  258. struct nand_chip *chip = mtd_to_nand(mtd);
  259. iowrite8_rep(chip->IO_ADDR_W, buf, len);
  260. }
  261. /**
  262. * nand_read_buf - [DEFAULT] read chip data into buffer
  263. * @mtd: MTD device structure
  264. * @buf: buffer to store date
  265. * @len: number of bytes to read
  266. *
  267. * Default read function for 8bit buswidth.
  268. */
  269. void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
  270. {
  271. struct nand_chip *chip = mtd_to_nand(mtd);
  272. ioread8_rep(chip->IO_ADDR_R, buf, len);
  273. }
  274. /**
  275. * nand_write_buf16 - [DEFAULT] write buffer to chip
  276. * @mtd: MTD device structure
  277. * @buf: data buffer
  278. * @len: number of bytes to write
  279. *
  280. * Default write function for 16bit buswidth.
  281. */
  282. void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
  283. {
  284. struct nand_chip *chip = mtd_to_nand(mtd);
  285. u16 *p = (u16 *) buf;
  286. iowrite16_rep(chip->IO_ADDR_W, p, len >> 1);
  287. }
  288. /**
  289. * nand_read_buf16 - [DEFAULT] read chip data into buffer
  290. * @mtd: MTD device structure
  291. * @buf: buffer to store date
  292. * @len: number of bytes to read
  293. *
  294. * Default read function for 16bit buswidth.
  295. */
  296. void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
  297. {
  298. struct nand_chip *chip = mtd_to_nand(mtd);
  299. u16 *p = (u16 *) buf;
  300. ioread16_rep(chip->IO_ADDR_R, p, len >> 1);
  301. }
  302. /**
  303. * nand_block_bad - [DEFAULT] Read bad block marker from the chip
  304. * @mtd: MTD device structure
  305. * @ofs: offset from device start
  306. *
  307. * Check, if the block is bad.
  308. */
  309. static int nand_block_bad(struct mtd_info *mtd, loff_t ofs)
  310. {
  311. int page, res = 0, i = 0;
  312. struct nand_chip *chip = mtd_to_nand(mtd);
  313. u16 bad;
  314. if (chip->bbt_options & NAND_BBT_SCANLASTPAGE)
  315. ofs += mtd->erasesize - mtd->writesize;
  316. page = (int)(ofs >> chip->page_shift) & chip->pagemask;
  317. do {
  318. if (chip->options & NAND_BUSWIDTH_16) {
  319. chip->cmdfunc(mtd, NAND_CMD_READOOB,
  320. chip->badblockpos & 0xFE, page);
  321. bad = cpu_to_le16(chip->read_word(mtd));
  322. if (chip->badblockpos & 0x1)
  323. bad >>= 8;
  324. else
  325. bad &= 0xFF;
  326. } else {
  327. chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos,
  328. page);
  329. bad = chip->read_byte(mtd);
  330. }
  331. if (likely(chip->badblockbits == 8))
  332. res = bad != 0xFF;
  333. else
  334. res = hweight8(bad) < chip->badblockbits;
  335. ofs += mtd->writesize;
  336. page = (int)(ofs >> chip->page_shift) & chip->pagemask;
  337. i++;
  338. } while (!res && i < 2 && (chip->bbt_options & NAND_BBT_SCAN2NDPAGE));
  339. return res;
  340. }
  341. /**
  342. * nand_default_block_markbad - [DEFAULT] mark a block bad via bad block marker
  343. * @mtd: MTD device structure
  344. * @ofs: offset from device start
  345. *
  346. * This is the default implementation, which can be overridden by a hardware
  347. * specific driver. It provides the details for writing a bad block marker to a
  348. * block.
  349. */
  350. static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
  351. {
  352. struct nand_chip *chip = mtd_to_nand(mtd);
  353. struct mtd_oob_ops ops;
  354. uint8_t buf[2] = { 0, 0 };
  355. int ret = 0, res, i = 0;
  356. memset(&ops, 0, sizeof(ops));
  357. ops.oobbuf = buf;
  358. ops.ooboffs = chip->badblockpos;
  359. if (chip->options & NAND_BUSWIDTH_16) {
  360. ops.ooboffs &= ~0x01;
  361. ops.len = ops.ooblen = 2;
  362. } else {
  363. ops.len = ops.ooblen = 1;
  364. }
  365. ops.mode = MTD_OPS_PLACE_OOB;
  366. /* Write to first/last page(s) if necessary */
  367. if (chip->bbt_options & NAND_BBT_SCANLASTPAGE)
  368. ofs += mtd->erasesize - mtd->writesize;
  369. do {
  370. res = nand_do_write_oob(mtd, ofs, &ops);
  371. if (!ret)
  372. ret = res;
  373. i++;
  374. ofs += mtd->writesize;
  375. } while ((chip->bbt_options & NAND_BBT_SCAN2NDPAGE) && i < 2);
  376. return ret;
  377. }
  378. /**
  379. * nand_block_markbad_lowlevel - mark a block bad
  380. * @mtd: MTD device structure
  381. * @ofs: offset from device start
  382. *
  383. * This function performs the generic NAND bad block marking steps (i.e., bad
  384. * block table(s) and/or marker(s)). We only allow the hardware driver to
  385. * specify how to write bad block markers to OOB (chip->block_markbad).
  386. *
  387. * We try operations in the following order:
  388. * (1) erase the affected block, to allow OOB marker to be written cleanly
  389. * (2) write bad block marker to OOB area of affected block (unless flag
  390. * NAND_BBT_NO_OOB_BBM is present)
  391. * (3) update the BBT
  392. * Note that we retain the first error encountered in (2) or (3), finish the
  393. * procedures, and dump the error in the end.
  394. */
  395. static int nand_block_markbad_lowlevel(struct mtd_info *mtd, loff_t ofs)
  396. {
  397. struct nand_chip *chip = mtd_to_nand(mtd);
  398. int res, ret = 0;
  399. if (!(chip->bbt_options & NAND_BBT_NO_OOB_BBM)) {
  400. struct erase_info einfo;
  401. /* Attempt erase before marking OOB */
  402. memset(&einfo, 0, sizeof(einfo));
  403. einfo.mtd = mtd;
  404. einfo.addr = ofs;
  405. einfo.len = 1ULL << chip->phys_erase_shift;
  406. nand_erase_nand(mtd, &einfo, 0);
  407. /* Write bad block marker to OOB */
  408. nand_get_device(mtd, FL_WRITING);
  409. ret = chip->block_markbad(mtd, ofs);
  410. nand_release_device(mtd);
  411. }
  412. /* Mark block bad in BBT */
  413. if (chip->bbt) {
  414. res = nand_markbad_bbt(mtd, ofs);
  415. if (!ret)
  416. ret = res;
  417. }
  418. if (!ret)
  419. mtd->ecc_stats.badblocks++;
  420. return ret;
  421. }
  422. /**
  423. * nand_check_wp - [GENERIC] check if the chip is write protected
  424. * @mtd: MTD device structure
  425. *
  426. * Check, if the device is write protected. The function expects, that the
  427. * device is already selected.
  428. */
  429. static int nand_check_wp(struct mtd_info *mtd)
  430. {
  431. struct nand_chip *chip = mtd_to_nand(mtd);
  432. u8 status;
  433. int ret;
  434. /* Broken xD cards report WP despite being writable */
  435. if (chip->options & NAND_BROKEN_XD)
  436. return 0;
  437. /* Check the WP bit */
  438. ret = nand_status_op(chip, &status);
  439. if (ret)
  440. return ret;
  441. return status & NAND_STATUS_WP ? 0 : 1;
  442. }
  443. /**
  444. * nand_block_isreserved - [GENERIC] Check if a block is marked reserved.
  445. * @mtd: MTD device structure
  446. * @ofs: offset from device start
  447. *
  448. * Check if the block is marked as reserved.
  449. */
  450. static int nand_block_isreserved(struct mtd_info *mtd, loff_t ofs)
  451. {
  452. struct nand_chip *chip = mtd_to_nand(mtd);
  453. if (!chip->bbt)
  454. return 0;
  455. /* Return info from the table */
  456. return nand_isreserved_bbt(mtd, ofs);
  457. }
  458. /**
  459. * nand_block_checkbad - [GENERIC] Check if a block is marked bad
  460. * @mtd: MTD device structure
  461. * @ofs: offset from device start
  462. * @allowbbt: 1, if its allowed to access the bbt area
  463. *
  464. * Check, if the block is bad. Either by reading the bad block table or
  465. * calling of the scan function.
  466. */
  467. static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int allowbbt)
  468. {
  469. struct nand_chip *chip = mtd_to_nand(mtd);
  470. if (!(chip->options & NAND_SKIP_BBTSCAN) &&
  471. !(chip->options & NAND_BBT_SCANNED)) {
  472. chip->options |= NAND_BBT_SCANNED;
  473. chip->scan_bbt(mtd);
  474. }
  475. if (!chip->bbt)
  476. return chip->block_bad(mtd, ofs);
  477. /* Return info from the table */
  478. return nand_isbad_bbt(mtd, ofs, allowbbt);
  479. }
  480. /**
  481. * nand_wait_ready - [GENERIC] Wait for the ready pin after commands.
  482. * @mtd: MTD device structure
  483. *
  484. * Wait for the ready pin after a command, and warn if a timeout occurs.
  485. */
  486. void nand_wait_ready(struct mtd_info *mtd)
  487. {
  488. struct nand_chip *chip = mtd_to_nand(mtd);
  489. u32 timeo = (CONFIG_SYS_HZ * 400) / 1000;
  490. u32 time_start;
  491. time_start = get_timer(0);
  492. /* Wait until command is processed or timeout occurs */
  493. while (get_timer(time_start) < timeo) {
  494. if (chip->dev_ready)
  495. if (chip->dev_ready(mtd))
  496. break;
  497. }
  498. if (!chip->dev_ready(mtd))
  499. pr_warn("timeout while waiting for chip to become ready\n");
  500. }
  501. EXPORT_SYMBOL_GPL(nand_wait_ready);
  502. /**
  503. * nand_wait_status_ready - [GENERIC] Wait for the ready status after commands.
  504. * @mtd: MTD device structure
  505. * @timeo: Timeout in ms
  506. *
  507. * Wait for status ready (i.e. command done) or timeout.
  508. */
  509. static void nand_wait_status_ready(struct mtd_info *mtd, unsigned long timeo)
  510. {
  511. register struct nand_chip *chip = mtd_to_nand(mtd);
  512. u32 time_start;
  513. int ret;
  514. timeo = (CONFIG_SYS_HZ * timeo) / 1000;
  515. time_start = get_timer(0);
  516. while (get_timer(time_start) < timeo) {
  517. u8 status;
  518. ret = nand_read_data_op(chip, &status, sizeof(status), true);
  519. if (ret)
  520. return;
  521. if (status & NAND_STATUS_READY)
  522. break;
  523. WATCHDOG_RESET();
  524. }
  525. };
  526. /**
  527. * nand_command - [DEFAULT] Send command to NAND device
  528. * @mtd: MTD device structure
  529. * @command: the command to be sent
  530. * @column: the column address for this command, -1 if none
  531. * @page_addr: the page address for this command, -1 if none
  532. *
  533. * Send command to NAND device. This function is used for small page devices
  534. * (512 Bytes per page).
  535. */
  536. static void nand_command(struct mtd_info *mtd, unsigned int command,
  537. int column, int page_addr)
  538. {
  539. register struct nand_chip *chip = mtd_to_nand(mtd);
  540. int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE;
  541. /* Write out the command to the device */
  542. if (command == NAND_CMD_SEQIN) {
  543. int readcmd;
  544. if (column >= mtd->writesize) {
  545. /* OOB area */
  546. column -= mtd->writesize;
  547. readcmd = NAND_CMD_READOOB;
  548. } else if (column < 256) {
  549. /* First 256 bytes --> READ0 */
  550. readcmd = NAND_CMD_READ0;
  551. } else {
  552. column -= 256;
  553. readcmd = NAND_CMD_READ1;
  554. }
  555. chip->cmd_ctrl(mtd, readcmd, ctrl);
  556. ctrl &= ~NAND_CTRL_CHANGE;
  557. }
  558. chip->cmd_ctrl(mtd, command, ctrl);
  559. /* Address cycle, when necessary */
  560. ctrl = NAND_CTRL_ALE | NAND_CTRL_CHANGE;
  561. /* Serially input address */
  562. if (column != -1) {
  563. /* Adjust columns for 16 bit buswidth */
  564. if (chip->options & NAND_BUSWIDTH_16 &&
  565. !nand_opcode_8bits(command))
  566. column >>= 1;
  567. chip->cmd_ctrl(mtd, column, ctrl);
  568. ctrl &= ~NAND_CTRL_CHANGE;
  569. }
  570. if (page_addr != -1) {
  571. chip->cmd_ctrl(mtd, page_addr, ctrl);
  572. ctrl &= ~NAND_CTRL_CHANGE;
  573. chip->cmd_ctrl(mtd, page_addr >> 8, ctrl);
  574. if (chip->options & NAND_ROW_ADDR_3)
  575. chip->cmd_ctrl(mtd, page_addr >> 16, ctrl);
  576. }
  577. chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
  578. /*
  579. * Program and erase have their own busy handlers status and sequential
  580. * in needs no delay
  581. */
  582. switch (command) {
  583. case NAND_CMD_PAGEPROG:
  584. case NAND_CMD_ERASE1:
  585. case NAND_CMD_ERASE2:
  586. case NAND_CMD_SEQIN:
  587. case NAND_CMD_STATUS:
  588. case NAND_CMD_READID:
  589. case NAND_CMD_SET_FEATURES:
  590. return;
  591. case NAND_CMD_RESET:
  592. if (chip->dev_ready)
  593. break;
  594. udelay(chip->chip_delay);
  595. chip->cmd_ctrl(mtd, NAND_CMD_STATUS,
  596. NAND_CTRL_CLE | NAND_CTRL_CHANGE);
  597. chip->cmd_ctrl(mtd,
  598. NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
  599. /* EZ-NAND can take upto 250ms as per ONFi v4.0 */
  600. nand_wait_status_ready(mtd, 250);
  601. return;
  602. /* This applies to read commands */
  603. default:
  604. /*
  605. * If we don't have access to the busy pin, we apply the given
  606. * command delay
  607. */
  608. if (!chip->dev_ready) {
  609. udelay(chip->chip_delay);
  610. return;
  611. }
  612. }
  613. /*
  614. * Apply this short delay always to ensure that we do wait tWB in
  615. * any case on any machine.
  616. */
  617. ndelay(100);
  618. nand_wait_ready(mtd);
  619. }
  620. /**
  621. * nand_command_lp - [DEFAULT] Send command to NAND large page device
  622. * @mtd: MTD device structure
  623. * @command: the command to be sent
  624. * @column: the column address for this command, -1 if none
  625. * @page_addr: the page address for this command, -1 if none
  626. *
  627. * Send command to NAND device. This is the version for the new large page
  628. * devices. We don't have the separate regions as we have in the small page
  629. * devices. We must emulate NAND_CMD_READOOB to keep the code compatible.
  630. */
  631. static void nand_command_lp(struct mtd_info *mtd, unsigned int command,
  632. int column, int page_addr)
  633. {
  634. register struct nand_chip *chip = mtd_to_nand(mtd);
  635. /* Emulate NAND_CMD_READOOB */
  636. if (command == NAND_CMD_READOOB) {
  637. column += mtd->writesize;
  638. command = NAND_CMD_READ0;
  639. }
  640. /* Command latch cycle */
  641. chip->cmd_ctrl(mtd, command, NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
  642. if (column != -1 || page_addr != -1) {
  643. int ctrl = NAND_CTRL_CHANGE | NAND_NCE | NAND_ALE;
  644. /* Serially input address */
  645. if (column != -1) {
  646. /* Adjust columns for 16 bit buswidth */
  647. if (chip->options & NAND_BUSWIDTH_16 &&
  648. !nand_opcode_8bits(command))
  649. column >>= 1;
  650. chip->cmd_ctrl(mtd, column, ctrl);
  651. ctrl &= ~NAND_CTRL_CHANGE;
  652. chip->cmd_ctrl(mtd, column >> 8, ctrl);
  653. }
  654. if (page_addr != -1) {
  655. chip->cmd_ctrl(mtd, page_addr, ctrl);
  656. chip->cmd_ctrl(mtd, page_addr >> 8,
  657. NAND_NCE | NAND_ALE);
  658. if (chip->options & NAND_ROW_ADDR_3)
  659. chip->cmd_ctrl(mtd, page_addr >> 16,
  660. NAND_NCE | NAND_ALE);
  661. }
  662. }
  663. chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
  664. /*
  665. * Program and erase have their own busy handlers status, sequential
  666. * in and status need no delay.
  667. */
  668. switch (command) {
  669. case NAND_CMD_CACHEDPROG:
  670. case NAND_CMD_PAGEPROG:
  671. case NAND_CMD_ERASE1:
  672. case NAND_CMD_ERASE2:
  673. case NAND_CMD_SEQIN:
  674. case NAND_CMD_RNDIN:
  675. case NAND_CMD_STATUS:
  676. case NAND_CMD_READID:
  677. case NAND_CMD_SET_FEATURES:
  678. return;
  679. case NAND_CMD_RESET:
  680. if (chip->dev_ready)
  681. break;
  682. udelay(chip->chip_delay);
  683. chip->cmd_ctrl(mtd, NAND_CMD_STATUS,
  684. NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
  685. chip->cmd_ctrl(mtd, NAND_CMD_NONE,
  686. NAND_NCE | NAND_CTRL_CHANGE);
  687. /* EZ-NAND can take upto 250ms as per ONFi v4.0 */
  688. nand_wait_status_ready(mtd, 250);
  689. return;
  690. case NAND_CMD_RNDOUT:
  691. /* No ready / busy check necessary */
  692. chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART,
  693. NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
  694. chip->cmd_ctrl(mtd, NAND_CMD_NONE,
  695. NAND_NCE | NAND_CTRL_CHANGE);
  696. return;
  697. case NAND_CMD_READ0:
  698. chip->cmd_ctrl(mtd, NAND_CMD_READSTART,
  699. NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
  700. chip->cmd_ctrl(mtd, NAND_CMD_NONE,
  701. NAND_NCE | NAND_CTRL_CHANGE);
  702. /* This applies to read commands */
  703. default:
  704. /*
  705. * If we don't have access to the busy pin, we apply the given
  706. * command delay.
  707. */
  708. if (!chip->dev_ready) {
  709. udelay(chip->chip_delay);
  710. return;
  711. }
  712. }
  713. /*
  714. * Apply this short delay always to ensure that we do wait tWB in
  715. * any case on any machine.
  716. */
  717. ndelay(100);
  718. nand_wait_ready(mtd);
  719. }
  720. /**
  721. * panic_nand_get_device - [GENERIC] Get chip for selected access
  722. * @chip: the nand chip descriptor
  723. * @mtd: MTD device structure
  724. * @new_state: the state which is requested
  725. *
  726. * Used when in panic, no locks are taken.
  727. */
  728. static void panic_nand_get_device(struct nand_chip *chip,
  729. struct mtd_info *mtd, int new_state)
  730. {
  731. /* Hardware controller shared among independent devices */
  732. chip->controller->active = chip;
  733. chip->state = new_state;
  734. }
  735. /**
  736. * nand_get_device - [GENERIC] Get chip for selected access
  737. * @mtd: MTD device structure
  738. * @new_state: the state which is requested
  739. *
  740. * Get the device and lock it for exclusive access
  741. */
  742. static int
  743. nand_get_device(struct mtd_info *mtd, int new_state)
  744. {
  745. struct nand_chip *chip = mtd_to_nand(mtd);
  746. chip->state = new_state;
  747. return 0;
  748. }
  749. /**
  750. * panic_nand_wait - [GENERIC] wait until the command is done
  751. * @mtd: MTD device structure
  752. * @chip: NAND chip structure
  753. * @timeo: timeout
  754. *
  755. * Wait for command done. This is a helper function for nand_wait used when
  756. * we are in interrupt context. May happen when in panic and trying to write
  757. * an oops through mtdoops.
  758. */
  759. static void panic_nand_wait(struct mtd_info *mtd, struct nand_chip *chip,
  760. unsigned long timeo)
  761. {
  762. int i;
  763. for (i = 0; i < timeo; i++) {
  764. if (chip->dev_ready) {
  765. if (chip->dev_ready(mtd))
  766. break;
  767. } else {
  768. int ret;
  769. u8 status;
  770. ret = nand_read_data_op(chip, &status, sizeof(status),
  771. true);
  772. if (ret)
  773. return;
  774. if (status & NAND_STATUS_READY)
  775. break;
  776. }
  777. mdelay(1);
  778. }
  779. }
  780. /**
  781. * nand_wait - [DEFAULT] wait until the command is done
  782. * @mtd: MTD device structure
  783. * @chip: NAND chip structure
  784. *
  785. * Wait for command done. This applies to erase and program only.
  786. */
  787. static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
  788. {
  789. unsigned long timeo = 400;
  790. u8 status;
  791. int ret;
  792. led_trigger_event(nand_led_trigger, LED_FULL);
  793. /*
  794. * Apply this short delay always to ensure that we do wait tWB in any
  795. * case on any machine.
  796. */
  797. ndelay(100);
  798. ret = nand_status_op(chip, NULL);
  799. if (ret)
  800. return ret;
  801. u32 timer = (CONFIG_SYS_HZ * timeo) / 1000;
  802. u32 time_start;
  803. time_start = get_timer(0);
  804. while (get_timer(time_start) < timer) {
  805. if (chip->dev_ready) {
  806. if (chip->dev_ready(mtd))
  807. break;
  808. } else {
  809. ret = nand_read_data_op(chip, &status,
  810. sizeof(status), true);
  811. if (ret)
  812. return ret;
  813. if (status & NAND_STATUS_READY)
  814. break;
  815. }
  816. }
  817. led_trigger_event(nand_led_trigger, LED_OFF);
  818. ret = nand_read_data_op(chip, &status, sizeof(status), true);
  819. if (ret)
  820. return ret;
  821. /* This can happen if in case of timeout or buggy dev_ready */
  822. WARN_ON(!(status & NAND_STATUS_READY));
  823. return status;
  824. }
  825. /**
  826. * nand_reset_data_interface - Reset data interface and timings
  827. * @chip: The NAND chip
  828. * @chipnr: Internal die id
  829. *
  830. * Reset the Data interface and timings to ONFI mode 0.
  831. *
  832. * Returns 0 for success or negative error code otherwise.
  833. */
  834. static int nand_reset_data_interface(struct nand_chip *chip, int chipnr)
  835. {
  836. struct mtd_info *mtd = nand_to_mtd(chip);
  837. const struct nand_data_interface *conf;
  838. int ret;
  839. if (!chip->setup_data_interface)
  840. return 0;
  841. /*
  842. * The ONFI specification says:
  843. * "
  844. * To transition from NV-DDR or NV-DDR2 to the SDR data
  845. * interface, the host shall use the Reset (FFh) command
  846. * using SDR timing mode 0. A device in any timing mode is
  847. * required to recognize Reset (FFh) command issued in SDR
  848. * timing mode 0.
  849. * "
  850. *
  851. * Configure the data interface in SDR mode and set the
  852. * timings to timing mode 0.
  853. */
  854. conf = nand_get_default_data_interface();
  855. ret = chip->setup_data_interface(mtd, chipnr, conf);
  856. if (ret)
  857. pr_err("Failed to configure data interface to SDR timing mode 0\n");
  858. return ret;
  859. }
  860. /**
  861. * nand_setup_data_interface - Setup the best data interface and timings
  862. * @chip: The NAND chip
  863. * @chipnr: Internal die id
  864. *
  865. * Find and configure the best data interface and NAND timings supported by
  866. * the chip and the driver.
  867. * First tries to retrieve supported timing modes from ONFI information,
  868. * and if the NAND chip does not support ONFI, relies on the
  869. * ->onfi_timing_mode_default specified in the nand_ids table.
  870. *
  871. * Returns 0 for success or negative error code otherwise.
  872. */
  873. static int nand_setup_data_interface(struct nand_chip *chip, int chipnr)
  874. {
  875. struct mtd_info *mtd = nand_to_mtd(chip);
  876. int ret;
  877. if (!chip->setup_data_interface || !chip->data_interface)
  878. return 0;
  879. /*
  880. * Ensure the timing mode has been changed on the chip side
  881. * before changing timings on the controller side.
  882. */
  883. if (chip->onfi_version) {
  884. u8 tmode_param[ONFI_SUBFEATURE_PARAM_LEN] = {
  885. chip->onfi_timing_mode_default,
  886. };
  887. ret = chip->onfi_set_features(mtd, chip,
  888. ONFI_FEATURE_ADDR_TIMING_MODE,
  889. tmode_param);
  890. if (ret)
  891. goto err;
  892. }
  893. ret = chip->setup_data_interface(mtd, chipnr, chip->data_interface);
  894. err:
  895. return ret;
  896. }
  897. /**
  898. * nand_init_data_interface - find the best data interface and timings
  899. * @chip: The NAND chip
  900. *
  901. * Find the best data interface and NAND timings supported by the chip
  902. * and the driver.
  903. * First tries to retrieve supported timing modes from ONFI information,
  904. * and if the NAND chip does not support ONFI, relies on the
  905. * ->onfi_timing_mode_default specified in the nand_ids table. After this
  906. * function nand_chip->data_interface is initialized with the best timing mode
  907. * available.
  908. *
  909. * Returns 0 for success or negative error code otherwise.
  910. */
  911. static int nand_init_data_interface(struct nand_chip *chip)
  912. {
  913. struct mtd_info *mtd = nand_to_mtd(chip);
  914. int modes, mode, ret;
  915. if (!chip->setup_data_interface)
  916. return 0;
  917. /*
  918. * First try to identify the best timings from ONFI parameters and
  919. * if the NAND does not support ONFI, fallback to the default ONFI
  920. * timing mode.
  921. */
  922. modes = onfi_get_async_timing_mode(chip);
  923. if (modes == ONFI_TIMING_MODE_UNKNOWN) {
  924. if (!chip->onfi_timing_mode_default)
  925. return 0;
  926. modes = GENMASK(chip->onfi_timing_mode_default, 0);
  927. }
  928. chip->data_interface = kzalloc(sizeof(*chip->data_interface),
  929. GFP_KERNEL);
  930. if (!chip->data_interface)
  931. return -ENOMEM;
  932. for (mode = fls(modes) - 1; mode >= 0; mode--) {
  933. ret = onfi_init_data_interface(chip, chip->data_interface,
  934. NAND_SDR_IFACE, mode);
  935. if (ret)
  936. continue;
  937. /* Pass -1 to only */
  938. ret = chip->setup_data_interface(mtd,
  939. NAND_DATA_IFACE_CHECK_ONLY,
  940. chip->data_interface);
  941. if (!ret) {
  942. chip->onfi_timing_mode_default = mode;
  943. break;
  944. }
  945. }
  946. return 0;
  947. }
  948. static void __maybe_unused nand_release_data_interface(struct nand_chip *chip)
  949. {
  950. kfree(chip->data_interface);
  951. }
  952. /**
  953. * nand_read_page_op - Do a READ PAGE operation
  954. * @chip: The NAND chip
  955. * @page: page to read
  956. * @offset_in_page: offset within the page
  957. * @buf: buffer used to store the data
  958. * @len: length of the buffer
  959. *
  960. * This function issues a READ PAGE operation.
  961. * This function does not select/unselect the CS line.
  962. *
  963. * Returns 0 on success, a negative error code otherwise.
  964. */
  965. int nand_read_page_op(struct nand_chip *chip, unsigned int page,
  966. unsigned int offset_in_page, void *buf, unsigned int len)
  967. {
  968. struct mtd_info *mtd = nand_to_mtd(chip);
  969. if (len && !buf)
  970. return -EINVAL;
  971. if (offset_in_page + len > mtd->writesize + mtd->oobsize)
  972. return -EINVAL;
  973. chip->cmdfunc(mtd, NAND_CMD_READ0, offset_in_page, page);
  974. if (len)
  975. chip->read_buf(mtd, buf, len);
  976. return 0;
  977. }
  978. EXPORT_SYMBOL_GPL(nand_read_page_op);
  979. /**
  980. * nand_read_param_page_op - Do a READ PARAMETER PAGE operation
  981. * @chip: The NAND chip
  982. * @page: parameter page to read
  983. * @buf: buffer used to store the data
  984. * @len: length of the buffer
  985. *
  986. * This function issues a READ PARAMETER PAGE operation.
  987. * This function does not select/unselect the CS line.
  988. *
  989. * Returns 0 on success, a negative error code otherwise.
  990. */
  991. static int nand_read_param_page_op(struct nand_chip *chip, u8 page, void *buf,
  992. unsigned int len)
  993. {
  994. struct mtd_info *mtd = nand_to_mtd(chip);
  995. unsigned int i;
  996. u8 *p = buf;
  997. if (len && !buf)
  998. return -EINVAL;
  999. chip->cmdfunc(mtd, NAND_CMD_PARAM, page, -1);
  1000. for (i = 0; i < len; i++)
  1001. p[i] = chip->read_byte(mtd);
  1002. return 0;
  1003. }
  1004. /**
  1005. * nand_change_read_column_op - Do a CHANGE READ COLUMN operation
  1006. * @chip: The NAND chip
  1007. * @offset_in_page: offset within the page
  1008. * @buf: buffer used to store the data
  1009. * @len: length of the buffer
  1010. * @force_8bit: force 8-bit bus access
  1011. *
  1012. * This function issues a CHANGE READ COLUMN operation.
  1013. * This function does not select/unselect the CS line.
  1014. *
  1015. * Returns 0 on success, a negative error code otherwise.
  1016. */
  1017. int nand_change_read_column_op(struct nand_chip *chip,
  1018. unsigned int offset_in_page, void *buf,
  1019. unsigned int len, bool force_8bit)
  1020. {
  1021. struct mtd_info *mtd = nand_to_mtd(chip);
  1022. if (len && !buf)
  1023. return -EINVAL;
  1024. if (offset_in_page + len > mtd->writesize + mtd->oobsize)
  1025. return -EINVAL;
  1026. chip->cmdfunc(mtd, NAND_CMD_RNDOUT, offset_in_page, -1);
  1027. if (len)
  1028. chip->read_buf(mtd, buf, len);
  1029. return 0;
  1030. }
  1031. EXPORT_SYMBOL_GPL(nand_change_read_column_op);
  1032. /**
  1033. * nand_read_oob_op - Do a READ OOB operation
  1034. * @chip: The NAND chip
  1035. * @page: page to read
  1036. * @offset_in_oob: offset within the OOB area
  1037. * @buf: buffer used to store the data
  1038. * @len: length of the buffer
  1039. *
  1040. * This function issues a READ OOB operation.
  1041. * This function does not select/unselect the CS line.
  1042. *
  1043. * Returns 0 on success, a negative error code otherwise.
  1044. */
  1045. int nand_read_oob_op(struct nand_chip *chip, unsigned int page,
  1046. unsigned int offset_in_oob, void *buf, unsigned int len)
  1047. {
  1048. struct mtd_info *mtd = nand_to_mtd(chip);
  1049. if (len && !buf)
  1050. return -EINVAL;
  1051. if (offset_in_oob + len > mtd->oobsize)
  1052. return -EINVAL;
  1053. chip->cmdfunc(mtd, NAND_CMD_READOOB, offset_in_oob, page);
  1054. if (len)
  1055. chip->read_buf(mtd, buf, len);
  1056. return 0;
  1057. }
  1058. EXPORT_SYMBOL_GPL(nand_read_oob_op);
  1059. /**
  1060. * nand_prog_page_begin_op - starts a PROG PAGE operation
  1061. * @chip: The NAND chip
  1062. * @page: page to write
  1063. * @offset_in_page: offset within the page
  1064. * @buf: buffer containing the data to write to the page
  1065. * @len: length of the buffer
  1066. *
  1067. * This function issues the first half of a PROG PAGE operation.
  1068. * This function does not select/unselect the CS line.
  1069. *
  1070. * Returns 0 on success, a negative error code otherwise.
  1071. */
  1072. int nand_prog_page_begin_op(struct nand_chip *chip, unsigned int page,
  1073. unsigned int offset_in_page, const void *buf,
  1074. unsigned int len)
  1075. {
  1076. struct mtd_info *mtd = nand_to_mtd(chip);
  1077. if (len && !buf)
  1078. return -EINVAL;
  1079. if (offset_in_page + len > mtd->writesize + mtd->oobsize)
  1080. return -EINVAL;
  1081. chip->cmdfunc(mtd, NAND_CMD_SEQIN, offset_in_page, page);
  1082. if (buf)
  1083. chip->write_buf(mtd, buf, len);
  1084. return 0;
  1085. }
  1086. EXPORT_SYMBOL_GPL(nand_prog_page_begin_op);
  1087. /**
  1088. * nand_prog_page_end_op - ends a PROG PAGE operation
  1089. * @chip: The NAND chip
  1090. *
  1091. * This function issues the second half of a PROG PAGE operation.
  1092. * This function does not select/unselect the CS line.
  1093. *
  1094. * Returns 0 on success, a negative error code otherwise.
  1095. */
  1096. int nand_prog_page_end_op(struct nand_chip *chip)
  1097. {
  1098. struct mtd_info *mtd = nand_to_mtd(chip);
  1099. int status;
  1100. chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
  1101. status = chip->waitfunc(mtd, chip);
  1102. if (status & NAND_STATUS_FAIL)
  1103. return -EIO;
  1104. return 0;
  1105. }
  1106. EXPORT_SYMBOL_GPL(nand_prog_page_end_op);
  1107. /**
  1108. * nand_prog_page_op - Do a full PROG PAGE operation
  1109. * @chip: The NAND chip
  1110. * @page: page to write
  1111. * @offset_in_page: offset within the page
  1112. * @buf: buffer containing the data to write to the page
  1113. * @len: length of the buffer
  1114. *
  1115. * This function issues a full PROG PAGE operation.
  1116. * This function does not select/unselect the CS line.
  1117. *
  1118. * Returns 0 on success, a negative error code otherwise.
  1119. */
  1120. int nand_prog_page_op(struct nand_chip *chip, unsigned int page,
  1121. unsigned int offset_in_page, const void *buf,
  1122. unsigned int len)
  1123. {
  1124. struct mtd_info *mtd = nand_to_mtd(chip);
  1125. int status;
  1126. if (!len || !buf)
  1127. return -EINVAL;
  1128. if (offset_in_page + len > mtd->writesize + mtd->oobsize)
  1129. return -EINVAL;
  1130. chip->cmdfunc(mtd, NAND_CMD_SEQIN, offset_in_page, page);
  1131. chip->write_buf(mtd, buf, len);
  1132. chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
  1133. status = chip->waitfunc(mtd, chip);
  1134. if (status & NAND_STATUS_FAIL)
  1135. return -EIO;
  1136. return 0;
  1137. }
  1138. EXPORT_SYMBOL_GPL(nand_prog_page_op);
  1139. /**
  1140. * nand_change_write_column_op - Do a CHANGE WRITE COLUMN operation
  1141. * @chip: The NAND chip
  1142. * @offset_in_page: offset within the page
  1143. * @buf: buffer containing the data to send to the NAND
  1144. * @len: length of the buffer
  1145. * @force_8bit: force 8-bit bus access
  1146. *
  1147. * This function issues a CHANGE WRITE COLUMN operation.
  1148. * This function does not select/unselect the CS line.
  1149. *
  1150. * Returns 0 on success, a negative error code otherwise.
  1151. */
  1152. int nand_change_write_column_op(struct nand_chip *chip,
  1153. unsigned int offset_in_page,
  1154. const void *buf, unsigned int len,
  1155. bool force_8bit)
  1156. {
  1157. struct mtd_info *mtd = nand_to_mtd(chip);
  1158. if (len && !buf)
  1159. return -EINVAL;
  1160. if (offset_in_page + len > mtd->writesize + mtd->oobsize)
  1161. return -EINVAL;
  1162. chip->cmdfunc(mtd, NAND_CMD_RNDIN, offset_in_page, -1);
  1163. if (len)
  1164. chip->write_buf(mtd, buf, len);
  1165. return 0;
  1166. }
  1167. EXPORT_SYMBOL_GPL(nand_change_write_column_op);
  1168. /**
  1169. * nand_readid_op - Do a READID operation
  1170. * @chip: The NAND chip
  1171. * @addr: address cycle to pass after the READID command
  1172. * @buf: buffer used to store the ID
  1173. * @len: length of the buffer
  1174. *
  1175. * This function sends a READID command and reads back the ID returned by the
  1176. * NAND.
  1177. * This function does not select/unselect the CS line.
  1178. *
  1179. * Returns 0 on success, a negative error code otherwise.
  1180. */
  1181. int nand_readid_op(struct nand_chip *chip, u8 addr, void *buf,
  1182. unsigned int len)
  1183. {
  1184. struct mtd_info *mtd = nand_to_mtd(chip);
  1185. unsigned int i;
  1186. u8 *id = buf;
  1187. if (len && !buf)
  1188. return -EINVAL;
  1189. chip->cmdfunc(mtd, NAND_CMD_READID, addr, -1);
  1190. for (i = 0; i < len; i++)
  1191. id[i] = chip->read_byte(mtd);
  1192. return 0;
  1193. }
  1194. EXPORT_SYMBOL_GPL(nand_readid_op);
  1195. /**
  1196. * nand_status_op - Do a STATUS operation
  1197. * @chip: The NAND chip
  1198. * @status: out variable to store the NAND status
  1199. *
  1200. * This function sends a STATUS command and reads back the status returned by
  1201. * the NAND.
  1202. * This function does not select/unselect the CS line.
  1203. *
  1204. * Returns 0 on success, a negative error code otherwise.
  1205. */
  1206. int nand_status_op(struct nand_chip *chip, u8 *status)
  1207. {
  1208. struct mtd_info *mtd = nand_to_mtd(chip);
  1209. chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
  1210. if (status)
  1211. *status = chip->read_byte(mtd);
  1212. return 0;
  1213. }
  1214. EXPORT_SYMBOL_GPL(nand_status_op);
  1215. /**
  1216. * nand_exit_status_op - Exit a STATUS operation
  1217. * @chip: The NAND chip
  1218. *
  1219. * This function sends a READ0 command to cancel the effect of the STATUS
  1220. * command to avoid reading only the status until a new read command is sent.
  1221. *
  1222. * This function does not select/unselect the CS line.
  1223. *
  1224. * Returns 0 on success, a negative error code otherwise.
  1225. */
  1226. int nand_exit_status_op(struct nand_chip *chip)
  1227. {
  1228. struct mtd_info *mtd = nand_to_mtd(chip);
  1229. chip->cmdfunc(mtd, NAND_CMD_READ0, -1, -1);
  1230. return 0;
  1231. }
  1232. EXPORT_SYMBOL_GPL(nand_exit_status_op);
  1233. /**
  1234. * nand_erase_op - Do an erase operation
  1235. * @chip: The NAND chip
  1236. * @eraseblock: block to erase
  1237. *
  1238. * This function sends an ERASE command and waits for the NAND to be ready
  1239. * before returning.
  1240. * This function does not select/unselect the CS line.
  1241. *
  1242. * Returns 0 on success, a negative error code otherwise.
  1243. */
  1244. int nand_erase_op(struct nand_chip *chip, unsigned int eraseblock)
  1245. {
  1246. struct mtd_info *mtd = nand_to_mtd(chip);
  1247. unsigned int page = eraseblock <<
  1248. (chip->phys_erase_shift - chip->page_shift);
  1249. int status;
  1250. chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
  1251. chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
  1252. status = chip->waitfunc(mtd, chip);
  1253. if (status < 0)
  1254. return status;
  1255. if (status & NAND_STATUS_FAIL)
  1256. return -EIO;
  1257. return 0;
  1258. }
  1259. EXPORT_SYMBOL_GPL(nand_erase_op);
  1260. /**
  1261. * nand_set_features_op - Do a SET FEATURES operation
  1262. * @chip: The NAND chip
  1263. * @feature: feature id
  1264. * @data: 4 bytes of data
  1265. *
  1266. * This function sends a SET FEATURES command and waits for the NAND to be
  1267. * ready before returning.
  1268. * This function does not select/unselect the CS line.
  1269. *
  1270. * Returns 0 on success, a negative error code otherwise.
  1271. */
  1272. static int nand_set_features_op(struct nand_chip *chip, u8 feature,
  1273. const void *data)
  1274. {
  1275. struct mtd_info *mtd = nand_to_mtd(chip);
  1276. const u8 *params = data;
  1277. int i, status;
  1278. chip->cmdfunc(mtd, NAND_CMD_SET_FEATURES, feature, -1);
  1279. for (i = 0; i < ONFI_SUBFEATURE_PARAM_LEN; ++i)
  1280. chip->write_byte(mtd, params[i]);
  1281. status = chip->waitfunc(mtd, chip);
  1282. if (status & NAND_STATUS_FAIL)
  1283. return -EIO;
  1284. return 0;
  1285. }
  1286. /**
  1287. * nand_get_features_op - Do a GET FEATURES operation
  1288. * @chip: The NAND chip
  1289. * @feature: feature id
  1290. * @data: 4 bytes of data
  1291. *
  1292. * This function sends a GET FEATURES command and waits for the NAND to be
  1293. * ready before returning.
  1294. * This function does not select/unselect the CS line.
  1295. *
  1296. * Returns 0 on success, a negative error code otherwise.
  1297. */
  1298. static int nand_get_features_op(struct nand_chip *chip, u8 feature,
  1299. void *data)
  1300. {
  1301. struct mtd_info *mtd = nand_to_mtd(chip);
  1302. u8 *params = data;
  1303. int i;
  1304. chip->cmdfunc(mtd, NAND_CMD_GET_FEATURES, feature, -1);
  1305. for (i = 0; i < ONFI_SUBFEATURE_PARAM_LEN; ++i)
  1306. params[i] = chip->read_byte(mtd);
  1307. return 0;
  1308. }
  1309. /**
  1310. * nand_reset_op - Do a reset operation
  1311. * @chip: The NAND chip
  1312. *
  1313. * This function sends a RESET command and waits for the NAND to be ready
  1314. * before returning.
  1315. * This function does not select/unselect the CS line.
  1316. *
  1317. * Returns 0 on success, a negative error code otherwise.
  1318. */
  1319. int nand_reset_op(struct nand_chip *chip)
  1320. {
  1321. struct mtd_info *mtd = nand_to_mtd(chip);
  1322. chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
  1323. return 0;
  1324. }
  1325. EXPORT_SYMBOL_GPL(nand_reset_op);
  1326. /**
  1327. * nand_read_data_op - Read data from the NAND
  1328. * @chip: The NAND chip
  1329. * @buf: buffer used to store the data
  1330. * @len: length of the buffer
  1331. * @force_8bit: force 8-bit bus access
  1332. *
  1333. * This function does a raw data read on the bus. Usually used after launching
  1334. * another NAND operation like nand_read_page_op().
  1335. * This function does not select/unselect the CS line.
  1336. *
  1337. * Returns 0 on success, a negative error code otherwise.
  1338. */
  1339. int nand_read_data_op(struct nand_chip *chip, void *buf, unsigned int len,
  1340. bool force_8bit)
  1341. {
  1342. struct mtd_info *mtd = nand_to_mtd(chip);
  1343. if (!len || !buf)
  1344. return -EINVAL;
  1345. if (force_8bit) {
  1346. u8 *p = buf;
  1347. unsigned int i;
  1348. for (i = 0; i < len; i++)
  1349. p[i] = chip->read_byte(mtd);
  1350. } else {
  1351. chip->read_buf(mtd, buf, len);
  1352. }
  1353. return 0;
  1354. }
  1355. EXPORT_SYMBOL_GPL(nand_read_data_op);
  1356. /**
  1357. * nand_write_data_op - Write data from the NAND
  1358. * @chip: The NAND chip
  1359. * @buf: buffer containing the data to send on the bus
  1360. * @len: length of the buffer
  1361. * @force_8bit: force 8-bit bus access
  1362. *
  1363. * This function does a raw data write on the bus. Usually used after launching
  1364. * another NAND operation like nand_write_page_begin_op().
  1365. * This function does not select/unselect the CS line.
  1366. *
  1367. * Returns 0 on success, a negative error code otherwise.
  1368. */
  1369. int nand_write_data_op(struct nand_chip *chip, const void *buf,
  1370. unsigned int len, bool force_8bit)
  1371. {
  1372. struct mtd_info *mtd = nand_to_mtd(chip);
  1373. if (!len || !buf)
  1374. return -EINVAL;
  1375. if (force_8bit) {
  1376. const u8 *p = buf;
  1377. unsigned int i;
  1378. for (i = 0; i < len; i++)
  1379. chip->write_byte(mtd, p[i]);
  1380. } else {
  1381. chip->write_buf(mtd, buf, len);
  1382. }
  1383. return 0;
  1384. }
  1385. EXPORT_SYMBOL_GPL(nand_write_data_op);
  1386. /**
  1387. * nand_reset - Reset and initialize a NAND device
  1388. * @chip: The NAND chip
  1389. * @chipnr: Internal die id
  1390. *
  1391. * Returns 0 for success or negative error code otherwise
  1392. */
  1393. int nand_reset(struct nand_chip *chip, int chipnr)
  1394. {
  1395. struct mtd_info *mtd = nand_to_mtd(chip);
  1396. int ret;
  1397. ret = nand_reset_data_interface(chip, chipnr);
  1398. if (ret)
  1399. return ret;
  1400. /*
  1401. * The CS line has to be released before we can apply the new NAND
  1402. * interface settings, hence this weird ->select_chip() dance.
  1403. */
  1404. chip->select_chip(mtd, chipnr);
  1405. ret = nand_reset_op(chip);
  1406. chip->select_chip(mtd, -1);
  1407. if (ret)
  1408. return ret;
  1409. chip->select_chip(mtd, chipnr);
  1410. ret = nand_setup_data_interface(chip, chipnr);
  1411. chip->select_chip(mtd, -1);
  1412. if (ret)
  1413. return ret;
  1414. return 0;
  1415. }
  1416. /**
  1417. * nand_check_erased_buf - check if a buffer contains (almost) only 0xff data
  1418. * @buf: buffer to test
  1419. * @len: buffer length
  1420. * @bitflips_threshold: maximum number of bitflips
  1421. *
  1422. * Check if a buffer contains only 0xff, which means the underlying region
  1423. * has been erased and is ready to be programmed.
  1424. * The bitflips_threshold specify the maximum number of bitflips before
  1425. * considering the region is not erased.
  1426. * Note: The logic of this function has been extracted from the memweight
  1427. * implementation, except that nand_check_erased_buf function exit before
  1428. * testing the whole buffer if the number of bitflips exceed the
  1429. * bitflips_threshold value.
  1430. *
  1431. * Returns a positive number of bitflips less than or equal to
  1432. * bitflips_threshold, or -ERROR_CODE for bitflips in excess of the
  1433. * threshold.
  1434. */
  1435. static int nand_check_erased_buf(void *buf, int len, int bitflips_threshold)
  1436. {
  1437. const unsigned char *bitmap = buf;
  1438. int bitflips = 0;
  1439. int weight;
  1440. for (; len && ((uintptr_t)bitmap) % sizeof(long);
  1441. len--, bitmap++) {
  1442. weight = hweight8(*bitmap);
  1443. bitflips += BITS_PER_BYTE - weight;
  1444. if (unlikely(bitflips > bitflips_threshold))
  1445. return -EBADMSG;
  1446. }
  1447. for (; len >= 4; len -= 4, bitmap += 4) {
  1448. weight = hweight32(*((u32 *)bitmap));
  1449. bitflips += 32 - weight;
  1450. if (unlikely(bitflips > bitflips_threshold))
  1451. return -EBADMSG;
  1452. }
  1453. for (; len > 0; len--, bitmap++) {
  1454. weight = hweight8(*bitmap);
  1455. bitflips += BITS_PER_BYTE - weight;
  1456. if (unlikely(bitflips > bitflips_threshold))
  1457. return -EBADMSG;
  1458. }
  1459. return bitflips;
  1460. }
  1461. /**
  1462. * nand_check_erased_ecc_chunk - check if an ECC chunk contains (almost) only
  1463. * 0xff data
  1464. * @data: data buffer to test
  1465. * @datalen: data length
  1466. * @ecc: ECC buffer
  1467. * @ecclen: ECC length
  1468. * @extraoob: extra OOB buffer
  1469. * @extraooblen: extra OOB length
  1470. * @bitflips_threshold: maximum number of bitflips
  1471. *
  1472. * Check if a data buffer and its associated ECC and OOB data contains only
  1473. * 0xff pattern, which means the underlying region has been erased and is
  1474. * ready to be programmed.
  1475. * The bitflips_threshold specify the maximum number of bitflips before
  1476. * considering the region as not erased.
  1477. *
  1478. * Note:
  1479. * 1/ ECC algorithms are working on pre-defined block sizes which are usually
  1480. * different from the NAND page size. When fixing bitflips, ECC engines will
  1481. * report the number of errors per chunk, and the NAND core infrastructure
  1482. * expect you to return the maximum number of bitflips for the whole page.
  1483. * This is why you should always use this function on a single chunk and
  1484. * not on the whole page. After checking each chunk you should update your
  1485. * max_bitflips value accordingly.
  1486. * 2/ When checking for bitflips in erased pages you should not only check
  1487. * the payload data but also their associated ECC data, because a user might
  1488. * have programmed almost all bits to 1 but a few. In this case, we
  1489. * shouldn't consider the chunk as erased, and checking ECC bytes prevent
  1490. * this case.
  1491. * 3/ The extraoob argument is optional, and should be used if some of your OOB
  1492. * data are protected by the ECC engine.
  1493. * It could also be used if you support subpages and want to attach some
  1494. * extra OOB data to an ECC chunk.
  1495. *
  1496. * Returns a positive number of bitflips less than or equal to
  1497. * bitflips_threshold, or -ERROR_CODE for bitflips in excess of the
  1498. * threshold. In case of success, the passed buffers are filled with 0xff.
  1499. */
  1500. int nand_check_erased_ecc_chunk(void *data, int datalen,
  1501. void *ecc, int ecclen,
  1502. void *extraoob, int extraooblen,
  1503. int bitflips_threshold)
  1504. {
  1505. int data_bitflips = 0, ecc_bitflips = 0, extraoob_bitflips = 0;
  1506. data_bitflips = nand_check_erased_buf(data, datalen,
  1507. bitflips_threshold);
  1508. if (data_bitflips < 0)
  1509. return data_bitflips;
  1510. bitflips_threshold -= data_bitflips;
  1511. ecc_bitflips = nand_check_erased_buf(ecc, ecclen, bitflips_threshold);
  1512. if (ecc_bitflips < 0)
  1513. return ecc_bitflips;
  1514. bitflips_threshold -= ecc_bitflips;
  1515. extraoob_bitflips = nand_check_erased_buf(extraoob, extraooblen,
  1516. bitflips_threshold);
  1517. if (extraoob_bitflips < 0)
  1518. return extraoob_bitflips;
  1519. if (data_bitflips)
  1520. memset(data, 0xff, datalen);
  1521. if (ecc_bitflips)
  1522. memset(ecc, 0xff, ecclen);
  1523. if (extraoob_bitflips)
  1524. memset(extraoob, 0xff, extraooblen);
  1525. return data_bitflips + ecc_bitflips + extraoob_bitflips;
  1526. }
  1527. EXPORT_SYMBOL(nand_check_erased_ecc_chunk);
  1528. /**
  1529. * nand_read_page_raw - [INTERN] read raw page data without ecc
  1530. * @mtd: mtd info structure
  1531. * @chip: nand chip info structure
  1532. * @buf: buffer to store read data
  1533. * @oob_required: caller requires OOB data read to chip->oob_poi
  1534. * @page: page number to read
  1535. *
  1536. * Not for syndrome calculating ECC controllers, which use a special oob layout.
  1537. */
  1538. static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
  1539. uint8_t *buf, int oob_required, int page)
  1540. {
  1541. int ret;
  1542. ret = nand_read_data_op(chip, buf, mtd->writesize, false);
  1543. if (ret)
  1544. return ret;
  1545. if (oob_required) {
  1546. ret = nand_read_data_op(chip, chip->oob_poi, mtd->oobsize,
  1547. false);
  1548. if (ret)
  1549. return ret;
  1550. }
  1551. return 0;
  1552. }
  1553. /**
  1554. * nand_read_page_raw_syndrome - [INTERN] read raw page data without ecc
  1555. * @mtd: mtd info structure
  1556. * @chip: nand chip info structure
  1557. * @buf: buffer to store read data
  1558. * @oob_required: caller requires OOB data read to chip->oob_poi
  1559. * @page: page number to read
  1560. *
  1561. * We need a special oob layout and handling even when OOB isn't used.
  1562. */
  1563. static int nand_read_page_raw_syndrome(struct mtd_info *mtd,
  1564. struct nand_chip *chip, uint8_t *buf,
  1565. int oob_required, int page)
  1566. {
  1567. int eccsize = chip->ecc.size;
  1568. int eccbytes = chip->ecc.bytes;
  1569. uint8_t *oob = chip->oob_poi;
  1570. int steps, size, ret;
  1571. for (steps = chip->ecc.steps; steps > 0; steps--) {
  1572. ret = nand_read_data_op(chip, buf, eccsize, false);
  1573. if (ret)
  1574. return ret;
  1575. buf += eccsize;
  1576. if (chip->ecc.prepad) {
  1577. ret = nand_read_data_op(chip, oob, chip->ecc.prepad,
  1578. false);
  1579. if (ret)
  1580. return ret;
  1581. oob += chip->ecc.prepad;
  1582. }
  1583. ret = nand_read_data_op(chip, oob, eccbytes, false);
  1584. if (ret)
  1585. return ret;
  1586. oob += eccbytes;
  1587. if (chip->ecc.postpad) {
  1588. ret = nand_read_data_op(chip, oob, chip->ecc.postpad,
  1589. false);
  1590. if (ret)
  1591. return ret;
  1592. oob += chip->ecc.postpad;
  1593. }
  1594. }
  1595. size = mtd->oobsize - (oob - chip->oob_poi);
  1596. if (size) {
  1597. ret = nand_read_data_op(chip, oob, size, false);
  1598. if (ret)
  1599. return ret;
  1600. }
  1601. return 0;
  1602. }
  1603. /**
  1604. * nand_read_page_swecc - [REPLACEABLE] software ECC based page read function
  1605. * @mtd: mtd info structure
  1606. * @chip: nand chip info structure
  1607. * @buf: buffer to store read data
  1608. * @oob_required: caller requires OOB data read to chip->oob_poi
  1609. * @page: page number to read
  1610. */
  1611. static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
  1612. uint8_t *buf, int oob_required, int page)
  1613. {
  1614. int i, eccsize = chip->ecc.size;
  1615. int eccbytes = chip->ecc.bytes;
  1616. int eccsteps = chip->ecc.steps;
  1617. uint8_t *p = buf;
  1618. uint8_t *ecc_calc = chip->buffers->ecccalc;
  1619. uint8_t *ecc_code = chip->buffers->ecccode;
  1620. uint32_t *eccpos = chip->ecc.layout->eccpos;
  1621. unsigned int max_bitflips = 0;
  1622. chip->ecc.read_page_raw(mtd, chip, buf, 1, page);
  1623. for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
  1624. chip->ecc.calculate(mtd, p, &ecc_calc[i]);
  1625. for (i = 0; i < chip->ecc.total; i++)
  1626. ecc_code[i] = chip->oob_poi[eccpos[i]];
  1627. eccsteps = chip->ecc.steps;
  1628. p = buf;
  1629. for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
  1630. int stat;
  1631. stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
  1632. if (stat < 0) {
  1633. mtd->ecc_stats.failed++;
  1634. } else {
  1635. mtd->ecc_stats.corrected += stat;
  1636. max_bitflips = max_t(unsigned int, max_bitflips, stat);
  1637. }
  1638. }
  1639. return max_bitflips;
  1640. }
  1641. /**
  1642. * nand_read_subpage - [REPLACEABLE] ECC based sub-page read function
  1643. * @mtd: mtd info structure
  1644. * @chip: nand chip info structure
  1645. * @data_offs: offset of requested data within the page
  1646. * @readlen: data length
  1647. * @bufpoi: buffer to store read data
  1648. * @page: page number to read
  1649. */
  1650. static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
  1651. uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi,
  1652. int page)
  1653. {
  1654. int start_step, end_step, num_steps;
  1655. uint32_t *eccpos = chip->ecc.layout->eccpos;
  1656. uint8_t *p;
  1657. int data_col_addr, i, gaps = 0;
  1658. int datafrag_len, eccfrag_len, aligned_len, aligned_pos;
  1659. int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1;
  1660. int index;
  1661. unsigned int max_bitflips = 0;
  1662. int ret;
  1663. /* Column address within the page aligned to ECC size (256bytes) */
  1664. start_step = data_offs / chip->ecc.size;
  1665. end_step = (data_offs + readlen - 1) / chip->ecc.size;
  1666. num_steps = end_step - start_step + 1;
  1667. index = start_step * chip->ecc.bytes;
  1668. /* Data size aligned to ECC ecc.size */
  1669. datafrag_len = num_steps * chip->ecc.size;
  1670. eccfrag_len = num_steps * chip->ecc.bytes;
  1671. data_col_addr = start_step * chip->ecc.size;
  1672. /* If we read not a page aligned data */
  1673. if (data_col_addr != 0)
  1674. chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1);
  1675. p = bufpoi + data_col_addr;
  1676. ret = nand_read_data_op(chip, p, datafrag_len, false);
  1677. if (ret)
  1678. return ret;
  1679. /* Calculate ECC */
  1680. for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size)
  1681. chip->ecc.calculate(mtd, p, &chip->buffers->ecccalc[i]);
  1682. /*
  1683. * The performance is faster if we position offsets according to
  1684. * ecc.pos. Let's make sure that there are no gaps in ECC positions.
  1685. */
  1686. for (i = 0; i < eccfrag_len - 1; i++) {
  1687. if (eccpos[i + index] + 1 != eccpos[i + index + 1]) {
  1688. gaps = 1;
  1689. break;
  1690. }
  1691. }
  1692. if (gaps) {
  1693. ret = nand_change_read_column_op(chip, mtd->writesize,
  1694. chip->oob_poi, mtd->oobsize,
  1695. false);
  1696. if (ret)
  1697. return ret;
  1698. } else {
  1699. /*
  1700. * Send the command to read the particular ECC bytes take care
  1701. * about buswidth alignment in read_buf.
  1702. */
  1703. aligned_pos = eccpos[index] & ~(busw - 1);
  1704. aligned_len = eccfrag_len;
  1705. if (eccpos[index] & (busw - 1))
  1706. aligned_len++;
  1707. if (eccpos[index + (num_steps * chip->ecc.bytes)] & (busw - 1))
  1708. aligned_len++;
  1709. ret = nand_change_read_column_op(chip,
  1710. mtd->writesize + aligned_pos,
  1711. &chip->oob_poi[aligned_pos],
  1712. aligned_len, false);
  1713. if (ret)
  1714. return ret;
  1715. }
  1716. for (i = 0; i < eccfrag_len; i++)
  1717. chip->buffers->ecccode[i] = chip->oob_poi[eccpos[i + index]];
  1718. p = bufpoi + data_col_addr;
  1719. for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) {
  1720. int stat;
  1721. stat = chip->ecc.correct(mtd, p,
  1722. &chip->buffers->ecccode[i], &chip->buffers->ecccalc[i]);
  1723. if (stat == -EBADMSG &&
  1724. (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) {
  1725. /* check for empty pages with bitflips */
  1726. stat = nand_check_erased_ecc_chunk(p, chip->ecc.size,
  1727. &chip->buffers->ecccode[i],
  1728. chip->ecc.bytes,
  1729. NULL, 0,
  1730. chip->ecc.strength);
  1731. }
  1732. if (stat < 0) {
  1733. mtd->ecc_stats.failed++;
  1734. } else {
  1735. mtd->ecc_stats.corrected += stat;
  1736. max_bitflips = max_t(unsigned int, max_bitflips, stat);
  1737. }
  1738. }
  1739. return max_bitflips;
  1740. }
  1741. /**
  1742. * nand_read_page_hwecc - [REPLACEABLE] hardware ECC based page read function
  1743. * @mtd: mtd info structure
  1744. * @chip: nand chip info structure
  1745. * @buf: buffer to store read data
  1746. * @oob_required: caller requires OOB data read to chip->oob_poi
  1747. * @page: page number to read
  1748. *
  1749. * Not for syndrome calculating ECC controllers which need a special oob layout.
  1750. */
  1751. static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
  1752. uint8_t *buf, int oob_required, int page)
  1753. {
  1754. int i, eccsize = chip->ecc.size;
  1755. int eccbytes = chip->ecc.bytes;
  1756. int eccsteps = chip->ecc.steps;
  1757. uint8_t *p = buf;
  1758. uint8_t *ecc_calc = chip->buffers->ecccalc;
  1759. uint8_t *ecc_code = chip->buffers->ecccode;
  1760. uint32_t *eccpos = chip->ecc.layout->eccpos;
  1761. unsigned int max_bitflips = 0;
  1762. int ret;
  1763. for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
  1764. chip->ecc.hwctl(mtd, NAND_ECC_READ);
  1765. ret = nand_read_data_op(chip, p, eccsize, false);
  1766. if (ret)
  1767. return ret;
  1768. chip->ecc.calculate(mtd, p, &ecc_calc[i]);
  1769. }
  1770. ret = nand_read_data_op(chip, chip->oob_poi, mtd->oobsize, false);
  1771. if (ret)
  1772. return ret;
  1773. for (i = 0; i < chip->ecc.total; i++)
  1774. ecc_code[i] = chip->oob_poi[eccpos[i]];
  1775. eccsteps = chip->ecc.steps;
  1776. p = buf;
  1777. for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
  1778. int stat;
  1779. stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
  1780. if (stat == -EBADMSG &&
  1781. (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) {
  1782. /* check for empty pages with bitflips */
  1783. stat = nand_check_erased_ecc_chunk(p, eccsize,
  1784. &ecc_code[i], eccbytes,
  1785. NULL, 0,
  1786. chip->ecc.strength);
  1787. }
  1788. if (stat < 0) {
  1789. mtd->ecc_stats.failed++;
  1790. } else {
  1791. mtd->ecc_stats.corrected += stat;
  1792. max_bitflips = max_t(unsigned int, max_bitflips, stat);
  1793. }
  1794. }
  1795. return max_bitflips;
  1796. }
  1797. /**
  1798. * nand_read_page_hwecc_oob_first - [REPLACEABLE] hw ecc, read oob first
  1799. * @mtd: mtd info structure
  1800. * @chip: nand chip info structure
  1801. * @buf: buffer to store read data
  1802. * @oob_required: caller requires OOB data read to chip->oob_poi
  1803. * @page: page number to read
  1804. *
  1805. * Hardware ECC for large page chips, require OOB to be read first. For this
  1806. * ECC mode, the write_page method is re-used from ECC_HW. These methods
  1807. * read/write ECC from the OOB area, unlike the ECC_HW_SYNDROME support with
  1808. * multiple ECC steps, follows the "infix ECC" scheme and reads/writes ECC from
  1809. * the data area, by overwriting the NAND manufacturer bad block markings.
  1810. */
  1811. static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd,
  1812. struct nand_chip *chip, uint8_t *buf, int oob_required, int page)
  1813. {
  1814. int i, eccsize = chip->ecc.size;
  1815. int eccbytes = chip->ecc.bytes;
  1816. int eccsteps = chip->ecc.steps;
  1817. uint8_t *p = buf;
  1818. uint8_t *ecc_code = chip->buffers->ecccode;
  1819. uint32_t *eccpos = chip->ecc.layout->eccpos;
  1820. uint8_t *ecc_calc = chip->buffers->ecccalc;
  1821. unsigned int max_bitflips = 0;
  1822. int ret;
  1823. /* Read the OOB area first */
  1824. ret = nand_read_oob_op(chip, page, 0, chip->oob_poi, mtd->oobsize);
  1825. if (ret)
  1826. return ret;
  1827. ret = nand_read_page_op(chip, page, 0, NULL, 0);
  1828. if (ret)
  1829. return ret;
  1830. for (i = 0; i < chip->ecc.total; i++)
  1831. ecc_code[i] = chip->oob_poi[eccpos[i]];
  1832. for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
  1833. int stat;
  1834. chip->ecc.hwctl(mtd, NAND_ECC_READ);
  1835. ret = nand_read_data_op(chip, p, eccsize, false);
  1836. if (ret)
  1837. return ret;
  1838. chip->ecc.calculate(mtd, p, &ecc_calc[i]);
  1839. stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL);
  1840. if (stat == -EBADMSG &&
  1841. (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) {
  1842. /* check for empty pages with bitflips */
  1843. stat = nand_check_erased_ecc_chunk(p, eccsize,
  1844. &ecc_code[i], eccbytes,
  1845. NULL, 0,
  1846. chip->ecc.strength);
  1847. }
  1848. if (stat < 0) {
  1849. mtd->ecc_stats.failed++;
  1850. } else {
  1851. mtd->ecc_stats.corrected += stat;
  1852. max_bitflips = max_t(unsigned int, max_bitflips, stat);
  1853. }
  1854. }
  1855. return max_bitflips;
  1856. }
  1857. /**
  1858. * nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read
  1859. * @mtd: mtd info structure
  1860. * @chip: nand chip info structure
  1861. * @buf: buffer to store read data
  1862. * @oob_required: caller requires OOB data read to chip->oob_poi
  1863. * @page: page number to read
  1864. *
  1865. * The hw generator calculates the error syndrome automatically. Therefore we
  1866. * need a special oob layout and handling.
  1867. */
  1868. static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
  1869. uint8_t *buf, int oob_required, int page)
  1870. {
  1871. int ret, i, eccsize = chip->ecc.size;
  1872. int eccbytes = chip->ecc.bytes;
  1873. int eccsteps = chip->ecc.steps;
  1874. int eccpadbytes = eccbytes + chip->ecc.prepad + chip->ecc.postpad;
  1875. uint8_t *p = buf;
  1876. uint8_t *oob = chip->oob_poi;
  1877. unsigned int max_bitflips = 0;
  1878. for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
  1879. int stat;
  1880. chip->ecc.hwctl(mtd, NAND_ECC_READ);
  1881. ret = nand_read_data_op(chip, p, eccsize, false);
  1882. if (ret)
  1883. return ret;
  1884. if (chip->ecc.prepad) {
  1885. ret = nand_read_data_op(chip, oob, chip->ecc.prepad,
  1886. false);
  1887. if (ret)
  1888. return ret;
  1889. oob += chip->ecc.prepad;
  1890. }
  1891. chip->ecc.hwctl(mtd, NAND_ECC_READSYN);
  1892. ret = nand_read_data_op(chip, oob, eccbytes, false);
  1893. if (ret)
  1894. return ret;
  1895. stat = chip->ecc.correct(mtd, p, oob, NULL);
  1896. oob += eccbytes;
  1897. if (chip->ecc.postpad) {
  1898. ret = nand_read_data_op(chip, oob, chip->ecc.postpad,
  1899. false);
  1900. if (ret)
  1901. return ret;
  1902. oob += chip->ecc.postpad;
  1903. }
  1904. if (stat == -EBADMSG &&
  1905. (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) {
  1906. /* check for empty pages with bitflips */
  1907. stat = nand_check_erased_ecc_chunk(p, chip->ecc.size,
  1908. oob - eccpadbytes,
  1909. eccpadbytes,
  1910. NULL, 0,
  1911. chip->ecc.strength);
  1912. }
  1913. if (stat < 0) {
  1914. mtd->ecc_stats.failed++;
  1915. } else {
  1916. mtd->ecc_stats.corrected += stat;
  1917. max_bitflips = max_t(unsigned int, max_bitflips, stat);
  1918. }
  1919. }
  1920. /* Calculate remaining oob bytes */
  1921. i = mtd->oobsize - (oob - chip->oob_poi);
  1922. if (i) {
  1923. ret = nand_read_data_op(chip, oob, i, false);
  1924. if (ret)
  1925. return ret;
  1926. }
  1927. return max_bitflips;
  1928. }
  1929. /**
  1930. * nand_transfer_oob - [INTERN] Transfer oob to client buffer
  1931. * @chip: nand chip structure
  1932. * @oob: oob destination address
  1933. * @ops: oob ops structure
  1934. * @len: size of oob to transfer
  1935. */
  1936. static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob,
  1937. struct mtd_oob_ops *ops, size_t len)
  1938. {
  1939. switch (ops->mode) {
  1940. case MTD_OPS_PLACE_OOB:
  1941. case MTD_OPS_RAW:
  1942. memcpy(oob, chip->oob_poi + ops->ooboffs, len);
  1943. return oob + len;
  1944. case MTD_OPS_AUTO_OOB: {
  1945. struct nand_oobfree *free = chip->ecc.layout->oobfree;
  1946. uint32_t boffs = 0, roffs = ops->ooboffs;
  1947. size_t bytes = 0;
  1948. for (; free->length && len; free++, len -= bytes) {
  1949. /* Read request not from offset 0? */
  1950. if (unlikely(roffs)) {
  1951. if (roffs >= free->length) {
  1952. roffs -= free->length;
  1953. continue;
  1954. }
  1955. boffs = free->offset + roffs;
  1956. bytes = min_t(size_t, len,
  1957. (free->length - roffs));
  1958. roffs = 0;
  1959. } else {
  1960. bytes = min_t(size_t, len, free->length);
  1961. boffs = free->offset;
  1962. }
  1963. memcpy(oob, chip->oob_poi + boffs, bytes);
  1964. oob += bytes;
  1965. }
  1966. return oob;
  1967. }
  1968. default:
  1969. BUG();
  1970. }
  1971. return NULL;
  1972. }
  1973. /**
  1974. * nand_setup_read_retry - [INTERN] Set the READ RETRY mode
  1975. * @mtd: MTD device structure
  1976. * @retry_mode: the retry mode to use
  1977. *
  1978. * Some vendors supply a special command to shift the Vt threshold, to be used
  1979. * when there are too many bitflips in a page (i.e., ECC error). After setting
  1980. * a new threshold, the host should retry reading the page.
  1981. */
  1982. static int nand_setup_read_retry(struct mtd_info *mtd, int retry_mode)
  1983. {
  1984. struct nand_chip *chip = mtd_to_nand(mtd);
  1985. pr_debug("setting READ RETRY mode %d\n", retry_mode);
  1986. if (retry_mode >= chip->read_retries)
  1987. return -EINVAL;
  1988. if (!chip->setup_read_retry)
  1989. return -EOPNOTSUPP;
  1990. return chip->setup_read_retry(mtd, retry_mode);
  1991. }
  1992. /**
  1993. * nand_do_read_ops - [INTERN] Read data with ECC
  1994. * @mtd: MTD device structure
  1995. * @from: offset to read from
  1996. * @ops: oob ops structure
  1997. *
  1998. * Internal function. Called with chip held.
  1999. */
  2000. static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
  2001. struct mtd_oob_ops *ops)
  2002. {
  2003. int chipnr, page, realpage, col, bytes, aligned, oob_required;
  2004. struct nand_chip *chip = mtd_to_nand(mtd);
  2005. int ret = 0;
  2006. uint32_t readlen = ops->len;
  2007. uint32_t oobreadlen = ops->ooblen;
  2008. uint32_t max_oobsize = mtd_oobavail(mtd, ops);
  2009. uint8_t *bufpoi, *oob, *buf;
  2010. int use_bufpoi;
  2011. unsigned int max_bitflips = 0;
  2012. int retry_mode = 0;
  2013. bool ecc_fail = false;
  2014. chipnr = (int)(from >> chip->chip_shift);
  2015. chip->select_chip(mtd, chipnr);
  2016. realpage = (int)(from >> chip->page_shift);
  2017. page = realpage & chip->pagemask;
  2018. col = (int)(from & (mtd->writesize - 1));
  2019. buf = ops->datbuf;
  2020. oob = ops->oobbuf;
  2021. oob_required = oob ? 1 : 0;
  2022. while (1) {
  2023. unsigned int ecc_failures = mtd->ecc_stats.failed;
  2024. WATCHDOG_RESET();
  2025. bytes = min(mtd->writesize - col, readlen);
  2026. aligned = (bytes == mtd->writesize);
  2027. if (!aligned)
  2028. use_bufpoi = 1;
  2029. else if (chip->options & NAND_USE_BOUNCE_BUFFER)
  2030. use_bufpoi = !IS_ALIGNED((unsigned long)buf,
  2031. chip->buf_align);
  2032. else
  2033. use_bufpoi = 0;
  2034. /* Is the current page in the buffer? */
  2035. if (realpage != chip->pagebuf || oob) {
  2036. bufpoi = use_bufpoi ? chip->buffers->databuf : buf;
  2037. if (use_bufpoi && aligned)
  2038. pr_debug("%s: using read bounce buffer for buf@%p\n",
  2039. __func__, buf);
  2040. read_retry:
  2041. if (nand_standard_page_accessors(&chip->ecc)) {
  2042. ret = nand_read_page_op(chip, page, 0, NULL, 0);
  2043. if (ret)
  2044. break;
  2045. }
  2046. /*
  2047. * Now read the page into the buffer. Absent an error,
  2048. * the read methods return max bitflips per ecc step.
  2049. */
  2050. if (unlikely(ops->mode == MTD_OPS_RAW))
  2051. ret = chip->ecc.read_page_raw(mtd, chip, bufpoi,
  2052. oob_required,
  2053. page);
  2054. else if (!aligned && NAND_HAS_SUBPAGE_READ(chip) &&
  2055. !oob)
  2056. ret = chip->ecc.read_subpage(mtd, chip,
  2057. col, bytes, bufpoi,
  2058. page);
  2059. else
  2060. ret = chip->ecc.read_page(mtd, chip, bufpoi,
  2061. oob_required, page);
  2062. if (ret < 0) {
  2063. if (use_bufpoi)
  2064. /* Invalidate page cache */
  2065. chip->pagebuf = -1;
  2066. break;
  2067. }
  2068. max_bitflips = max_t(unsigned int, max_bitflips, ret);
  2069. /* Transfer not aligned data */
  2070. if (use_bufpoi) {
  2071. if (!NAND_HAS_SUBPAGE_READ(chip) && !oob &&
  2072. !(mtd->ecc_stats.failed - ecc_failures) &&
  2073. (ops->mode != MTD_OPS_RAW)) {
  2074. chip->pagebuf = realpage;
  2075. chip->pagebuf_bitflips = ret;
  2076. } else {
  2077. /* Invalidate page cache */
  2078. chip->pagebuf = -1;
  2079. }
  2080. memcpy(buf, chip->buffers->databuf + col, bytes);
  2081. }
  2082. if (unlikely(oob)) {
  2083. int toread = min(oobreadlen, max_oobsize);
  2084. if (toread) {
  2085. oob = nand_transfer_oob(chip,
  2086. oob, ops, toread);
  2087. oobreadlen -= toread;
  2088. }
  2089. }
  2090. if (chip->options & NAND_NEED_READRDY) {
  2091. /* Apply delay or wait for ready/busy pin */
  2092. if (!chip->dev_ready)
  2093. udelay(chip->chip_delay);
  2094. else
  2095. nand_wait_ready(mtd);
  2096. }
  2097. if (mtd->ecc_stats.failed - ecc_failures) {
  2098. if (retry_mode + 1 < chip->read_retries) {
  2099. retry_mode++;
  2100. ret = nand_setup_read_retry(mtd,
  2101. retry_mode);
  2102. if (ret < 0)
  2103. break;
  2104. /* Reset failures; retry */
  2105. mtd->ecc_stats.failed = ecc_failures;
  2106. goto read_retry;
  2107. } else {
  2108. /* No more retry modes; real failure */
  2109. ecc_fail = true;
  2110. }
  2111. }
  2112. buf += bytes;
  2113. } else {
  2114. memcpy(buf, chip->buffers->databuf + col, bytes);
  2115. buf += bytes;
  2116. max_bitflips = max_t(unsigned int, max_bitflips,
  2117. chip->pagebuf_bitflips);
  2118. }
  2119. readlen -= bytes;
  2120. /* Reset to retry mode 0 */
  2121. if (retry_mode) {
  2122. ret = nand_setup_read_retry(mtd, 0);
  2123. if (ret < 0)
  2124. break;
  2125. retry_mode = 0;
  2126. }
  2127. if (!readlen)
  2128. break;
  2129. /* For subsequent reads align to page boundary */
  2130. col = 0;
  2131. /* Increment page address */
  2132. realpage++;
  2133. page = realpage & chip->pagemask;
  2134. /* Check, if we cross a chip boundary */
  2135. if (!page) {
  2136. chipnr++;
  2137. chip->select_chip(mtd, -1);
  2138. chip->select_chip(mtd, chipnr);
  2139. }
  2140. }
  2141. chip->select_chip(mtd, -1);
  2142. ops->retlen = ops->len - (size_t) readlen;
  2143. if (oob)
  2144. ops->oobretlen = ops->ooblen - oobreadlen;
  2145. if (ret < 0)
  2146. return ret;
  2147. if (ecc_fail)
  2148. return -EBADMSG;
  2149. return max_bitflips;
  2150. }
  2151. /**
  2152. * nand_read_oob_std - [REPLACEABLE] the most common OOB data read function
  2153. * @mtd: mtd info structure
  2154. * @chip: nand chip info structure
  2155. * @page: page number to read
  2156. */
  2157. static int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
  2158. int page)
  2159. {
  2160. return nand_read_oob_op(chip, page, 0, chip->oob_poi, mtd->oobsize);
  2161. }
  2162. /**
  2163. * nand_read_oob_syndrome - [REPLACEABLE] OOB data read function for HW ECC
  2164. * with syndromes
  2165. * @mtd: mtd info structure
  2166. * @chip: nand chip info structure
  2167. * @page: page number to read
  2168. */
  2169. static int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
  2170. int page)
  2171. {
  2172. int length = mtd->oobsize;
  2173. int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
  2174. int eccsize = chip->ecc.size;
  2175. uint8_t *bufpoi = chip->oob_poi;
  2176. int i, toread, sndrnd = 0, pos, ret;
  2177. ret = nand_read_page_op(chip, page, chip->ecc.size, NULL, 0);
  2178. if (ret)
  2179. return ret;
  2180. for (i = 0; i < chip->ecc.steps; i++) {
  2181. if (sndrnd) {
  2182. int ret;
  2183. pos = eccsize + i * (eccsize + chunk);
  2184. if (mtd->writesize > 512)
  2185. ret = nand_change_read_column_op(chip, pos,
  2186. NULL, 0,
  2187. false);
  2188. else
  2189. ret = nand_read_page_op(chip, page, pos, NULL,
  2190. 0);
  2191. if (ret)
  2192. return ret;
  2193. } else
  2194. sndrnd = 1;
  2195. toread = min_t(int, length, chunk);
  2196. ret = nand_read_data_op(chip, bufpoi, toread, false);
  2197. if (ret)
  2198. return ret;
  2199. bufpoi += toread;
  2200. length -= toread;
  2201. }
  2202. if (length > 0) {
  2203. ret = nand_read_data_op(chip, bufpoi, length, false);
  2204. if (ret)
  2205. return ret;
  2206. }
  2207. return 0;
  2208. }
  2209. /**
  2210. * nand_write_oob_std - [REPLACEABLE] the most common OOB data write function
  2211. * @mtd: mtd info structure
  2212. * @chip: nand chip info structure
  2213. * @page: page number to write
  2214. */
  2215. static int nand_write_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
  2216. int page)
  2217. {
  2218. return nand_prog_page_op(chip, page, mtd->writesize, chip->oob_poi,
  2219. mtd->oobsize);
  2220. }
  2221. /**
  2222. * nand_write_oob_syndrome - [REPLACEABLE] OOB data write function for HW ECC
  2223. * with syndrome - only for large page flash
  2224. * @mtd: mtd info structure
  2225. * @chip: nand chip info structure
  2226. * @page: page number to write
  2227. */
  2228. static int nand_write_oob_syndrome(struct mtd_info *mtd,
  2229. struct nand_chip *chip, int page)
  2230. {
  2231. int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
  2232. int eccsize = chip->ecc.size, length = mtd->oobsize;
  2233. int ret, i, len, pos, sndcmd = 0, steps = chip->ecc.steps;
  2234. const uint8_t *bufpoi = chip->oob_poi;
  2235. /*
  2236. * data-ecc-data-ecc ... ecc-oob
  2237. * or
  2238. * data-pad-ecc-pad-data-pad .... ecc-pad-oob
  2239. */
  2240. if (!chip->ecc.prepad && !chip->ecc.postpad) {
  2241. pos = steps * (eccsize + chunk);
  2242. steps = 0;
  2243. } else
  2244. pos = eccsize;
  2245. ret = nand_prog_page_begin_op(chip, page, pos, NULL, 0);
  2246. if (ret)
  2247. return ret;
  2248. for (i = 0; i < steps; i++) {
  2249. if (sndcmd) {
  2250. if (mtd->writesize <= 512) {
  2251. uint32_t fill = 0xFFFFFFFF;
  2252. len = eccsize;
  2253. while (len > 0) {
  2254. int num = min_t(int, len, 4);
  2255. ret = nand_write_data_op(chip, &fill,
  2256. num, false);
  2257. if (ret)
  2258. return ret;
  2259. len -= num;
  2260. }
  2261. } else {
  2262. pos = eccsize + i * (eccsize + chunk);
  2263. ret = nand_change_write_column_op(chip, pos,
  2264. NULL, 0,
  2265. false);
  2266. if (ret)
  2267. return ret;
  2268. }
  2269. } else
  2270. sndcmd = 1;
  2271. len = min_t(int, length, chunk);
  2272. ret = nand_write_data_op(chip, bufpoi, len, false);
  2273. if (ret)
  2274. return ret;
  2275. bufpoi += len;
  2276. length -= len;
  2277. }
  2278. if (length > 0) {
  2279. ret = nand_write_data_op(chip, bufpoi, length, false);
  2280. if (ret)
  2281. return ret;
  2282. }
  2283. return nand_prog_page_end_op(chip);
  2284. }
  2285. /**
  2286. * nand_do_read_oob - [INTERN] NAND read out-of-band
  2287. * @mtd: MTD device structure
  2288. * @from: offset to read from
  2289. * @ops: oob operations description structure
  2290. *
  2291. * NAND read out-of-band data from the spare area.
  2292. */
  2293. static int nand_do_read_oob(struct mtd_info *mtd, loff_t from,
  2294. struct mtd_oob_ops *ops)
  2295. {
  2296. int page, realpage, chipnr;
  2297. struct nand_chip *chip = mtd_to_nand(mtd);
  2298. struct mtd_ecc_stats stats;
  2299. int readlen = ops->ooblen;
  2300. int len;
  2301. uint8_t *buf = ops->oobbuf;
  2302. int ret = 0;
  2303. pr_debug("%s: from = 0x%08Lx, len = %i\n",
  2304. __func__, (unsigned long long)from, readlen);
  2305. stats = mtd->ecc_stats;
  2306. len = mtd_oobavail(mtd, ops);
  2307. if (unlikely(ops->ooboffs >= len)) {
  2308. pr_debug("%s: attempt to start read outside oob\n",
  2309. __func__);
  2310. return -EINVAL;
  2311. }
  2312. /* Do not allow reads past end of device */
  2313. if (unlikely(from >= mtd->size ||
  2314. ops->ooboffs + readlen > ((mtd->size >> chip->page_shift) -
  2315. (from >> chip->page_shift)) * len)) {
  2316. pr_debug("%s: attempt to read beyond end of device\n",
  2317. __func__);
  2318. return -EINVAL;
  2319. }
  2320. chipnr = (int)(from >> chip->chip_shift);
  2321. chip->select_chip(mtd, chipnr);
  2322. /* Shift to get page */
  2323. realpage = (int)(from >> chip->page_shift);
  2324. page = realpage & chip->pagemask;
  2325. while (1) {
  2326. WATCHDOG_RESET();
  2327. if (ops->mode == MTD_OPS_RAW)
  2328. ret = chip->ecc.read_oob_raw(mtd, chip, page);
  2329. else
  2330. ret = chip->ecc.read_oob(mtd, chip, page);
  2331. if (ret < 0)
  2332. break;
  2333. len = min(len, readlen);
  2334. buf = nand_transfer_oob(chip, buf, ops, len);
  2335. if (chip->options & NAND_NEED_READRDY) {
  2336. /* Apply delay or wait for ready/busy pin */
  2337. if (!chip->dev_ready)
  2338. udelay(chip->chip_delay);
  2339. else
  2340. nand_wait_ready(mtd);
  2341. }
  2342. readlen -= len;
  2343. if (!readlen)
  2344. break;
  2345. /* Increment page address */
  2346. realpage++;
  2347. page = realpage & chip->pagemask;
  2348. /* Check, if we cross a chip boundary */
  2349. if (!page) {
  2350. chipnr++;
  2351. chip->select_chip(mtd, -1);
  2352. chip->select_chip(mtd, chipnr);
  2353. }
  2354. }
  2355. chip->select_chip(mtd, -1);
  2356. ops->oobretlen = ops->ooblen - readlen;
  2357. if (ret < 0)
  2358. return ret;
  2359. if (mtd->ecc_stats.failed - stats.failed)
  2360. return -EBADMSG;
  2361. return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
  2362. }
  2363. /**
  2364. * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band
  2365. * @mtd: MTD device structure
  2366. * @from: offset to read from
  2367. * @ops: oob operation description structure
  2368. *
  2369. * NAND read data and/or out-of-band data.
  2370. */
  2371. static int nand_read_oob(struct mtd_info *mtd, loff_t from,
  2372. struct mtd_oob_ops *ops)
  2373. {
  2374. int ret = -ENOTSUPP;
  2375. ops->retlen = 0;
  2376. /* Do not allow reads past end of device */
  2377. if (ops->datbuf && (from + ops->len) > mtd->size) {
  2378. pr_debug("%s: attempt to read beyond end of device\n",
  2379. __func__);
  2380. return -EINVAL;
  2381. }
  2382. nand_get_device(mtd, FL_READING);
  2383. switch (ops->mode) {
  2384. case MTD_OPS_PLACE_OOB:
  2385. case MTD_OPS_AUTO_OOB:
  2386. case MTD_OPS_RAW:
  2387. break;
  2388. default:
  2389. goto out;
  2390. }
  2391. if (!ops->datbuf)
  2392. ret = nand_do_read_oob(mtd, from, ops);
  2393. else
  2394. ret = nand_do_read_ops(mtd, from, ops);
  2395. out:
  2396. nand_release_device(mtd);
  2397. return ret;
  2398. }
  2399. /**
  2400. * nand_write_page_raw - [INTERN] raw page write function
  2401. * @mtd: mtd info structure
  2402. * @chip: nand chip info structure
  2403. * @buf: data buffer
  2404. * @oob_required: must write chip->oob_poi to OOB
  2405. * @page: page number to write
  2406. *
  2407. * Not for syndrome calculating ECC controllers, which use a special oob layout.
  2408. */
  2409. static int nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
  2410. const uint8_t *buf, int oob_required, int page)
  2411. {
  2412. int ret;
  2413. ret = nand_write_data_op(chip, buf, mtd->writesize, false);
  2414. if (ret)
  2415. return ret;
  2416. if (oob_required) {
  2417. ret = nand_write_data_op(chip, chip->oob_poi, mtd->oobsize,
  2418. false);
  2419. if (ret)
  2420. return ret;
  2421. }
  2422. return 0;
  2423. }
  2424. /**
  2425. * nand_write_page_raw_syndrome - [INTERN] raw page write function
  2426. * @mtd: mtd info structure
  2427. * @chip: nand chip info structure
  2428. * @buf: data buffer
  2429. * @oob_required: must write chip->oob_poi to OOB
  2430. * @page: page number to write
  2431. *
  2432. * We need a special oob layout and handling even when ECC isn't checked.
  2433. */
  2434. static int nand_write_page_raw_syndrome(struct mtd_info *mtd,
  2435. struct nand_chip *chip,
  2436. const uint8_t *buf, int oob_required,
  2437. int page)
  2438. {
  2439. int eccsize = chip->ecc.size;
  2440. int eccbytes = chip->ecc.bytes;
  2441. uint8_t *oob = chip->oob_poi;
  2442. int steps, size, ret;
  2443. for (steps = chip->ecc.steps; steps > 0; steps--) {
  2444. ret = nand_write_data_op(chip, buf, eccsize, false);
  2445. if (ret)
  2446. return ret;
  2447. buf += eccsize;
  2448. if (chip->ecc.prepad) {
  2449. ret = nand_write_data_op(chip, oob, chip->ecc.prepad,
  2450. false);
  2451. if (ret)
  2452. return ret;
  2453. oob += chip->ecc.prepad;
  2454. }
  2455. ret = nand_write_data_op(chip, oob, eccbytes, false);
  2456. if (ret)
  2457. return ret;
  2458. oob += eccbytes;
  2459. if (chip->ecc.postpad) {
  2460. ret = nand_write_data_op(chip, oob, chip->ecc.postpad,
  2461. false);
  2462. if (ret)
  2463. return ret;
  2464. oob += chip->ecc.postpad;
  2465. }
  2466. }
  2467. size = mtd->oobsize - (oob - chip->oob_poi);
  2468. if (size) {
  2469. ret = nand_write_data_op(chip, oob, size, false);
  2470. if (ret)
  2471. return ret;
  2472. }
  2473. return 0;
  2474. }
  2475. /**
  2476. * nand_write_page_swecc - [REPLACEABLE] software ECC based page write function
  2477. * @mtd: mtd info structure
  2478. * @chip: nand chip info structure
  2479. * @buf: data buffer
  2480. * @oob_required: must write chip->oob_poi to OOB
  2481. * @page: page number to write
  2482. */
  2483. static int nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
  2484. const uint8_t *buf, int oob_required,
  2485. int page)
  2486. {
  2487. int i, eccsize = chip->ecc.size;
  2488. int eccbytes = chip->ecc.bytes;
  2489. int eccsteps = chip->ecc.steps;
  2490. uint8_t *ecc_calc = chip->buffers->ecccalc;
  2491. const uint8_t *p = buf;
  2492. uint32_t *eccpos = chip->ecc.layout->eccpos;
  2493. /* Software ECC calculation */
  2494. for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
  2495. chip->ecc.calculate(mtd, p, &ecc_calc[i]);
  2496. for (i = 0; i < chip->ecc.total; i++)
  2497. chip->oob_poi[eccpos[i]] = ecc_calc[i];
  2498. return chip->ecc.write_page_raw(mtd, chip, buf, 1, page);
  2499. }
  2500. /**
  2501. * nand_write_page_hwecc - [REPLACEABLE] hardware ECC based page write function
  2502. * @mtd: mtd info structure
  2503. * @chip: nand chip info structure
  2504. * @buf: data buffer
  2505. * @oob_required: must write chip->oob_poi to OOB
  2506. * @page: page number to write
  2507. */
  2508. static int nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
  2509. const uint8_t *buf, int oob_required,
  2510. int page)
  2511. {
  2512. int i, eccsize = chip->ecc.size;
  2513. int eccbytes = chip->ecc.bytes;
  2514. int eccsteps = chip->ecc.steps;
  2515. uint8_t *ecc_calc = chip->buffers->ecccalc;
  2516. const uint8_t *p = buf;
  2517. uint32_t *eccpos = chip->ecc.layout->eccpos;
  2518. int ret;
  2519. for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
  2520. chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
  2521. ret = nand_write_data_op(chip, p, eccsize, false);
  2522. if (ret)
  2523. return ret;
  2524. chip->ecc.calculate(mtd, p, &ecc_calc[i]);
  2525. }
  2526. for (i = 0; i < chip->ecc.total; i++)
  2527. chip->oob_poi[eccpos[i]] = ecc_calc[i];
  2528. ret = nand_write_data_op(chip, chip->oob_poi, mtd->oobsize, false);
  2529. if (ret)
  2530. return ret;
  2531. return 0;
  2532. }
  2533. /**
  2534. * nand_write_subpage_hwecc - [REPLACEABLE] hardware ECC based subpage write
  2535. * @mtd: mtd info structure
  2536. * @chip: nand chip info structure
  2537. * @offset: column address of subpage within the page
  2538. * @data_len: data length
  2539. * @buf: data buffer
  2540. * @oob_required: must write chip->oob_poi to OOB
  2541. * @page: page number to write
  2542. */
  2543. static int nand_write_subpage_hwecc(struct mtd_info *mtd,
  2544. struct nand_chip *chip, uint32_t offset,
  2545. uint32_t data_len, const uint8_t *buf,
  2546. int oob_required, int page)
  2547. {
  2548. uint8_t *oob_buf = chip->oob_poi;
  2549. uint8_t *ecc_calc = chip->buffers->ecccalc;
  2550. int ecc_size = chip->ecc.size;
  2551. int ecc_bytes = chip->ecc.bytes;
  2552. int ecc_steps = chip->ecc.steps;
  2553. uint32_t *eccpos = chip->ecc.layout->eccpos;
  2554. uint32_t start_step = offset / ecc_size;
  2555. uint32_t end_step = (offset + data_len - 1) / ecc_size;
  2556. int oob_bytes = mtd->oobsize / ecc_steps;
  2557. int step, i;
  2558. int ret;
  2559. for (step = 0; step < ecc_steps; step++) {
  2560. /* configure controller for WRITE access */
  2561. chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
  2562. /* write data (untouched subpages already masked by 0xFF) */
  2563. ret = nand_write_data_op(chip, buf, ecc_size, false);
  2564. if (ret)
  2565. return ret;
  2566. /* mask ECC of un-touched subpages by padding 0xFF */
  2567. if ((step < start_step) || (step > end_step))
  2568. memset(ecc_calc, 0xff, ecc_bytes);
  2569. else
  2570. chip->ecc.calculate(mtd, buf, ecc_calc);
  2571. /* mask OOB of un-touched subpages by padding 0xFF */
  2572. /* if oob_required, preserve OOB metadata of written subpage */
  2573. if (!oob_required || (step < start_step) || (step > end_step))
  2574. memset(oob_buf, 0xff, oob_bytes);
  2575. buf += ecc_size;
  2576. ecc_calc += ecc_bytes;
  2577. oob_buf += oob_bytes;
  2578. }
  2579. /* copy calculated ECC for whole page to chip->buffer->oob */
  2580. /* this include masked-value(0xFF) for unwritten subpages */
  2581. ecc_calc = chip->buffers->ecccalc;
  2582. for (i = 0; i < chip->ecc.total; i++)
  2583. chip->oob_poi[eccpos[i]] = ecc_calc[i];
  2584. /* write OOB buffer to NAND device */
  2585. ret = nand_write_data_op(chip, chip->oob_poi, mtd->oobsize, false);
  2586. if (ret)
  2587. return ret;
  2588. return 0;
  2589. }
  2590. /**
  2591. * nand_write_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page write
  2592. * @mtd: mtd info structure
  2593. * @chip: nand chip info structure
  2594. * @buf: data buffer
  2595. * @oob_required: must write chip->oob_poi to OOB
  2596. * @page: page number to write
  2597. *
  2598. * The hw generator calculates the error syndrome automatically. Therefore we
  2599. * need a special oob layout and handling.
  2600. */
  2601. static int nand_write_page_syndrome(struct mtd_info *mtd,
  2602. struct nand_chip *chip,
  2603. const uint8_t *buf, int oob_required,
  2604. int page)
  2605. {
  2606. int i, eccsize = chip->ecc.size;
  2607. int eccbytes = chip->ecc.bytes;
  2608. int eccsteps = chip->ecc.steps;
  2609. const uint8_t *p = buf;
  2610. uint8_t *oob = chip->oob_poi;
  2611. int ret;
  2612. for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
  2613. chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
  2614. ret = nand_write_data_op(chip, p, eccsize, false);
  2615. if (ret)
  2616. return ret;
  2617. if (chip->ecc.prepad) {
  2618. ret = nand_write_data_op(chip, oob, chip->ecc.prepad,
  2619. false);
  2620. if (ret)
  2621. return ret;
  2622. oob += chip->ecc.prepad;
  2623. }
  2624. chip->ecc.calculate(mtd, p, oob);
  2625. ret = nand_write_data_op(chip, oob, eccbytes, false);
  2626. if (ret)
  2627. return ret;
  2628. oob += eccbytes;
  2629. if (chip->ecc.postpad) {
  2630. ret = nand_write_data_op(chip, oob, chip->ecc.postpad,
  2631. false);
  2632. if (ret)
  2633. return ret;
  2634. oob += chip->ecc.postpad;
  2635. }
  2636. }
  2637. /* Calculate remaining oob bytes */
  2638. i = mtd->oobsize - (oob - chip->oob_poi);
  2639. if (i) {
  2640. ret = nand_write_data_op(chip, oob, i, false);
  2641. if (ret)
  2642. return ret;
  2643. }
  2644. return 0;
  2645. }
  2646. /**
  2647. * nand_write_page - [REPLACEABLE] write one page
  2648. * @mtd: MTD device structure
  2649. * @chip: NAND chip descriptor
  2650. * @offset: address offset within the page
  2651. * @data_len: length of actual data to be written
  2652. * @buf: the data to write
  2653. * @oob_required: must write chip->oob_poi to OOB
  2654. * @page: page number to write
  2655. * @raw: use _raw version of write_page
  2656. */
  2657. static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
  2658. uint32_t offset, int data_len, const uint8_t *buf,
  2659. int oob_required, int page, int raw)
  2660. {
  2661. int status, subpage;
  2662. if (!(chip->options & NAND_NO_SUBPAGE_WRITE) &&
  2663. chip->ecc.write_subpage)
  2664. subpage = offset || (data_len < mtd->writesize);
  2665. else
  2666. subpage = 0;
  2667. if (nand_standard_page_accessors(&chip->ecc)) {
  2668. status = nand_prog_page_begin_op(chip, page, 0, NULL, 0);
  2669. if (status)
  2670. return status;
  2671. }
  2672. if (unlikely(raw))
  2673. status = chip->ecc.write_page_raw(mtd, chip, buf,
  2674. oob_required, page);
  2675. else if (subpage)
  2676. status = chip->ecc.write_subpage(mtd, chip, offset, data_len,
  2677. buf, oob_required, page);
  2678. else
  2679. status = chip->ecc.write_page(mtd, chip, buf, oob_required,
  2680. page);
  2681. if (status < 0)
  2682. return status;
  2683. if (nand_standard_page_accessors(&chip->ecc))
  2684. return nand_prog_page_end_op(chip);
  2685. return 0;
  2686. }
  2687. /**
  2688. * nand_fill_oob - [INTERN] Transfer client buffer to oob
  2689. * @mtd: MTD device structure
  2690. * @oob: oob data buffer
  2691. * @len: oob data write length
  2692. * @ops: oob ops structure
  2693. */
  2694. static uint8_t *nand_fill_oob(struct mtd_info *mtd, uint8_t *oob, size_t len,
  2695. struct mtd_oob_ops *ops)
  2696. {
  2697. struct nand_chip *chip = mtd_to_nand(mtd);
  2698. /*
  2699. * Initialise to all 0xFF, to avoid the possibility of left over OOB
  2700. * data from a previous OOB read.
  2701. */
  2702. memset(chip->oob_poi, 0xff, mtd->oobsize);
  2703. switch (ops->mode) {
  2704. case MTD_OPS_PLACE_OOB:
  2705. case MTD_OPS_RAW:
  2706. memcpy(chip->oob_poi + ops->ooboffs, oob, len);
  2707. return oob + len;
  2708. case MTD_OPS_AUTO_OOB: {
  2709. struct nand_oobfree *free = chip->ecc.layout->oobfree;
  2710. uint32_t boffs = 0, woffs = ops->ooboffs;
  2711. size_t bytes = 0;
  2712. for (; free->length && len; free++, len -= bytes) {
  2713. /* Write request not from offset 0? */
  2714. if (unlikely(woffs)) {
  2715. if (woffs >= free->length) {
  2716. woffs -= free->length;
  2717. continue;
  2718. }
  2719. boffs = free->offset + woffs;
  2720. bytes = min_t(size_t, len,
  2721. (free->length - woffs));
  2722. woffs = 0;
  2723. } else {
  2724. bytes = min_t(size_t, len, free->length);
  2725. boffs = free->offset;
  2726. }
  2727. memcpy(chip->oob_poi + boffs, oob, bytes);
  2728. oob += bytes;
  2729. }
  2730. return oob;
  2731. }
  2732. default:
  2733. BUG();
  2734. }
  2735. return NULL;
  2736. }
  2737. #define NOTALIGNED(x) ((x & (chip->subpagesize - 1)) != 0)
  2738. /**
  2739. * nand_do_write_ops - [INTERN] NAND write with ECC
  2740. * @mtd: MTD device structure
  2741. * @to: offset to write to
  2742. * @ops: oob operations description structure
  2743. *
  2744. * NAND write with ECC.
  2745. */
  2746. static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
  2747. struct mtd_oob_ops *ops)
  2748. {
  2749. int chipnr, realpage, page, column;
  2750. struct nand_chip *chip = mtd_to_nand(mtd);
  2751. uint32_t writelen = ops->len;
  2752. uint32_t oobwritelen = ops->ooblen;
  2753. uint32_t oobmaxlen = mtd_oobavail(mtd, ops);
  2754. uint8_t *oob = ops->oobbuf;
  2755. uint8_t *buf = ops->datbuf;
  2756. int ret;
  2757. int oob_required = oob ? 1 : 0;
  2758. ops->retlen = 0;
  2759. if (!writelen)
  2760. return 0;
  2761. /* Reject writes, which are not page aligned */
  2762. if (NOTALIGNED(to)) {
  2763. pr_notice("%s: attempt to write non page aligned data\n",
  2764. __func__);
  2765. return -EINVAL;
  2766. }
  2767. column = to & (mtd->writesize - 1);
  2768. chipnr = (int)(to >> chip->chip_shift);
  2769. chip->select_chip(mtd, chipnr);
  2770. /* Check, if it is write protected */
  2771. if (nand_check_wp(mtd)) {
  2772. ret = -EIO;
  2773. goto err_out;
  2774. }
  2775. realpage = (int)(to >> chip->page_shift);
  2776. page = realpage & chip->pagemask;
  2777. /* Invalidate the page cache, when we write to the cached page */
  2778. if (to <= ((loff_t)chip->pagebuf << chip->page_shift) &&
  2779. ((loff_t)chip->pagebuf << chip->page_shift) < (to + ops->len))
  2780. chip->pagebuf = -1;
  2781. /* Don't allow multipage oob writes with offset */
  2782. if (oob && ops->ooboffs && (ops->ooboffs + ops->ooblen > oobmaxlen)) {
  2783. ret = -EINVAL;
  2784. goto err_out;
  2785. }
  2786. while (1) {
  2787. int bytes = mtd->writesize;
  2788. uint8_t *wbuf = buf;
  2789. int use_bufpoi;
  2790. int part_pagewr = (column || writelen < mtd->writesize);
  2791. if (part_pagewr)
  2792. use_bufpoi = 1;
  2793. else if (chip->options & NAND_USE_BOUNCE_BUFFER)
  2794. use_bufpoi = !IS_ALIGNED((unsigned long)buf,
  2795. chip->buf_align);
  2796. else
  2797. use_bufpoi = 0;
  2798. WATCHDOG_RESET();
  2799. /* Partial page write?, or need to use bounce buffer */
  2800. if (use_bufpoi) {
  2801. pr_debug("%s: using write bounce buffer for buf@%p\n",
  2802. __func__, buf);
  2803. if (part_pagewr)
  2804. bytes = min_t(int, bytes - column, writelen);
  2805. chip->pagebuf = -1;
  2806. memset(chip->buffers->databuf, 0xff, mtd->writesize);
  2807. memcpy(&chip->buffers->databuf[column], buf, bytes);
  2808. wbuf = chip->buffers->databuf;
  2809. }
  2810. if (unlikely(oob)) {
  2811. size_t len = min(oobwritelen, oobmaxlen);
  2812. oob = nand_fill_oob(mtd, oob, len, ops);
  2813. oobwritelen -= len;
  2814. } else {
  2815. /* We still need to erase leftover OOB data */
  2816. memset(chip->oob_poi, 0xff, mtd->oobsize);
  2817. }
  2818. ret = chip->write_page(mtd, chip, column, bytes, wbuf,
  2819. oob_required, page,
  2820. (ops->mode == MTD_OPS_RAW));
  2821. if (ret)
  2822. break;
  2823. writelen -= bytes;
  2824. if (!writelen)
  2825. break;
  2826. column = 0;
  2827. buf += bytes;
  2828. realpage++;
  2829. page = realpage & chip->pagemask;
  2830. /* Check, if we cross a chip boundary */
  2831. if (!page) {
  2832. chipnr++;
  2833. chip->select_chip(mtd, -1);
  2834. chip->select_chip(mtd, chipnr);
  2835. }
  2836. }
  2837. ops->retlen = ops->len - writelen;
  2838. if (unlikely(oob))
  2839. ops->oobretlen = ops->ooblen;
  2840. err_out:
  2841. chip->select_chip(mtd, -1);
  2842. return ret;
  2843. }
  2844. /**
  2845. * panic_nand_write - [MTD Interface] NAND write with ECC
  2846. * @mtd: MTD device structure
  2847. * @to: offset to write to
  2848. * @len: number of bytes to write
  2849. * @retlen: pointer to variable to store the number of written bytes
  2850. * @buf: the data to write
  2851. *
  2852. * NAND write with ECC. Used when performing writes in interrupt context, this
  2853. * may for example be called by mtdoops when writing an oops while in panic.
  2854. */
  2855. static int panic_nand_write(struct mtd_info *mtd, loff_t to, size_t len,
  2856. size_t *retlen, const uint8_t *buf)
  2857. {
  2858. struct nand_chip *chip = mtd_to_nand(mtd);
  2859. struct mtd_oob_ops ops;
  2860. int ret;
  2861. /* Wait for the device to get ready */
  2862. panic_nand_wait(mtd, chip, 400);
  2863. /* Grab the device */
  2864. panic_nand_get_device(chip, mtd, FL_WRITING);
  2865. memset(&ops, 0, sizeof(ops));
  2866. ops.len = len;
  2867. ops.datbuf = (uint8_t *)buf;
  2868. ops.mode = MTD_OPS_PLACE_OOB;
  2869. ret = nand_do_write_ops(mtd, to, &ops);
  2870. *retlen = ops.retlen;
  2871. return ret;
  2872. }
  2873. /**
  2874. * nand_do_write_oob - [MTD Interface] NAND write out-of-band
  2875. * @mtd: MTD device structure
  2876. * @to: offset to write to
  2877. * @ops: oob operation description structure
  2878. *
  2879. * NAND write out-of-band.
  2880. */
  2881. static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
  2882. struct mtd_oob_ops *ops)
  2883. {
  2884. int chipnr, page, status, len;
  2885. struct nand_chip *chip = mtd_to_nand(mtd);
  2886. pr_debug("%s: to = 0x%08x, len = %i\n",
  2887. __func__, (unsigned int)to, (int)ops->ooblen);
  2888. len = mtd_oobavail(mtd, ops);
  2889. /* Do not allow write past end of page */
  2890. if ((ops->ooboffs + ops->ooblen) > len) {
  2891. pr_debug("%s: attempt to write past end of page\n",
  2892. __func__);
  2893. return -EINVAL;
  2894. }
  2895. if (unlikely(ops->ooboffs >= len)) {
  2896. pr_debug("%s: attempt to start write outside oob\n",
  2897. __func__);
  2898. return -EINVAL;
  2899. }
  2900. /* Do not allow write past end of device */
  2901. if (unlikely(to >= mtd->size ||
  2902. ops->ooboffs + ops->ooblen >
  2903. ((mtd->size >> chip->page_shift) -
  2904. (to >> chip->page_shift)) * len)) {
  2905. pr_debug("%s: attempt to write beyond end of device\n",
  2906. __func__);
  2907. return -EINVAL;
  2908. }
  2909. chipnr = (int)(to >> chip->chip_shift);
  2910. /*
  2911. * Reset the chip. Some chips (like the Toshiba TC5832DC found in one
  2912. * of my DiskOnChip 2000 test units) will clear the whole data page too
  2913. * if we don't do this. I have no clue why, but I seem to have 'fixed'
  2914. * it in the doc2000 driver in August 1999. dwmw2.
  2915. */
  2916. nand_reset(chip, chipnr);
  2917. chip->select_chip(mtd, chipnr);
  2918. /* Shift to get page */
  2919. page = (int)(to >> chip->page_shift);
  2920. /* Check, if it is write protected */
  2921. if (nand_check_wp(mtd)) {
  2922. chip->select_chip(mtd, -1);
  2923. return -EROFS;
  2924. }
  2925. /* Invalidate the page cache, if we write to the cached page */
  2926. if (page == chip->pagebuf)
  2927. chip->pagebuf = -1;
  2928. nand_fill_oob(mtd, ops->oobbuf, ops->ooblen, ops);
  2929. if (ops->mode == MTD_OPS_RAW)
  2930. status = chip->ecc.write_oob_raw(mtd, chip, page & chip->pagemask);
  2931. else
  2932. status = chip->ecc.write_oob(mtd, chip, page & chip->pagemask);
  2933. chip->select_chip(mtd, -1);
  2934. if (status)
  2935. return status;
  2936. ops->oobretlen = ops->ooblen;
  2937. return 0;
  2938. }
  2939. /**
  2940. * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band
  2941. * @mtd: MTD device structure
  2942. * @to: offset to write to
  2943. * @ops: oob operation description structure
  2944. */
  2945. static int nand_write_oob(struct mtd_info *mtd, loff_t to,
  2946. struct mtd_oob_ops *ops)
  2947. {
  2948. int ret = -ENOTSUPP;
  2949. ops->retlen = 0;
  2950. /* Do not allow writes past end of device */
  2951. if (ops->datbuf && (to + ops->len) > mtd->size) {
  2952. pr_debug("%s: attempt to write beyond end of device\n",
  2953. __func__);
  2954. return -EINVAL;
  2955. }
  2956. nand_get_device(mtd, FL_WRITING);
  2957. switch (ops->mode) {
  2958. case MTD_OPS_PLACE_OOB:
  2959. case MTD_OPS_AUTO_OOB:
  2960. case MTD_OPS_RAW:
  2961. break;
  2962. default:
  2963. goto out;
  2964. }
  2965. if (!ops->datbuf)
  2966. ret = nand_do_write_oob(mtd, to, ops);
  2967. else
  2968. ret = nand_do_write_ops(mtd, to, ops);
  2969. out:
  2970. nand_release_device(mtd);
  2971. return ret;
  2972. }
  2973. /**
  2974. * single_erase - [GENERIC] NAND standard block erase command function
  2975. * @mtd: MTD device structure
  2976. * @page: the page address of the block which will be erased
  2977. *
  2978. * Standard erase command for NAND chips. Returns NAND status.
  2979. */
  2980. static int single_erase(struct mtd_info *mtd, int page)
  2981. {
  2982. struct nand_chip *chip = mtd_to_nand(mtd);
  2983. unsigned int eraseblock;
  2984. /* Send commands to erase a block */
  2985. eraseblock = page >> (chip->phys_erase_shift - chip->page_shift);
  2986. return nand_erase_op(chip, eraseblock);
  2987. }
  2988. /**
  2989. * nand_erase - [MTD Interface] erase block(s)
  2990. * @mtd: MTD device structure
  2991. * @instr: erase instruction
  2992. *
  2993. * Erase one ore more blocks.
  2994. */
  2995. static int nand_erase(struct mtd_info *mtd, struct erase_info *instr)
  2996. {
  2997. return nand_erase_nand(mtd, instr, 0);
  2998. }
  2999. /**
  3000. * nand_erase_nand - [INTERN] erase block(s)
  3001. * @mtd: MTD device structure
  3002. * @instr: erase instruction
  3003. * @allowbbt: allow erasing the bbt area
  3004. *
  3005. * Erase one ore more blocks.
  3006. */
  3007. int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
  3008. int allowbbt)
  3009. {
  3010. int page, status, pages_per_block, ret, chipnr;
  3011. struct nand_chip *chip = mtd_to_nand(mtd);
  3012. loff_t len;
  3013. pr_debug("%s: start = 0x%012llx, len = %llu\n",
  3014. __func__, (unsigned long long)instr->addr,
  3015. (unsigned long long)instr->len);
  3016. if (check_offs_len(mtd, instr->addr, instr->len))
  3017. return -EINVAL;
  3018. /* Grab the lock and see if the device is available */
  3019. nand_get_device(mtd, FL_ERASING);
  3020. /* Shift to get first page */
  3021. page = (int)(instr->addr >> chip->page_shift);
  3022. chipnr = (int)(instr->addr >> chip->chip_shift);
  3023. /* Calculate pages in each block */
  3024. pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift);
  3025. /* Select the NAND device */
  3026. chip->select_chip(mtd, chipnr);
  3027. /* Check, if it is write protected */
  3028. if (nand_check_wp(mtd)) {
  3029. pr_debug("%s: device is write protected!\n",
  3030. __func__);
  3031. instr->state = MTD_ERASE_FAILED;
  3032. goto erase_exit;
  3033. }
  3034. /* Loop through the pages */
  3035. len = instr->len;
  3036. instr->state = MTD_ERASING;
  3037. while (len) {
  3038. WATCHDOG_RESET();
  3039. /* Check if we have a bad block, we do not erase bad blocks! */
  3040. if (!instr->scrub && nand_block_checkbad(mtd, ((loff_t) page) <<
  3041. chip->page_shift, allowbbt)) {
  3042. pr_warn("%s: attempt to erase a bad block at page 0x%08x\n",
  3043. __func__, page);
  3044. instr->state = MTD_ERASE_FAILED;
  3045. goto erase_exit;
  3046. }
  3047. /*
  3048. * Invalidate the page cache, if we erase the block which
  3049. * contains the current cached page.
  3050. */
  3051. if (page <= chip->pagebuf && chip->pagebuf <
  3052. (page + pages_per_block))
  3053. chip->pagebuf = -1;
  3054. status = chip->erase(mtd, page & chip->pagemask);
  3055. /* See if block erase succeeded */
  3056. if (status & NAND_STATUS_FAIL) {
  3057. pr_debug("%s: failed erase, page 0x%08x\n",
  3058. __func__, page);
  3059. instr->state = MTD_ERASE_FAILED;
  3060. instr->fail_addr =
  3061. ((loff_t)page << chip->page_shift);
  3062. goto erase_exit;
  3063. }
  3064. /* Increment page address and decrement length */
  3065. len -= (1ULL << chip->phys_erase_shift);
  3066. page += pages_per_block;
  3067. /* Check, if we cross a chip boundary */
  3068. if (len && !(page & chip->pagemask)) {
  3069. chipnr++;
  3070. chip->select_chip(mtd, -1);
  3071. chip->select_chip(mtd, chipnr);
  3072. }
  3073. }
  3074. instr->state = MTD_ERASE_DONE;
  3075. erase_exit:
  3076. ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
  3077. /* Deselect and wake up anyone waiting on the device */
  3078. chip->select_chip(mtd, -1);
  3079. nand_release_device(mtd);
  3080. /* Do call back function */
  3081. if (!ret)
  3082. mtd_erase_callback(instr);
  3083. /* Return more or less happy */
  3084. return ret;
  3085. }
  3086. /**
  3087. * nand_sync - [MTD Interface] sync
  3088. * @mtd: MTD device structure
  3089. *
  3090. * Sync is actually a wait for chip ready function.
  3091. */
  3092. static void nand_sync(struct mtd_info *mtd)
  3093. {
  3094. pr_debug("%s: called\n", __func__);
  3095. /* Grab the lock and see if the device is available */
  3096. nand_get_device(mtd, FL_SYNCING);
  3097. /* Release it and go back */
  3098. nand_release_device(mtd);
  3099. }
  3100. /**
  3101. * nand_block_isbad - [MTD Interface] Check if block at offset is bad
  3102. * @mtd: MTD device structure
  3103. * @offs: offset relative to mtd start
  3104. */
  3105. static int nand_block_isbad(struct mtd_info *mtd, loff_t offs)
  3106. {
  3107. struct nand_chip *chip = mtd_to_nand(mtd);
  3108. int chipnr = (int)(offs >> chip->chip_shift);
  3109. int ret;
  3110. /* Select the NAND device */
  3111. nand_get_device(mtd, FL_READING);
  3112. chip->select_chip(mtd, chipnr);
  3113. ret = nand_block_checkbad(mtd, offs, 0);
  3114. chip->select_chip(mtd, -1);
  3115. nand_release_device(mtd);
  3116. return ret;
  3117. }
  3118. /**
  3119. * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad
  3120. * @mtd: MTD device structure
  3121. * @ofs: offset relative to mtd start
  3122. */
  3123. static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
  3124. {
  3125. int ret;
  3126. ret = nand_block_isbad(mtd, ofs);
  3127. if (ret) {
  3128. /* If it was bad already, return success and do nothing */
  3129. if (ret > 0)
  3130. return 0;
  3131. return ret;
  3132. }
  3133. return nand_block_markbad_lowlevel(mtd, ofs);
  3134. }
  3135. /**
  3136. * nand_onfi_set_features- [REPLACEABLE] set features for ONFI nand
  3137. * @mtd: MTD device structure
  3138. * @chip: nand chip info structure
  3139. * @addr: feature address.
  3140. * @subfeature_param: the subfeature parameters, a four bytes array.
  3141. */
  3142. static int nand_onfi_set_features(struct mtd_info *mtd, struct nand_chip *chip,
  3143. int addr, uint8_t *subfeature_param)
  3144. {
  3145. #ifdef CONFIG_SYS_NAND_ONFI_DETECTION
  3146. if (!chip->onfi_version ||
  3147. !(le16_to_cpu(chip->onfi_params.opt_cmd)
  3148. & ONFI_OPT_CMD_SET_GET_FEATURES))
  3149. return -ENOTSUPP;
  3150. #endif
  3151. return nand_set_features_op(chip, addr, subfeature_param);
  3152. }
  3153. /**
  3154. * nand_onfi_get_features- [REPLACEABLE] get features for ONFI nand
  3155. * @mtd: MTD device structure
  3156. * @chip: nand chip info structure
  3157. * @addr: feature address.
  3158. * @subfeature_param: the subfeature parameters, a four bytes array.
  3159. */
  3160. static int nand_onfi_get_features(struct mtd_info *mtd, struct nand_chip *chip,
  3161. int addr, uint8_t *subfeature_param)
  3162. {
  3163. #ifdef CONFIG_SYS_NAND_ONFI_DETECTION
  3164. if (!chip->onfi_version ||
  3165. !(le16_to_cpu(chip->onfi_params.opt_cmd)
  3166. & ONFI_OPT_CMD_SET_GET_FEATURES))
  3167. return -ENOTSUPP;
  3168. #endif
  3169. return nand_get_features_op(chip, addr, subfeature_param);
  3170. }
  3171. /* Set default functions */
  3172. static void nand_set_defaults(struct nand_chip *chip, int busw)
  3173. {
  3174. /* check for proper chip_delay setup, set 20us if not */
  3175. if (!chip->chip_delay)
  3176. chip->chip_delay = 20;
  3177. /* check, if a user supplied command function given */
  3178. if (chip->cmdfunc == NULL)
  3179. chip->cmdfunc = nand_command;
  3180. /* check, if a user supplied wait function given */
  3181. if (chip->waitfunc == NULL)
  3182. chip->waitfunc = nand_wait;
  3183. if (!chip->select_chip)
  3184. chip->select_chip = nand_select_chip;
  3185. /* set for ONFI nand */
  3186. if (!chip->onfi_set_features)
  3187. chip->onfi_set_features = nand_onfi_set_features;
  3188. if (!chip->onfi_get_features)
  3189. chip->onfi_get_features = nand_onfi_get_features;
  3190. /* If called twice, pointers that depend on busw may need to be reset */
  3191. if (!chip->read_byte || chip->read_byte == nand_read_byte)
  3192. chip->read_byte = busw ? nand_read_byte16 : nand_read_byte;
  3193. if (!chip->read_word)
  3194. chip->read_word = nand_read_word;
  3195. if (!chip->block_bad)
  3196. chip->block_bad = nand_block_bad;
  3197. if (!chip->block_markbad)
  3198. chip->block_markbad = nand_default_block_markbad;
  3199. if (!chip->write_buf || chip->write_buf == nand_write_buf)
  3200. chip->write_buf = busw ? nand_write_buf16 : nand_write_buf;
  3201. if (!chip->write_byte || chip->write_byte == nand_write_byte)
  3202. chip->write_byte = busw ? nand_write_byte16 : nand_write_byte;
  3203. if (!chip->read_buf || chip->read_buf == nand_read_buf)
  3204. chip->read_buf = busw ? nand_read_buf16 : nand_read_buf;
  3205. if (!chip->scan_bbt)
  3206. chip->scan_bbt = nand_default_bbt;
  3207. if (!chip->controller) {
  3208. chip->controller = &chip->hwcontrol;
  3209. spin_lock_init(&chip->controller->lock);
  3210. init_waitqueue_head(&chip->controller->wq);
  3211. }
  3212. if (!chip->buf_align)
  3213. chip->buf_align = 1;
  3214. }
  3215. /* Sanitize ONFI strings so we can safely print them */
  3216. static void sanitize_string(char *s, size_t len)
  3217. {
  3218. ssize_t i;
  3219. /* Null terminate */
  3220. s[len - 1] = 0;
  3221. /* Remove non printable chars */
  3222. for (i = 0; i < len - 1; i++) {
  3223. if (s[i] < ' ' || s[i] > 127)
  3224. s[i] = '?';
  3225. }
  3226. /* Remove trailing spaces */
  3227. strim(s);
  3228. }
  3229. static u16 onfi_crc16(u16 crc, u8 const *p, size_t len)
  3230. {
  3231. int i;
  3232. while (len--) {
  3233. crc ^= *p++ << 8;
  3234. for (i = 0; i < 8; i++)
  3235. crc = (crc << 1) ^ ((crc & 0x8000) ? 0x8005 : 0);
  3236. }
  3237. return crc;
  3238. }
  3239. #ifdef CONFIG_SYS_NAND_ONFI_DETECTION
  3240. /* Parse the Extended Parameter Page. */
  3241. static int nand_flash_detect_ext_param_page(struct mtd_info *mtd,
  3242. struct nand_chip *chip, struct nand_onfi_params *p)
  3243. {
  3244. struct onfi_ext_param_page *ep;
  3245. struct onfi_ext_section *s;
  3246. struct onfi_ext_ecc_info *ecc;
  3247. uint8_t *cursor;
  3248. int ret;
  3249. int len;
  3250. int i;
  3251. len = le16_to_cpu(p->ext_param_page_length) * 16;
  3252. ep = kmalloc(len, GFP_KERNEL);
  3253. if (!ep)
  3254. return -ENOMEM;
  3255. /* Send our own NAND_CMD_PARAM. */
  3256. ret = nand_read_param_page_op(chip, 0, NULL, 0);
  3257. if (ret)
  3258. goto ext_out;
  3259. /* Use the Change Read Column command to skip the ONFI param pages. */
  3260. ret = nand_change_read_column_op(chip,
  3261. sizeof(*p) * p->num_of_param_pages,
  3262. ep, len, true);
  3263. if (ret)
  3264. goto ext_out;
  3265. ret = -EINVAL;
  3266. if ((onfi_crc16(ONFI_CRC_BASE, ((uint8_t *)ep) + 2, len - 2)
  3267. != le16_to_cpu(ep->crc))) {
  3268. pr_debug("fail in the CRC.\n");
  3269. goto ext_out;
  3270. }
  3271. /*
  3272. * Check the signature.
  3273. * Do not strictly follow the ONFI spec, maybe changed in future.
  3274. */
  3275. if (strncmp((char *)ep->sig, "EPPS", 4)) {
  3276. pr_debug("The signature is invalid.\n");
  3277. goto ext_out;
  3278. }
  3279. /* find the ECC section. */
  3280. cursor = (uint8_t *)(ep + 1);
  3281. for (i = 0; i < ONFI_EXT_SECTION_MAX; i++) {
  3282. s = ep->sections + i;
  3283. if (s->type == ONFI_SECTION_TYPE_2)
  3284. break;
  3285. cursor += s->length * 16;
  3286. }
  3287. if (i == ONFI_EXT_SECTION_MAX) {
  3288. pr_debug("We can not find the ECC section.\n");
  3289. goto ext_out;
  3290. }
  3291. /* get the info we want. */
  3292. ecc = (struct onfi_ext_ecc_info *)cursor;
  3293. if (!ecc->codeword_size) {
  3294. pr_debug("Invalid codeword size\n");
  3295. goto ext_out;
  3296. }
  3297. chip->ecc_strength_ds = ecc->ecc_bits;
  3298. chip->ecc_step_ds = 1 << ecc->codeword_size;
  3299. ret = 0;
  3300. ext_out:
  3301. kfree(ep);
  3302. return ret;
  3303. }
  3304. static int nand_setup_read_retry_micron(struct mtd_info *mtd, int retry_mode)
  3305. {
  3306. struct nand_chip *chip = mtd_to_nand(mtd);
  3307. uint8_t feature[ONFI_SUBFEATURE_PARAM_LEN] = {retry_mode};
  3308. return chip->onfi_set_features(mtd, chip, ONFI_FEATURE_ADDR_READ_RETRY,
  3309. feature);
  3310. }
  3311. /*
  3312. * Configure chip properties from Micron vendor-specific ONFI table
  3313. */
  3314. static void nand_onfi_detect_micron(struct nand_chip *chip,
  3315. struct nand_onfi_params *p)
  3316. {
  3317. struct nand_onfi_vendor_micron *micron = (void *)p->vendor;
  3318. if (le16_to_cpu(p->vendor_revision) < 1)
  3319. return;
  3320. chip->read_retries = micron->read_retry_options;
  3321. chip->setup_read_retry = nand_setup_read_retry_micron;
  3322. }
  3323. /*
  3324. * Check if the NAND chip is ONFI compliant, returns 1 if it is, 0 otherwise.
  3325. */
  3326. static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,
  3327. int *busw)
  3328. {
  3329. struct nand_onfi_params *p = &chip->onfi_params;
  3330. char id[4];
  3331. int i, ret, val;
  3332. /* Try ONFI for unknown chip or LP */
  3333. ret = nand_readid_op(chip, 0x20, id, sizeof(id));
  3334. if (ret || strncmp(id, "ONFI", 4))
  3335. return 0;
  3336. ret = nand_read_param_page_op(chip, 0, NULL, 0);
  3337. if (ret)
  3338. return 0;
  3339. for (i = 0; i < 3; i++) {
  3340. ret = nand_read_data_op(chip, p, sizeof(*p), true);
  3341. if (ret)
  3342. return 0;
  3343. if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 254) ==
  3344. le16_to_cpu(p->crc)) {
  3345. break;
  3346. }
  3347. }
  3348. if (i == 3) {
  3349. pr_err("Could not find valid ONFI parameter page; aborting\n");
  3350. return 0;
  3351. }
  3352. /* Check version */
  3353. val = le16_to_cpu(p->revision);
  3354. if (val & (1 << 5))
  3355. chip->onfi_version = 23;
  3356. else if (val & (1 << 4))
  3357. chip->onfi_version = 22;
  3358. else if (val & (1 << 3))
  3359. chip->onfi_version = 21;
  3360. else if (val & (1 << 2))
  3361. chip->onfi_version = 20;
  3362. else if (val & (1 << 1))
  3363. chip->onfi_version = 10;
  3364. if (!chip->onfi_version) {
  3365. pr_info("unsupported ONFI version: %d\n", val);
  3366. return 0;
  3367. }
  3368. sanitize_string(p->manufacturer, sizeof(p->manufacturer));
  3369. sanitize_string(p->model, sizeof(p->model));
  3370. if (!mtd->name)
  3371. mtd->name = p->model;
  3372. mtd->writesize = le32_to_cpu(p->byte_per_page);
  3373. /*
  3374. * pages_per_block and blocks_per_lun may not be a power-of-2 size
  3375. * (don't ask me who thought of this...). MTD assumes that these
  3376. * dimensions will be power-of-2, so just truncate the remaining area.
  3377. */
  3378. mtd->erasesize = 1 << (fls(le32_to_cpu(p->pages_per_block)) - 1);
  3379. mtd->erasesize *= mtd->writesize;
  3380. mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
  3381. /* See erasesize comment */
  3382. chip->chipsize = 1 << (fls(le32_to_cpu(p->blocks_per_lun)) - 1);
  3383. chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count;
  3384. chip->bits_per_cell = p->bits_per_cell;
  3385. if (onfi_feature(chip) & ONFI_FEATURE_16_BIT_BUS)
  3386. *busw = NAND_BUSWIDTH_16;
  3387. else
  3388. *busw = 0;
  3389. if (p->ecc_bits != 0xff) {
  3390. chip->ecc_strength_ds = p->ecc_bits;
  3391. chip->ecc_step_ds = 512;
  3392. } else if (chip->onfi_version >= 21 &&
  3393. (onfi_feature(chip) & ONFI_FEATURE_EXT_PARAM_PAGE)) {
  3394. /*
  3395. * The nand_flash_detect_ext_param_page() uses the
  3396. * Change Read Column command which maybe not supported
  3397. * by the chip->cmdfunc. So try to update the chip->cmdfunc
  3398. * now. We do not replace user supplied command function.
  3399. */
  3400. if (mtd->writesize > 512 && chip->cmdfunc == nand_command)
  3401. chip->cmdfunc = nand_command_lp;
  3402. /* The Extended Parameter Page is supported since ONFI 2.1. */
  3403. if (nand_flash_detect_ext_param_page(mtd, chip, p))
  3404. pr_warn("Failed to detect ONFI extended param page\n");
  3405. } else {
  3406. pr_warn("Could not retrieve ONFI ECC requirements\n");
  3407. }
  3408. if (p->jedec_id == NAND_MFR_MICRON)
  3409. nand_onfi_detect_micron(chip, p);
  3410. return 1;
  3411. }
  3412. #else
  3413. static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,
  3414. int *busw)
  3415. {
  3416. return 0;
  3417. }
  3418. #endif
  3419. /*
  3420. * Check if the NAND chip is JEDEC compliant, returns 1 if it is, 0 otherwise.
  3421. */
  3422. static int nand_flash_detect_jedec(struct mtd_info *mtd, struct nand_chip *chip,
  3423. int *busw)
  3424. {
  3425. struct nand_jedec_params *p = &chip->jedec_params;
  3426. struct jedec_ecc_info *ecc;
  3427. char id[5];
  3428. int i, val, ret;
  3429. /* Try JEDEC for unknown chip or LP */
  3430. ret = nand_readid_op(chip, 0x40, id, sizeof(id));
  3431. if (ret || strncmp(id, "JEDEC", sizeof(id)))
  3432. return 0;
  3433. ret = nand_read_param_page_op(chip, 0x40, NULL, 0);
  3434. if (ret)
  3435. return 0;
  3436. for (i = 0; i < 3; i++) {
  3437. ret = nand_read_data_op(chip, p, sizeof(*p), true);
  3438. if (ret)
  3439. return 0;
  3440. if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 510) ==
  3441. le16_to_cpu(p->crc))
  3442. break;
  3443. }
  3444. if (i == 3) {
  3445. pr_err("Could not find valid JEDEC parameter page; aborting\n");
  3446. return 0;
  3447. }
  3448. /* Check version */
  3449. val = le16_to_cpu(p->revision);
  3450. if (val & (1 << 2))
  3451. chip->jedec_version = 10;
  3452. else if (val & (1 << 1))
  3453. chip->jedec_version = 1; /* vendor specific version */
  3454. if (!chip->jedec_version) {
  3455. pr_info("unsupported JEDEC version: %d\n", val);
  3456. return 0;
  3457. }
  3458. sanitize_string(p->manufacturer, sizeof(p->manufacturer));
  3459. sanitize_string(p->model, sizeof(p->model));
  3460. if (!mtd->name)
  3461. mtd->name = p->model;
  3462. mtd->writesize = le32_to_cpu(p->byte_per_page);
  3463. /* Please reference to the comment for nand_flash_detect_onfi. */
  3464. mtd->erasesize = 1 << (fls(le32_to_cpu(p->pages_per_block)) - 1);
  3465. mtd->erasesize *= mtd->writesize;
  3466. mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
  3467. /* Please reference to the comment for nand_flash_detect_onfi. */
  3468. chip->chipsize = 1 << (fls(le32_to_cpu(p->blocks_per_lun)) - 1);
  3469. chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count;
  3470. chip->bits_per_cell = p->bits_per_cell;
  3471. if (jedec_feature(chip) & JEDEC_FEATURE_16_BIT_BUS)
  3472. *busw = NAND_BUSWIDTH_16;
  3473. else
  3474. *busw = 0;
  3475. /* ECC info */
  3476. ecc = &p->ecc_info[0];
  3477. if (ecc->codeword_size >= 9) {
  3478. chip->ecc_strength_ds = ecc->ecc_bits;
  3479. chip->ecc_step_ds = 1 << ecc->codeword_size;
  3480. } else {
  3481. pr_warn("Invalid codeword size\n");
  3482. }
  3483. return 1;
  3484. }
  3485. /*
  3486. * nand_id_has_period - Check if an ID string has a given wraparound period
  3487. * @id_data: the ID string
  3488. * @arrlen: the length of the @id_data array
  3489. * @period: the period of repitition
  3490. *
  3491. * Check if an ID string is repeated within a given sequence of bytes at
  3492. * specific repetition interval period (e.g., {0x20,0x01,0x7F,0x20} has a
  3493. * period of 3). This is a helper function for nand_id_len(). Returns non-zero
  3494. * if the repetition has a period of @period; otherwise, returns zero.
  3495. */
  3496. static int nand_id_has_period(u8 *id_data, int arrlen, int period)
  3497. {
  3498. int i, j;
  3499. for (i = 0; i < period; i++)
  3500. for (j = i + period; j < arrlen; j += period)
  3501. if (id_data[i] != id_data[j])
  3502. return 0;
  3503. return 1;
  3504. }
  3505. /*
  3506. * nand_id_len - Get the length of an ID string returned by CMD_READID
  3507. * @id_data: the ID string
  3508. * @arrlen: the length of the @id_data array
  3509. * Returns the length of the ID string, according to known wraparound/trailing
  3510. * zero patterns. If no pattern exists, returns the length of the array.
  3511. */
  3512. static int nand_id_len(u8 *id_data, int arrlen)
  3513. {
  3514. int last_nonzero, period;
  3515. /* Find last non-zero byte */
  3516. for (last_nonzero = arrlen - 1; last_nonzero >= 0; last_nonzero--)
  3517. if (id_data[last_nonzero])
  3518. break;
  3519. /* All zeros */
  3520. if (last_nonzero < 0)
  3521. return 0;
  3522. /* Calculate wraparound period */
  3523. for (period = 1; period < arrlen; period++)
  3524. if (nand_id_has_period(id_data, arrlen, period))
  3525. break;
  3526. /* There's a repeated pattern */
  3527. if (period < arrlen)
  3528. return period;
  3529. /* There are trailing zeros */
  3530. if (last_nonzero < arrlen - 1)
  3531. return last_nonzero + 1;
  3532. /* No pattern detected */
  3533. return arrlen;
  3534. }
  3535. /* Extract the bits of per cell from the 3rd byte of the extended ID */
  3536. static int nand_get_bits_per_cell(u8 cellinfo)
  3537. {
  3538. int bits;
  3539. bits = cellinfo & NAND_CI_CELLTYPE_MSK;
  3540. bits >>= NAND_CI_CELLTYPE_SHIFT;
  3541. return bits + 1;
  3542. }
  3543. /*
  3544. * Many new NAND share similar device ID codes, which represent the size of the
  3545. * chip. The rest of the parameters must be decoded according to generic or
  3546. * manufacturer-specific "extended ID" decoding patterns.
  3547. */
  3548. static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip,
  3549. u8 id_data[8], int *busw)
  3550. {
  3551. int extid, id_len;
  3552. /* The 3rd id byte holds MLC / multichip data */
  3553. chip->bits_per_cell = nand_get_bits_per_cell(id_data[2]);
  3554. /* The 4th id byte is the important one */
  3555. extid = id_data[3];
  3556. id_len = nand_id_len(id_data, 8);
  3557. /*
  3558. * Field definitions are in the following datasheets:
  3559. * Old style (4,5 byte ID): Samsung K9GAG08U0M (p.32)
  3560. * New Samsung (6 byte ID): Samsung K9GAG08U0F (p.44)
  3561. * Hynix MLC (6 byte ID): Hynix H27UBG8T2B (p.22)
  3562. *
  3563. * Check for ID length, non-zero 6th byte, cell type, and Hynix/Samsung
  3564. * ID to decide what to do.
  3565. */
  3566. if (id_len == 6 && id_data[0] == NAND_MFR_SAMSUNG &&
  3567. !nand_is_slc(chip) && id_data[5] != 0x00) {
  3568. /* Calc pagesize */
  3569. mtd->writesize = 2048 << (extid & 0x03);
  3570. extid >>= 2;
  3571. /* Calc oobsize */
  3572. switch (((extid >> 2) & 0x04) | (extid & 0x03)) {
  3573. case 1:
  3574. mtd->oobsize = 128;
  3575. break;
  3576. case 2:
  3577. mtd->oobsize = 218;
  3578. break;
  3579. case 3:
  3580. mtd->oobsize = 400;
  3581. break;
  3582. case 4:
  3583. mtd->oobsize = 436;
  3584. break;
  3585. case 5:
  3586. mtd->oobsize = 512;
  3587. break;
  3588. case 6:
  3589. mtd->oobsize = 640;
  3590. break;
  3591. case 7:
  3592. default: /* Other cases are "reserved" (unknown) */
  3593. mtd->oobsize = 1024;
  3594. break;
  3595. }
  3596. extid >>= 2;
  3597. /* Calc blocksize */
  3598. mtd->erasesize = (128 * 1024) <<
  3599. (((extid >> 1) & 0x04) | (extid & 0x03));
  3600. *busw = 0;
  3601. } else if (id_len == 6 && id_data[0] == NAND_MFR_HYNIX &&
  3602. !nand_is_slc(chip)) {
  3603. unsigned int tmp;
  3604. /* Calc pagesize */
  3605. mtd->writesize = 2048 << (extid & 0x03);
  3606. extid >>= 2;
  3607. /* Calc oobsize */
  3608. switch (((extid >> 2) & 0x04) | (extid & 0x03)) {
  3609. case 0:
  3610. mtd->oobsize = 128;
  3611. break;
  3612. case 1:
  3613. mtd->oobsize = 224;
  3614. break;
  3615. case 2:
  3616. mtd->oobsize = 448;
  3617. break;
  3618. case 3:
  3619. mtd->oobsize = 64;
  3620. break;
  3621. case 4:
  3622. mtd->oobsize = 32;
  3623. break;
  3624. case 5:
  3625. mtd->oobsize = 16;
  3626. break;
  3627. default:
  3628. mtd->oobsize = 640;
  3629. break;
  3630. }
  3631. extid >>= 2;
  3632. /* Calc blocksize */
  3633. tmp = ((extid >> 1) & 0x04) | (extid & 0x03);
  3634. if (tmp < 0x03)
  3635. mtd->erasesize = (128 * 1024) << tmp;
  3636. else if (tmp == 0x03)
  3637. mtd->erasesize = 768 * 1024;
  3638. else
  3639. mtd->erasesize = (64 * 1024) << tmp;
  3640. *busw = 0;
  3641. } else {
  3642. /* Calc pagesize */
  3643. mtd->writesize = 1024 << (extid & 0x03);
  3644. extid >>= 2;
  3645. /* Calc oobsize */
  3646. mtd->oobsize = (8 << (extid & 0x01)) *
  3647. (mtd->writesize >> 9);
  3648. extid >>= 2;
  3649. /* Calc blocksize. Blocksize is multiples of 64KiB */
  3650. mtd->erasesize = (64 * 1024) << (extid & 0x03);
  3651. extid >>= 2;
  3652. /* Get buswidth information */
  3653. *busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0;
  3654. /*
  3655. * Toshiba 24nm raw SLC (i.e., not BENAND) have 32B OOB per
  3656. * 512B page. For Toshiba SLC, we decode the 5th/6th byte as
  3657. * follows:
  3658. * - ID byte 6, bits[2:0]: 100b -> 43nm, 101b -> 32nm,
  3659. * 110b -> 24nm
  3660. * - ID byte 5, bit[7]: 1 -> BENAND, 0 -> raw SLC
  3661. */
  3662. if (id_len >= 6 && id_data[0] == NAND_MFR_TOSHIBA &&
  3663. nand_is_slc(chip) &&
  3664. (id_data[5] & 0x7) == 0x6 /* 24nm */ &&
  3665. !(id_data[4] & 0x80) /* !BENAND */) {
  3666. mtd->oobsize = 32 * mtd->writesize >> 9;
  3667. }
  3668. }
  3669. }
  3670. /*
  3671. * Old devices have chip data hardcoded in the device ID table. nand_decode_id
  3672. * decodes a matching ID table entry and assigns the MTD size parameters for
  3673. * the chip.
  3674. */
  3675. static void nand_decode_id(struct mtd_info *mtd, struct nand_chip *chip,
  3676. struct nand_flash_dev *type, u8 id_data[8],
  3677. int *busw)
  3678. {
  3679. int maf_id = id_data[0];
  3680. mtd->erasesize = type->erasesize;
  3681. mtd->writesize = type->pagesize;
  3682. mtd->oobsize = mtd->writesize / 32;
  3683. *busw = type->options & NAND_BUSWIDTH_16;
  3684. /* All legacy ID NAND are small-page, SLC */
  3685. chip->bits_per_cell = 1;
  3686. /*
  3687. * Check for Spansion/AMD ID + repeating 5th, 6th byte since
  3688. * some Spansion chips have erasesize that conflicts with size
  3689. * listed in nand_ids table.
  3690. * Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39)
  3691. */
  3692. if (maf_id == NAND_MFR_AMD && id_data[4] != 0x00 && id_data[5] == 0x00
  3693. && id_data[6] == 0x00 && id_data[7] == 0x00
  3694. && mtd->writesize == 512) {
  3695. mtd->erasesize = 128 * 1024;
  3696. mtd->erasesize <<= ((id_data[3] & 0x03) << 1);
  3697. }
  3698. }
  3699. /*
  3700. * Set the bad block marker/indicator (BBM/BBI) patterns according to some
  3701. * heuristic patterns using various detected parameters (e.g., manufacturer,
  3702. * page size, cell-type information).
  3703. */
  3704. static void nand_decode_bbm_options(struct mtd_info *mtd,
  3705. struct nand_chip *chip, u8 id_data[8])
  3706. {
  3707. int maf_id = id_data[0];
  3708. /* Set the bad block position */
  3709. if (mtd->writesize > 512 || (chip->options & NAND_BUSWIDTH_16))
  3710. chip->badblockpos = NAND_LARGE_BADBLOCK_POS;
  3711. else
  3712. chip->badblockpos = NAND_SMALL_BADBLOCK_POS;
  3713. /*
  3714. * Bad block marker is stored in the last page of each block on Samsung
  3715. * and Hynix MLC devices; stored in first two pages of each block on
  3716. * Micron devices with 2KiB pages and on SLC Samsung, Hynix, Toshiba,
  3717. * AMD/Spansion, and Macronix. All others scan only the first page.
  3718. */
  3719. if (!nand_is_slc(chip) &&
  3720. (maf_id == NAND_MFR_SAMSUNG ||
  3721. maf_id == NAND_MFR_HYNIX))
  3722. chip->bbt_options |= NAND_BBT_SCANLASTPAGE;
  3723. else if ((nand_is_slc(chip) &&
  3724. (maf_id == NAND_MFR_SAMSUNG ||
  3725. maf_id == NAND_MFR_HYNIX ||
  3726. maf_id == NAND_MFR_TOSHIBA ||
  3727. maf_id == NAND_MFR_AMD ||
  3728. maf_id == NAND_MFR_MACRONIX)) ||
  3729. (mtd->writesize == 2048 &&
  3730. maf_id == NAND_MFR_MICRON))
  3731. chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
  3732. }
  3733. static inline bool is_full_id_nand(struct nand_flash_dev *type)
  3734. {
  3735. return type->id_len;
  3736. }
  3737. static bool find_full_id_nand(struct mtd_info *mtd, struct nand_chip *chip,
  3738. struct nand_flash_dev *type, u8 *id_data, int *busw)
  3739. {
  3740. if (!strncmp((char *)type->id, (char *)id_data, type->id_len)) {
  3741. mtd->writesize = type->pagesize;
  3742. mtd->erasesize = type->erasesize;
  3743. mtd->oobsize = type->oobsize;
  3744. chip->bits_per_cell = nand_get_bits_per_cell(id_data[2]);
  3745. chip->chipsize = (uint64_t)type->chipsize << 20;
  3746. chip->options |= type->options;
  3747. chip->ecc_strength_ds = NAND_ECC_STRENGTH(type);
  3748. chip->ecc_step_ds = NAND_ECC_STEP(type);
  3749. chip->onfi_timing_mode_default =
  3750. type->onfi_timing_mode_default;
  3751. *busw = type->options & NAND_BUSWIDTH_16;
  3752. if (!mtd->name)
  3753. mtd->name = type->name;
  3754. return true;
  3755. }
  3756. return false;
  3757. }
  3758. /*
  3759. * Get the flash and manufacturer id and lookup if the type is supported.
  3760. */
  3761. struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
  3762. struct nand_chip *chip,
  3763. int *maf_id, int *dev_id,
  3764. struct nand_flash_dev *type)
  3765. {
  3766. int busw, ret;
  3767. int maf_idx;
  3768. u8 id_data[8];
  3769. /*
  3770. * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx)
  3771. * after power-up.
  3772. */
  3773. ret = nand_reset(chip, 0);
  3774. if (ret)
  3775. return ERR_PTR(ret);
  3776. /* Select the device */
  3777. chip->select_chip(mtd, 0);
  3778. /* Send the command for reading device ID */
  3779. ret = nand_readid_op(chip, 0, id_data, 2);
  3780. if (ret)
  3781. return ERR_PTR(ret);
  3782. /* Read manufacturer and device IDs */
  3783. *maf_id = id_data[0];
  3784. *dev_id = id_data[1];
  3785. /*
  3786. * Try again to make sure, as some systems the bus-hold or other
  3787. * interface concerns can cause random data which looks like a
  3788. * possibly credible NAND flash to appear. If the two results do
  3789. * not match, ignore the device completely.
  3790. */
  3791. /* Read entire ID string */
  3792. ret = nand_readid_op(chip, 0, id_data, 8);
  3793. if (ret)
  3794. return ERR_PTR(ret);
  3795. if (id_data[0] != *maf_id || id_data[1] != *dev_id) {
  3796. pr_info("second ID read did not match %02x,%02x against %02x,%02x\n",
  3797. *maf_id, *dev_id, id_data[0], id_data[1]);
  3798. return ERR_PTR(-ENODEV);
  3799. }
  3800. if (!type)
  3801. type = nand_flash_ids;
  3802. for (; type->name != NULL; type++) {
  3803. if (is_full_id_nand(type)) {
  3804. if (find_full_id_nand(mtd, chip, type, id_data, &busw))
  3805. goto ident_done;
  3806. } else if (*dev_id == type->dev_id) {
  3807. break;
  3808. }
  3809. }
  3810. chip->onfi_version = 0;
  3811. if (!type->name || !type->pagesize) {
  3812. /* Check if the chip is ONFI compliant */
  3813. if (nand_flash_detect_onfi(mtd, chip, &busw))
  3814. goto ident_done;
  3815. /* Check if the chip is JEDEC compliant */
  3816. if (nand_flash_detect_jedec(mtd, chip, &busw))
  3817. goto ident_done;
  3818. }
  3819. if (!type->name)
  3820. return ERR_PTR(-ENODEV);
  3821. if (!mtd->name)
  3822. mtd->name = type->name;
  3823. chip->chipsize = (uint64_t)type->chipsize << 20;
  3824. if (!type->pagesize) {
  3825. /* Decode parameters from extended ID */
  3826. nand_decode_ext_id(mtd, chip, id_data, &busw);
  3827. } else {
  3828. nand_decode_id(mtd, chip, type, id_data, &busw);
  3829. }
  3830. /* Get chip options */
  3831. chip->options |= type->options;
  3832. /*
  3833. * Check if chip is not a Samsung device. Do not clear the
  3834. * options for chips which do not have an extended id.
  3835. */
  3836. if (*maf_id != NAND_MFR_SAMSUNG && !type->pagesize)
  3837. chip->options &= ~NAND_SAMSUNG_LP_OPTIONS;
  3838. ident_done:
  3839. /* Try to identify manufacturer */
  3840. for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_idx++) {
  3841. if (nand_manuf_ids[maf_idx].id == *maf_id)
  3842. break;
  3843. }
  3844. if (chip->options & NAND_BUSWIDTH_AUTO) {
  3845. WARN_ON(chip->options & NAND_BUSWIDTH_16);
  3846. chip->options |= busw;
  3847. nand_set_defaults(chip, busw);
  3848. } else if (busw != (chip->options & NAND_BUSWIDTH_16)) {
  3849. /*
  3850. * Check, if buswidth is correct. Hardware drivers should set
  3851. * chip correct!
  3852. */
  3853. pr_info("device found, Manufacturer ID: 0x%02x, Chip ID: 0x%02x\n",
  3854. *maf_id, *dev_id);
  3855. pr_info("%s %s\n", nand_manuf_ids[maf_idx].name, mtd->name);
  3856. pr_warn("bus width %d instead %d bit\n",
  3857. (chip->options & NAND_BUSWIDTH_16) ? 16 : 8,
  3858. busw ? 16 : 8);
  3859. return ERR_PTR(-EINVAL);
  3860. }
  3861. nand_decode_bbm_options(mtd, chip, id_data);
  3862. /* Calculate the address shift from the page size */
  3863. chip->page_shift = ffs(mtd->writesize) - 1;
  3864. /* Convert chipsize to number of pages per chip -1 */
  3865. chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
  3866. chip->bbt_erase_shift = chip->phys_erase_shift =
  3867. ffs(mtd->erasesize) - 1;
  3868. if (chip->chipsize & 0xffffffff)
  3869. chip->chip_shift = ffs((unsigned)chip->chipsize) - 1;
  3870. else {
  3871. chip->chip_shift = ffs((unsigned)(chip->chipsize >> 32));
  3872. chip->chip_shift += 32 - 1;
  3873. }
  3874. if (chip->chip_shift - chip->page_shift > 16)
  3875. chip->options |= NAND_ROW_ADDR_3;
  3876. chip->badblockbits = 8;
  3877. chip->erase = single_erase;
  3878. /* Do not replace user supplied command function! */
  3879. if (mtd->writesize > 512 && chip->cmdfunc == nand_command)
  3880. chip->cmdfunc = nand_command_lp;
  3881. pr_info("device found, Manufacturer ID: 0x%02x, Chip ID: 0x%02x\n",
  3882. *maf_id, *dev_id);
  3883. #ifdef CONFIG_SYS_NAND_ONFI_DETECTION
  3884. if (chip->onfi_version)
  3885. pr_info("%s %s\n", nand_manuf_ids[maf_idx].name,
  3886. chip->onfi_params.model);
  3887. else if (chip->jedec_version)
  3888. pr_info("%s %s\n", nand_manuf_ids[maf_idx].name,
  3889. chip->jedec_params.model);
  3890. else
  3891. pr_info("%s %s\n", nand_manuf_ids[maf_idx].name,
  3892. type->name);
  3893. #else
  3894. if (chip->jedec_version)
  3895. pr_info("%s %s\n", nand_manuf_ids[maf_idx].name,
  3896. chip->jedec_params.model);
  3897. else
  3898. pr_info("%s %s\n", nand_manuf_ids[maf_idx].name,
  3899. type->name);
  3900. pr_info("%s %s\n", nand_manuf_ids[maf_idx].name,
  3901. type->name);
  3902. #endif
  3903. pr_info("%d MiB, %s, erase size: %d KiB, page size: %d, OOB size: %d\n",
  3904. (int)(chip->chipsize >> 20), nand_is_slc(chip) ? "SLC" : "MLC",
  3905. mtd->erasesize >> 10, mtd->writesize, mtd->oobsize);
  3906. return type;
  3907. }
  3908. EXPORT_SYMBOL(nand_get_flash_type);
  3909. #if CONFIG_IS_ENABLED(OF_CONTROL)
  3910. DECLARE_GLOBAL_DATA_PTR;
  3911. static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, int node)
  3912. {
  3913. int ret, ecc_mode = -1, ecc_strength, ecc_step;
  3914. const void *blob = gd->fdt_blob;
  3915. const char *str;
  3916. ret = fdtdec_get_int(blob, node, "nand-bus-width", -1);
  3917. if (ret == 16)
  3918. chip->options |= NAND_BUSWIDTH_16;
  3919. if (fdtdec_get_bool(blob, node, "nand-on-flash-bbt"))
  3920. chip->bbt_options |= NAND_BBT_USE_FLASH;
  3921. str = fdt_getprop(blob, node, "nand-ecc-mode", NULL);
  3922. if (str) {
  3923. if (!strcmp(str, "none"))
  3924. ecc_mode = NAND_ECC_NONE;
  3925. else if (!strcmp(str, "soft"))
  3926. ecc_mode = NAND_ECC_SOFT;
  3927. else if (!strcmp(str, "hw"))
  3928. ecc_mode = NAND_ECC_HW;
  3929. else if (!strcmp(str, "hw_syndrome"))
  3930. ecc_mode = NAND_ECC_HW_SYNDROME;
  3931. else if (!strcmp(str, "hw_oob_first"))
  3932. ecc_mode = NAND_ECC_HW_OOB_FIRST;
  3933. else if (!strcmp(str, "soft_bch"))
  3934. ecc_mode = NAND_ECC_SOFT_BCH;
  3935. }
  3936. ecc_strength = fdtdec_get_int(blob, node, "nand-ecc-strength", -1);
  3937. ecc_step = fdtdec_get_int(blob, node, "nand-ecc-step-size", -1);
  3938. if ((ecc_step >= 0 && !(ecc_strength >= 0)) ||
  3939. (!(ecc_step >= 0) && ecc_strength >= 0)) {
  3940. pr_err("must set both strength and step size in DT\n");
  3941. return -EINVAL;
  3942. }
  3943. if (ecc_mode >= 0)
  3944. chip->ecc.mode = ecc_mode;
  3945. if (ecc_strength >= 0)
  3946. chip->ecc.strength = ecc_strength;
  3947. if (ecc_step > 0)
  3948. chip->ecc.size = ecc_step;
  3949. if (fdt_getprop(blob, node, "nand-ecc-maximize", NULL))
  3950. chip->ecc.options |= NAND_ECC_MAXIMIZE;
  3951. return 0;
  3952. }
  3953. #else
  3954. static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, int node)
  3955. {
  3956. return 0;
  3957. }
  3958. #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
  3959. /**
  3960. * nand_scan_ident - [NAND Interface] Scan for the NAND device
  3961. * @mtd: MTD device structure
  3962. * @maxchips: number of chips to scan for
  3963. * @table: alternative NAND ID table
  3964. *
  3965. * This is the first phase of the normal nand_scan() function. It reads the
  3966. * flash ID and sets up MTD fields accordingly.
  3967. *
  3968. */
  3969. int nand_scan_ident(struct mtd_info *mtd, int maxchips,
  3970. struct nand_flash_dev *table)
  3971. {
  3972. int i, nand_maf_id, nand_dev_id;
  3973. struct nand_chip *chip = mtd_to_nand(mtd);
  3974. struct nand_flash_dev *type;
  3975. int ret;
  3976. if (chip->flash_node) {
  3977. ret = nand_dt_init(mtd, chip, chip->flash_node);
  3978. if (ret)
  3979. return ret;
  3980. }
  3981. /* Set the default functions */
  3982. nand_set_defaults(chip, chip->options & NAND_BUSWIDTH_16);
  3983. /* Read the flash type */
  3984. type = nand_get_flash_type(mtd, chip, &nand_maf_id,
  3985. &nand_dev_id, table);
  3986. if (IS_ERR(type)) {
  3987. if (!(chip->options & NAND_SCAN_SILENT_NODEV))
  3988. pr_warn("No NAND device found\n");
  3989. chip->select_chip(mtd, -1);
  3990. return PTR_ERR(type);
  3991. }
  3992. /* Initialize the ->data_interface field. */
  3993. ret = nand_init_data_interface(chip);
  3994. if (ret)
  3995. return ret;
  3996. /*
  3997. * Setup the data interface correctly on the chip and controller side.
  3998. * This explicit call to nand_setup_data_interface() is only required
  3999. * for the first die, because nand_reset() has been called before
  4000. * ->data_interface and ->default_onfi_timing_mode were set.
  4001. * For the other dies, nand_reset() will automatically switch to the
  4002. * best mode for us.
  4003. */
  4004. ret = nand_setup_data_interface(chip, 0);
  4005. if (ret)
  4006. return ret;
  4007. chip->select_chip(mtd, -1);
  4008. /* Check for a chip array */
  4009. for (i = 1; i < maxchips; i++) {
  4010. u8 id[2];
  4011. /* See comment in nand_get_flash_type for reset */
  4012. nand_reset(chip, i);
  4013. chip->select_chip(mtd, i);
  4014. /* Send the command for reading device ID */
  4015. nand_readid_op(chip, 0, id, sizeof(id));
  4016. /* Read manufacturer and device IDs */
  4017. if (nand_maf_id != id[0] || nand_dev_id != id[1]) {
  4018. chip->select_chip(mtd, -1);
  4019. break;
  4020. }
  4021. chip->select_chip(mtd, -1);
  4022. }
  4023. #ifdef DEBUG
  4024. if (i > 1)
  4025. pr_info("%d chips detected\n", i);
  4026. #endif
  4027. /* Store the number of chips and calc total size for mtd */
  4028. chip->numchips = i;
  4029. mtd->size = i * chip->chipsize;
  4030. return 0;
  4031. }
  4032. EXPORT_SYMBOL(nand_scan_ident);
  4033. /**
  4034. * nand_check_ecc_caps - check the sanity of preset ECC settings
  4035. * @chip: nand chip info structure
  4036. * @caps: ECC caps info structure
  4037. * @oobavail: OOB size that the ECC engine can use
  4038. *
  4039. * When ECC step size and strength are already set, check if they are supported
  4040. * by the controller and the calculated ECC bytes fit within the chip's OOB.
  4041. * On success, the calculated ECC bytes is set.
  4042. */
  4043. int nand_check_ecc_caps(struct nand_chip *chip,
  4044. const struct nand_ecc_caps *caps, int oobavail)
  4045. {
  4046. struct mtd_info *mtd = nand_to_mtd(chip);
  4047. const struct nand_ecc_step_info *stepinfo;
  4048. int preset_step = chip->ecc.size;
  4049. int preset_strength = chip->ecc.strength;
  4050. int nsteps, ecc_bytes;
  4051. int i, j;
  4052. if (WARN_ON(oobavail < 0))
  4053. return -EINVAL;
  4054. if (!preset_step || !preset_strength)
  4055. return -ENODATA;
  4056. nsteps = mtd->writesize / preset_step;
  4057. for (i = 0; i < caps->nstepinfos; i++) {
  4058. stepinfo = &caps->stepinfos[i];
  4059. if (stepinfo->stepsize != preset_step)
  4060. continue;
  4061. for (j = 0; j < stepinfo->nstrengths; j++) {
  4062. if (stepinfo->strengths[j] != preset_strength)
  4063. continue;
  4064. ecc_bytes = caps->calc_ecc_bytes(preset_step,
  4065. preset_strength);
  4066. if (WARN_ON_ONCE(ecc_bytes < 0))
  4067. return ecc_bytes;
  4068. if (ecc_bytes * nsteps > oobavail) {
  4069. pr_err("ECC (step, strength) = (%d, %d) does not fit in OOB",
  4070. preset_step, preset_strength);
  4071. return -ENOSPC;
  4072. }
  4073. chip->ecc.bytes = ecc_bytes;
  4074. return 0;
  4075. }
  4076. }
  4077. pr_err("ECC (step, strength) = (%d, %d) not supported on this controller",
  4078. preset_step, preset_strength);
  4079. return -ENOTSUPP;
  4080. }
  4081. EXPORT_SYMBOL_GPL(nand_check_ecc_caps);
  4082. /**
  4083. * nand_match_ecc_req - meet the chip's requirement with least ECC bytes
  4084. * @chip: nand chip info structure
  4085. * @caps: ECC engine caps info structure
  4086. * @oobavail: OOB size that the ECC engine can use
  4087. *
  4088. * If a chip's ECC requirement is provided, try to meet it with the least
  4089. * number of ECC bytes (i.e. with the largest number of OOB-free bytes).
  4090. * On success, the chosen ECC settings are set.
  4091. */
  4092. int nand_match_ecc_req(struct nand_chip *chip,
  4093. const struct nand_ecc_caps *caps, int oobavail)
  4094. {
  4095. struct mtd_info *mtd = nand_to_mtd(chip);
  4096. const struct nand_ecc_step_info *stepinfo;
  4097. int req_step = chip->ecc_step_ds;
  4098. int req_strength = chip->ecc_strength_ds;
  4099. int req_corr, step_size, strength, nsteps, ecc_bytes, ecc_bytes_total;
  4100. int best_step, best_strength, best_ecc_bytes;
  4101. int best_ecc_bytes_total = INT_MAX;
  4102. int i, j;
  4103. if (WARN_ON(oobavail < 0))
  4104. return -EINVAL;
  4105. /* No information provided by the NAND chip */
  4106. if (!req_step || !req_strength)
  4107. return -ENOTSUPP;
  4108. /* number of correctable bits the chip requires in a page */
  4109. req_corr = mtd->writesize / req_step * req_strength;
  4110. for (i = 0; i < caps->nstepinfos; i++) {
  4111. stepinfo = &caps->stepinfos[i];
  4112. step_size = stepinfo->stepsize;
  4113. for (j = 0; j < stepinfo->nstrengths; j++) {
  4114. strength = stepinfo->strengths[j];
  4115. /*
  4116. * If both step size and strength are smaller than the
  4117. * chip's requirement, it is not easy to compare the
  4118. * resulted reliability.
  4119. */
  4120. if (step_size < req_step && strength < req_strength)
  4121. continue;
  4122. if (mtd->writesize % step_size)
  4123. continue;
  4124. nsteps = mtd->writesize / step_size;
  4125. ecc_bytes = caps->calc_ecc_bytes(step_size, strength);
  4126. if (WARN_ON_ONCE(ecc_bytes < 0))
  4127. continue;
  4128. ecc_bytes_total = ecc_bytes * nsteps;
  4129. if (ecc_bytes_total > oobavail ||
  4130. strength * nsteps < req_corr)
  4131. continue;
  4132. /*
  4133. * We assume the best is to meet the chip's requrement
  4134. * with the least number of ECC bytes.
  4135. */
  4136. if (ecc_bytes_total < best_ecc_bytes_total) {
  4137. best_ecc_bytes_total = ecc_bytes_total;
  4138. best_step = step_size;
  4139. best_strength = strength;
  4140. best_ecc_bytes = ecc_bytes;
  4141. }
  4142. }
  4143. }
  4144. if (best_ecc_bytes_total == INT_MAX)
  4145. return -ENOTSUPP;
  4146. chip->ecc.size = best_step;
  4147. chip->ecc.strength = best_strength;
  4148. chip->ecc.bytes = best_ecc_bytes;
  4149. return 0;
  4150. }
  4151. EXPORT_SYMBOL_GPL(nand_match_ecc_req);
  4152. /**
  4153. * nand_maximize_ecc - choose the max ECC strength available
  4154. * @chip: nand chip info structure
  4155. * @caps: ECC engine caps info structure
  4156. * @oobavail: OOB size that the ECC engine can use
  4157. *
  4158. * Choose the max ECC strength that is supported on the controller, and can fit
  4159. * within the chip's OOB. On success, the chosen ECC settings are set.
  4160. */
  4161. int nand_maximize_ecc(struct nand_chip *chip,
  4162. const struct nand_ecc_caps *caps, int oobavail)
  4163. {
  4164. struct mtd_info *mtd = nand_to_mtd(chip);
  4165. const struct nand_ecc_step_info *stepinfo;
  4166. int step_size, strength, nsteps, ecc_bytes, corr;
  4167. int best_corr = 0;
  4168. int best_step = 0;
  4169. int best_strength, best_ecc_bytes;
  4170. int i, j;
  4171. if (WARN_ON(oobavail < 0))
  4172. return -EINVAL;
  4173. for (i = 0; i < caps->nstepinfos; i++) {
  4174. stepinfo = &caps->stepinfos[i];
  4175. step_size = stepinfo->stepsize;
  4176. /* If chip->ecc.size is already set, respect it */
  4177. if (chip->ecc.size && step_size != chip->ecc.size)
  4178. continue;
  4179. for (j = 0; j < stepinfo->nstrengths; j++) {
  4180. strength = stepinfo->strengths[j];
  4181. if (mtd->writesize % step_size)
  4182. continue;
  4183. nsteps = mtd->writesize / step_size;
  4184. ecc_bytes = caps->calc_ecc_bytes(step_size, strength);
  4185. if (WARN_ON_ONCE(ecc_bytes < 0))
  4186. continue;
  4187. if (ecc_bytes * nsteps > oobavail)
  4188. continue;
  4189. corr = strength * nsteps;
  4190. /*
  4191. * If the number of correctable bits is the same,
  4192. * bigger step_size has more reliability.
  4193. */
  4194. if (corr > best_corr ||
  4195. (corr == best_corr && step_size > best_step)) {
  4196. best_corr = corr;
  4197. best_step = step_size;
  4198. best_strength = strength;
  4199. best_ecc_bytes = ecc_bytes;
  4200. }
  4201. }
  4202. }
  4203. if (!best_corr)
  4204. return -ENOTSUPP;
  4205. chip->ecc.size = best_step;
  4206. chip->ecc.strength = best_strength;
  4207. chip->ecc.bytes = best_ecc_bytes;
  4208. return 0;
  4209. }
  4210. EXPORT_SYMBOL_GPL(nand_maximize_ecc);
  4211. /*
  4212. * Check if the chip configuration meet the datasheet requirements.
  4213. * If our configuration corrects A bits per B bytes and the minimum
  4214. * required correction level is X bits per Y bytes, then we must ensure
  4215. * both of the following are true:
  4216. *
  4217. * (1) A / B >= X / Y
  4218. * (2) A >= X
  4219. *
  4220. * Requirement (1) ensures we can correct for the required bitflip density.
  4221. * Requirement (2) ensures we can correct even when all bitflips are clumped
  4222. * in the same sector.
  4223. */
  4224. static bool nand_ecc_strength_good(struct mtd_info *mtd)
  4225. {
  4226. struct nand_chip *chip = mtd_to_nand(mtd);
  4227. struct nand_ecc_ctrl *ecc = &chip->ecc;
  4228. int corr, ds_corr;
  4229. if (ecc->size == 0 || chip->ecc_step_ds == 0)
  4230. /* Not enough information */
  4231. return true;
  4232. /*
  4233. * We get the number of corrected bits per page to compare
  4234. * the correction density.
  4235. */
  4236. corr = (mtd->writesize * ecc->strength) / ecc->size;
  4237. ds_corr = (mtd->writesize * chip->ecc_strength_ds) / chip->ecc_step_ds;
  4238. return corr >= ds_corr && ecc->strength >= chip->ecc_strength_ds;
  4239. }
  4240. static bool invalid_ecc_page_accessors(struct nand_chip *chip)
  4241. {
  4242. struct nand_ecc_ctrl *ecc = &chip->ecc;
  4243. if (nand_standard_page_accessors(ecc))
  4244. return false;
  4245. /*
  4246. * NAND_ECC_CUSTOM_PAGE_ACCESS flag is set, make sure the NAND
  4247. * controller driver implements all the page accessors because
  4248. * default helpers are not suitable when the core does not
  4249. * send the READ0/PAGEPROG commands.
  4250. */
  4251. return (!ecc->read_page || !ecc->write_page ||
  4252. !ecc->read_page_raw || !ecc->write_page_raw ||
  4253. (NAND_HAS_SUBPAGE_READ(chip) && !ecc->read_subpage) ||
  4254. (NAND_HAS_SUBPAGE_WRITE(chip) && !ecc->write_subpage &&
  4255. ecc->hwctl && ecc->calculate));
  4256. }
  4257. /**
  4258. * nand_scan_tail - [NAND Interface] Scan for the NAND device
  4259. * @mtd: MTD device structure
  4260. *
  4261. * This is the second phase of the normal nand_scan() function. It fills out
  4262. * all the uninitialized function pointers with the defaults and scans for a
  4263. * bad block table if appropriate.
  4264. */
  4265. int nand_scan_tail(struct mtd_info *mtd)
  4266. {
  4267. int i;
  4268. struct nand_chip *chip = mtd_to_nand(mtd);
  4269. struct nand_ecc_ctrl *ecc = &chip->ecc;
  4270. struct nand_buffers *nbuf;
  4271. /* New bad blocks should be marked in OOB, flash-based BBT, or both */
  4272. BUG_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) &&
  4273. !(chip->bbt_options & NAND_BBT_USE_FLASH));
  4274. if (invalid_ecc_page_accessors(chip)) {
  4275. pr_err("Invalid ECC page accessors setup\n");
  4276. return -EINVAL;
  4277. }
  4278. if (!(chip->options & NAND_OWN_BUFFERS)) {
  4279. nbuf = kzalloc(sizeof(struct nand_buffers), GFP_KERNEL);
  4280. chip->buffers = nbuf;
  4281. } else {
  4282. if (!chip->buffers)
  4283. return -ENOMEM;
  4284. }
  4285. /* Set the internal oob buffer location, just after the page data */
  4286. chip->oob_poi = chip->buffers->databuf + mtd->writesize;
  4287. /*
  4288. * If no default placement scheme is given, select an appropriate one.
  4289. */
  4290. if (!ecc->layout && (ecc->mode != NAND_ECC_SOFT_BCH)) {
  4291. switch (mtd->oobsize) {
  4292. #ifndef CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
  4293. case 8:
  4294. ecc->layout = &nand_oob_8;
  4295. break;
  4296. case 16:
  4297. ecc->layout = &nand_oob_16;
  4298. break;
  4299. case 64:
  4300. ecc->layout = &nand_oob_64;
  4301. break;
  4302. case 128:
  4303. ecc->layout = &nand_oob_128;
  4304. break;
  4305. #endif
  4306. default:
  4307. pr_warn("No oob scheme defined for oobsize %d\n",
  4308. mtd->oobsize);
  4309. BUG();
  4310. }
  4311. }
  4312. if (!chip->write_page)
  4313. chip->write_page = nand_write_page;
  4314. /*
  4315. * Check ECC mode, default to software if 3byte/512byte hardware ECC is
  4316. * selected and we have 256 byte pagesize fallback to software ECC
  4317. */
  4318. switch (ecc->mode) {
  4319. case NAND_ECC_HW_OOB_FIRST:
  4320. /* Similar to NAND_ECC_HW, but a separate read_page handle */
  4321. if (!ecc->calculate || !ecc->correct || !ecc->hwctl) {
  4322. pr_warn("No ECC functions supplied; hardware ECC not possible\n");
  4323. BUG();
  4324. }
  4325. if (!ecc->read_page)
  4326. ecc->read_page = nand_read_page_hwecc_oob_first;
  4327. case NAND_ECC_HW:
  4328. /* Use standard hwecc read page function? */
  4329. if (!ecc->read_page)
  4330. ecc->read_page = nand_read_page_hwecc;
  4331. if (!ecc->write_page)
  4332. ecc->write_page = nand_write_page_hwecc;
  4333. if (!ecc->read_page_raw)
  4334. ecc->read_page_raw = nand_read_page_raw;
  4335. if (!ecc->write_page_raw)
  4336. ecc->write_page_raw = nand_write_page_raw;
  4337. if (!ecc->read_oob)
  4338. ecc->read_oob = nand_read_oob_std;
  4339. if (!ecc->write_oob)
  4340. ecc->write_oob = nand_write_oob_std;
  4341. if (!ecc->read_subpage)
  4342. ecc->read_subpage = nand_read_subpage;
  4343. if (!ecc->write_subpage && ecc->hwctl && ecc->calculate)
  4344. ecc->write_subpage = nand_write_subpage_hwecc;
  4345. case NAND_ECC_HW_SYNDROME:
  4346. if ((!ecc->calculate || !ecc->correct || !ecc->hwctl) &&
  4347. (!ecc->read_page ||
  4348. ecc->read_page == nand_read_page_hwecc ||
  4349. !ecc->write_page ||
  4350. ecc->write_page == nand_write_page_hwecc)) {
  4351. pr_warn("No ECC functions supplied; hardware ECC not possible\n");
  4352. BUG();
  4353. }
  4354. /* Use standard syndrome read/write page function? */
  4355. if (!ecc->read_page)
  4356. ecc->read_page = nand_read_page_syndrome;
  4357. if (!ecc->write_page)
  4358. ecc->write_page = nand_write_page_syndrome;
  4359. if (!ecc->read_page_raw)
  4360. ecc->read_page_raw = nand_read_page_raw_syndrome;
  4361. if (!ecc->write_page_raw)
  4362. ecc->write_page_raw = nand_write_page_raw_syndrome;
  4363. if (!ecc->read_oob)
  4364. ecc->read_oob = nand_read_oob_syndrome;
  4365. if (!ecc->write_oob)
  4366. ecc->write_oob = nand_write_oob_syndrome;
  4367. if (mtd->writesize >= ecc->size) {
  4368. if (!ecc->strength) {
  4369. pr_warn("Driver must set ecc.strength when using hardware ECC\n");
  4370. BUG();
  4371. }
  4372. break;
  4373. }
  4374. pr_warn("%d byte HW ECC not possible on %d byte page size, fallback to SW ECC\n",
  4375. ecc->size, mtd->writesize);
  4376. ecc->mode = NAND_ECC_SOFT;
  4377. case NAND_ECC_SOFT:
  4378. ecc->calculate = nand_calculate_ecc;
  4379. ecc->correct = nand_correct_data;
  4380. ecc->read_page = nand_read_page_swecc;
  4381. ecc->read_subpage = nand_read_subpage;
  4382. ecc->write_page = nand_write_page_swecc;
  4383. ecc->read_page_raw = nand_read_page_raw;
  4384. ecc->write_page_raw = nand_write_page_raw;
  4385. ecc->read_oob = nand_read_oob_std;
  4386. ecc->write_oob = nand_write_oob_std;
  4387. if (!ecc->size)
  4388. ecc->size = 256;
  4389. ecc->bytes = 3;
  4390. ecc->strength = 1;
  4391. break;
  4392. case NAND_ECC_SOFT_BCH:
  4393. if (!mtd_nand_has_bch()) {
  4394. pr_warn("CONFIG_MTD_NAND_ECC_BCH not enabled\n");
  4395. BUG();
  4396. }
  4397. ecc->calculate = nand_bch_calculate_ecc;
  4398. ecc->correct = nand_bch_correct_data;
  4399. ecc->read_page = nand_read_page_swecc;
  4400. ecc->read_subpage = nand_read_subpage;
  4401. ecc->write_page = nand_write_page_swecc;
  4402. ecc->read_page_raw = nand_read_page_raw;
  4403. ecc->write_page_raw = nand_write_page_raw;
  4404. ecc->read_oob = nand_read_oob_std;
  4405. ecc->write_oob = nand_write_oob_std;
  4406. /*
  4407. * Board driver should supply ecc.size and ecc.strength values
  4408. * to select how many bits are correctable. Otherwise, default
  4409. * to 4 bits for large page devices.
  4410. */
  4411. if (!ecc->size && (mtd->oobsize >= 64)) {
  4412. ecc->size = 512;
  4413. ecc->strength = 4;
  4414. }
  4415. /* See nand_bch_init() for details. */
  4416. ecc->bytes = 0;
  4417. ecc->priv = nand_bch_init(mtd);
  4418. if (!ecc->priv) {
  4419. pr_warn("BCH ECC initialization failed!\n");
  4420. BUG();
  4421. }
  4422. break;
  4423. case NAND_ECC_NONE:
  4424. pr_warn("NAND_ECC_NONE selected by board driver. This is not recommended!\n");
  4425. ecc->read_page = nand_read_page_raw;
  4426. ecc->write_page = nand_write_page_raw;
  4427. ecc->read_oob = nand_read_oob_std;
  4428. ecc->read_page_raw = nand_read_page_raw;
  4429. ecc->write_page_raw = nand_write_page_raw;
  4430. ecc->write_oob = nand_write_oob_std;
  4431. ecc->size = mtd->writesize;
  4432. ecc->bytes = 0;
  4433. ecc->strength = 0;
  4434. break;
  4435. default:
  4436. pr_warn("Invalid NAND_ECC_MODE %d\n", ecc->mode);
  4437. BUG();
  4438. }
  4439. /* For many systems, the standard OOB write also works for raw */
  4440. if (!ecc->read_oob_raw)
  4441. ecc->read_oob_raw = ecc->read_oob;
  4442. if (!ecc->write_oob_raw)
  4443. ecc->write_oob_raw = ecc->write_oob;
  4444. /*
  4445. * The number of bytes available for a client to place data into
  4446. * the out of band area.
  4447. */
  4448. mtd->oobavail = 0;
  4449. if (ecc->layout) {
  4450. for (i = 0; ecc->layout->oobfree[i].length; i++)
  4451. mtd->oobavail += ecc->layout->oobfree[i].length;
  4452. }
  4453. /* ECC sanity check: warn if it's too weak */
  4454. if (!nand_ecc_strength_good(mtd))
  4455. pr_warn("WARNING: %s: the ECC used on your system is too weak compared to the one required by the NAND chip\n",
  4456. mtd->name);
  4457. /*
  4458. * Set the number of read / write steps for one page depending on ECC
  4459. * mode.
  4460. */
  4461. ecc->steps = mtd->writesize / ecc->size;
  4462. if (ecc->steps * ecc->size != mtd->writesize) {
  4463. pr_warn("Invalid ECC parameters\n");
  4464. BUG();
  4465. }
  4466. ecc->total = ecc->steps * ecc->bytes;
  4467. /* Allow subpage writes up to ecc.steps. Not possible for MLC flash */
  4468. if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && nand_is_slc(chip)) {
  4469. switch (ecc->steps) {
  4470. case 2:
  4471. mtd->subpage_sft = 1;
  4472. break;
  4473. case 4:
  4474. case 8:
  4475. case 16:
  4476. mtd->subpage_sft = 2;
  4477. break;
  4478. }
  4479. }
  4480. chip->subpagesize = mtd->writesize >> mtd->subpage_sft;
  4481. /* Initialize state */
  4482. chip->state = FL_READY;
  4483. /* Invalidate the pagebuffer reference */
  4484. chip->pagebuf = -1;
  4485. /* Large page NAND with SOFT_ECC should support subpage reads */
  4486. switch (ecc->mode) {
  4487. case NAND_ECC_SOFT:
  4488. case NAND_ECC_SOFT_BCH:
  4489. if (chip->page_shift > 9)
  4490. chip->options |= NAND_SUBPAGE_READ;
  4491. break;
  4492. default:
  4493. break;
  4494. }
  4495. /* Fill in remaining MTD driver data */
  4496. mtd->type = nand_is_slc(chip) ? MTD_NANDFLASH : MTD_MLCNANDFLASH;
  4497. mtd->flags = (chip->options & NAND_ROM) ? MTD_CAP_ROM :
  4498. MTD_CAP_NANDFLASH;
  4499. mtd->_erase = nand_erase;
  4500. mtd->_panic_write = panic_nand_write;
  4501. mtd->_read_oob = nand_read_oob;
  4502. mtd->_write_oob = nand_write_oob;
  4503. mtd->_sync = nand_sync;
  4504. mtd->_lock = NULL;
  4505. mtd->_unlock = NULL;
  4506. mtd->_block_isreserved = nand_block_isreserved;
  4507. mtd->_block_isbad = nand_block_isbad;
  4508. mtd->_block_markbad = nand_block_markbad;
  4509. mtd->writebufsize = mtd->writesize;
  4510. /* propagate ecc info to mtd_info */
  4511. mtd->ecclayout = ecc->layout;
  4512. mtd->ecc_strength = ecc->strength;
  4513. mtd->ecc_step_size = ecc->size;
  4514. /*
  4515. * Initialize bitflip_threshold to its default prior scan_bbt() call.
  4516. * scan_bbt() might invoke mtd_read(), thus bitflip_threshold must be
  4517. * properly set.
  4518. */
  4519. if (!mtd->bitflip_threshold)
  4520. mtd->bitflip_threshold = DIV_ROUND_UP(mtd->ecc_strength * 3, 4);
  4521. return 0;
  4522. }
  4523. EXPORT_SYMBOL(nand_scan_tail);
  4524. /**
  4525. * nand_scan - [NAND Interface] Scan for the NAND device
  4526. * @mtd: MTD device structure
  4527. * @maxchips: number of chips to scan for
  4528. *
  4529. * This fills out all the uninitialized function pointers with the defaults.
  4530. * The flash ID is read and the mtd/chip structures are filled with the
  4531. * appropriate values.
  4532. */
  4533. int nand_scan(struct mtd_info *mtd, int maxchips)
  4534. {
  4535. int ret;
  4536. ret = nand_scan_ident(mtd, maxchips, NULL);
  4537. if (!ret)
  4538. ret = nand_scan_tail(mtd);
  4539. return ret;
  4540. }
  4541. EXPORT_SYMBOL(nand_scan);
  4542. MODULE_LICENSE("GPL");
  4543. MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>");
  4544. MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>");
  4545. MODULE_DESCRIPTION("Generic NAND flash driver code");