bcm6838_nand.c 3.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. #include <common.h>
  3. #include <asm/io.h>
  4. #include <memalign.h>
  5. #include <nand.h>
  6. #include <linux/err.h>
  7. #include <linux/errno.h>
  8. #include <linux/io.h>
  9. #include <linux/ioport.h>
  10. #include <dm.h>
  11. #include "brcmnand.h"
  12. struct bcm6838_nand_soc {
  13. struct brcmnand_soc soc;
  14. void __iomem *base;
  15. };
  16. #define BCM6838_NAND_INT 0x00
  17. #define BCM6838_NAND_STATUS_SHIFT 0
  18. #define BCM6838_NAND_STATUS_MASK (0xfff << BCM6838_NAND_STATUS_SHIFT)
  19. #define BCM6838_NAND_ENABLE_SHIFT 16
  20. #define BCM6838_NAND_ENABLE_MASK (0xffff << BCM6838_NAND_ENABLE_SHIFT)
  21. enum {
  22. BCM6838_NP_READ = BIT(0),
  23. BCM6838_BLOCK_ERASE = BIT(1),
  24. BCM6838_COPY_BACK = BIT(2),
  25. BCM6838_PAGE_PGM = BIT(3),
  26. BCM6838_CTRL_READY = BIT(4),
  27. BCM6838_DEV_RBPIN = BIT(5),
  28. BCM6838_ECC_ERR_UNC = BIT(6),
  29. BCM6838_ECC_ERR_CORR = BIT(7),
  30. };
  31. static bool bcm6838_nand_intc_ack(struct brcmnand_soc *soc)
  32. {
  33. struct bcm6838_nand_soc *priv =
  34. container_of(soc, struct bcm6838_nand_soc, soc);
  35. void __iomem *mmio = priv->base + BCM6838_NAND_INT;
  36. u32 val = brcmnand_readl(mmio);
  37. if (val & (BCM6838_CTRL_READY << BCM6838_NAND_STATUS_SHIFT)) {
  38. /* Ack interrupt */
  39. val &= ~BCM6838_NAND_STATUS_MASK;
  40. val |= BCM6838_CTRL_READY << BCM6838_NAND_STATUS_SHIFT;
  41. brcmnand_writel(val, mmio);
  42. return true;
  43. }
  44. return false;
  45. }
  46. static void bcm6838_nand_intc_set(struct brcmnand_soc *soc, bool en)
  47. {
  48. struct bcm6838_nand_soc *priv =
  49. container_of(soc, struct bcm6838_nand_soc, soc);
  50. void __iomem *mmio = priv->base + BCM6838_NAND_INT;
  51. u32 val = brcmnand_readl(mmio);
  52. /* Don't ack any interrupts */
  53. val &= ~BCM6838_NAND_STATUS_MASK;
  54. if (en)
  55. val |= BCM6838_CTRL_READY << BCM6838_NAND_ENABLE_SHIFT;
  56. else
  57. val &= ~(BCM6838_CTRL_READY << BCM6838_NAND_ENABLE_SHIFT);
  58. brcmnand_writel(val, mmio);
  59. }
  60. static int bcm6838_nand_probe(struct udevice *dev)
  61. {
  62. struct udevice *pdev = dev;
  63. struct bcm6838_nand_soc *priv = dev_get_priv(dev);
  64. struct brcmnand_soc *soc;
  65. struct resource res;
  66. soc = &priv->soc;
  67. dev_read_resource_byname(pdev, "nand-int-base", &res);
  68. priv->base = ioremap(res.start, resource_size(&res));
  69. if (IS_ERR(priv->base))
  70. return PTR_ERR(priv->base);
  71. soc->ctlrdy_ack = bcm6838_nand_intc_ack;
  72. soc->ctlrdy_set_enabled = bcm6838_nand_intc_set;
  73. /* Disable and ack all interrupts */
  74. brcmnand_writel(0, priv->base + BCM6838_NAND_INT);
  75. brcmnand_writel(BCM6838_NAND_STATUS_MASK,
  76. priv->base + BCM6838_NAND_INT);
  77. return brcmnand_probe(pdev, soc);
  78. }
  79. static const struct udevice_id bcm6838_nand_dt_ids[] = {
  80. {
  81. .compatible = "brcm,nand-bcm6838",
  82. },
  83. { /* sentinel */ }
  84. };
  85. U_BOOT_DRIVER(bcm6838_nand) = {
  86. .name = "bcm6838-nand",
  87. .id = UCLASS_MTD,
  88. .of_match = bcm6838_nand_dt_ids,
  89. .probe = bcm6838_nand_probe,
  90. .priv_auto_alloc_size = sizeof(struct bcm6838_nand_soc),
  91. };
  92. void board_nand_init(void)
  93. {
  94. struct udevice *dev;
  95. int ret;
  96. ret = uclass_get_device_by_driver(UCLASS_MTD,
  97. DM_GET_DRIVER(bcm6838_nand), &dev);
  98. if (ret && ret != -ENODEV)
  99. pr_err("Failed to initialize %s. (error %d)\n", dev->name,
  100. ret);
  101. }