rk3288.c 3.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2016 Rockchip Electronics Co., Ltd
  4. */
  5. #include <common.h>
  6. #include <dm.h>
  7. #include <env.h>
  8. #include <clk.h>
  9. #include <init.h>
  10. #include <asm/armv7.h>
  11. #include <asm/io.h>
  12. #include <asm/arch-rockchip/bootrom.h>
  13. #include <asm/arch-rockchip/clock.h>
  14. #include <asm/arch-rockchip/cru.h>
  15. #include <asm/arch-rockchip/hardware.h>
  16. #include <asm/arch-rockchip/grf_rk3288.h>
  17. #include <asm/arch-rockchip/pmu_rk3288.h>
  18. #include <asm/arch-rockchip/qos_rk3288.h>
  19. #include <asm/arch-rockchip/sdram.h>
  20. #include <linux/err.h>
  21. DECLARE_GLOBAL_DATA_PTR;
  22. #define GRF_BASE 0xff770000
  23. const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
  24. [BROM_BOOTSOURCE_EMMC] = "/dwmmc@ff0f0000",
  25. [BROM_BOOTSOURCE_SD] = "/dwmmc@ff0c0000",
  26. };
  27. #ifdef CONFIG_SPL_BUILD
  28. static void configure_l2ctlr(void)
  29. {
  30. u32 l2ctlr;
  31. l2ctlr = read_l2ctlr();
  32. l2ctlr &= 0xfffc0000; /* clear bit0~bit17 */
  33. /*
  34. * Data RAM write latency: 2 cycles
  35. * Data RAM read latency: 2 cycles
  36. * Data RAM setup latency: 1 cycle
  37. * Tag RAM write latency: 1 cycle
  38. * Tag RAM read latency: 1 cycle
  39. * Tag RAM setup latency: 1 cycle
  40. */
  41. l2ctlr |= (1 << 3 | 1 << 0);
  42. write_l2ctlr(l2ctlr);
  43. }
  44. #endif
  45. int rk3288_qos_init(void)
  46. {
  47. int val = 2 << PRIORITY_HIGH_SHIFT | 2 << PRIORITY_LOW_SHIFT;
  48. /* set vop qos to higher priority */
  49. writel(val, CPU_AXI_QOS_PRIORITY + VIO0_VOP_QOS);
  50. writel(val, CPU_AXI_QOS_PRIORITY + VIO1_VOP_QOS);
  51. if (!fdt_node_check_compatible(gd->fdt_blob, 0,
  52. "rockchip,rk3288-tinker")) {
  53. /* set isp qos to higher priority */
  54. writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_R_QOS);
  55. writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_W0_QOS);
  56. writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_W1_QOS);
  57. }
  58. return 0;
  59. }
  60. int arch_cpu_init(void)
  61. {
  62. #ifdef CONFIG_SPL_BUILD
  63. configure_l2ctlr();
  64. #else
  65. /* We do some SoC one time setting here. */
  66. struct rk3288_grf * const grf = (void *)GRF_BASE;
  67. /* Use rkpwm by default */
  68. rk_setreg(&grf->soc_con2, 1 << 0);
  69. /*
  70. * Disable JTAG on sdmmc0 IO. The SDMMC won't work until this bit is
  71. * cleared
  72. */
  73. rk_clrreg(&grf->soc_con0, 1 << 12);
  74. rk3288_qos_init();
  75. #endif
  76. return 0;
  77. }
  78. #ifdef CONFIG_DEBUG_UART_BOARD_INIT
  79. void board_debug_uart_init(void)
  80. {
  81. /* Enable early UART on the RK3288 */
  82. struct rk3288_grf * const grf = (void *)GRF_BASE;
  83. rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT |
  84. GPIO7C6_MASK << GPIO7C6_SHIFT,
  85. GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
  86. GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
  87. }
  88. #endif
  89. __weak int rk3288_board_late_init(void)
  90. {
  91. return 0;
  92. }
  93. int rk_board_late_init(void)
  94. {
  95. return rk3288_board_late_init();
  96. }
  97. static int do_clock(cmd_tbl_t *cmdtp, int flag, int argc,
  98. char * const argv[])
  99. {
  100. static const struct {
  101. char *name;
  102. int id;
  103. } clks[] = {
  104. { "osc", CLK_OSC },
  105. { "apll", CLK_ARM },
  106. { "dpll", CLK_DDR },
  107. { "cpll", CLK_CODEC },
  108. { "gpll", CLK_GENERAL },
  109. #ifdef CONFIG_ROCKCHIP_RK3036
  110. { "mpll", CLK_NEW },
  111. #else
  112. { "npll", CLK_NEW },
  113. #endif
  114. };
  115. int ret, i;
  116. struct udevice *dev;
  117. ret = rockchip_get_clk(&dev);
  118. if (ret) {
  119. printf("clk-uclass not found\n");
  120. return 0;
  121. }
  122. for (i = 0; i < ARRAY_SIZE(clks); i++) {
  123. struct clk clk;
  124. ulong rate;
  125. clk.id = clks[i].id;
  126. ret = clk_request(dev, &clk);
  127. if (ret < 0)
  128. continue;
  129. rate = clk_get_rate(&clk);
  130. printf("%s: %lu\n", clks[i].name, rate);
  131. clk_free(&clk);
  132. }
  133. return 0;
  134. }
  135. U_BOOT_CMD(
  136. clock, 2, 1, do_clock,
  137. "display information about clocks",
  138. ""
  139. );