rk3188.c 2.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2019 Rockchip Electronics Co., Ltd
  4. */
  5. #include <common.h>
  6. #include <dm.h>
  7. #include <hang.h>
  8. #include <syscon.h>
  9. #include <asm/io.h>
  10. #include <asm/arch-rockchip/bootrom.h>
  11. #include <asm/arch-rockchip/clock.h>
  12. #include <asm/arch-rockchip/grf_rk3188.h>
  13. #include <asm/arch-rockchip/hardware.h>
  14. #include <linux/err.h>
  15. #define GRF_BASE 0x20008000
  16. const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
  17. [BROM_BOOTSOURCE_EMMC] = "/dwmmc@1021c000",
  18. [BROM_BOOTSOURCE_SD] = "/dwmmc@10214000",
  19. };
  20. #ifdef CONFIG_DEBUG_UART_BOARD_INIT
  21. void board_debug_uart_init(void)
  22. {
  23. /* Enable early UART on the RK3188 */
  24. struct rk3188_grf * const grf = (void *)GRF_BASE;
  25. enum {
  26. GPIO1B1_SHIFT = 2,
  27. GPIO1B1_MASK = 3,
  28. GPIO1B1_GPIO = 0,
  29. GPIO1B1_UART2_SOUT,
  30. GPIO1B1_JTAG_TDO,
  31. GPIO1B0_SHIFT = 0,
  32. GPIO1B0_MASK = 3,
  33. GPIO1B0_GPIO = 0,
  34. GPIO1B0_UART2_SIN,
  35. GPIO1B0_JTAG_TDI,
  36. };
  37. rk_clrsetreg(&grf->gpio1b_iomux,
  38. GPIO1B1_MASK << GPIO1B1_SHIFT |
  39. GPIO1B0_MASK << GPIO1B0_SHIFT,
  40. GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
  41. GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
  42. }
  43. #endif
  44. #ifdef CONFIG_SPL_BUILD
  45. int arch_cpu_init(void)
  46. {
  47. struct rk3188_grf *grf;
  48. grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
  49. if (IS_ERR(grf)) {
  50. pr_err("grf syscon returned %ld\n", PTR_ERR(grf));
  51. return 0;
  52. }
  53. #ifdef CONFIG_ROCKCHIP_USB_UART
  54. rk_clrsetreg(&grf->uoc0_con[0],
  55. SIDDQ_MASK | UOC_DISABLE_MASK | COMMON_ON_N_MASK,
  56. 1 << SIDDQ_SHIFT | 1 << UOC_DISABLE_SHIFT |
  57. 1 << COMMON_ON_N_SHIFT);
  58. rk_clrsetreg(&grf->uoc0_con[2],
  59. SOFT_CON_SEL_MASK, 1 << SOFT_CON_SEL_SHIFT);
  60. rk_clrsetreg(&grf->uoc0_con[3],
  61. OPMODE_MASK | XCVRSELECT_MASK |
  62. TERMSEL_FULLSPEED_MASK | SUSPENDN_MASK,
  63. OPMODE_NODRIVING << OPMODE_SHIFT |
  64. XCVRSELECT_FSTRANSC << XCVRSELECT_SHIFT |
  65. 1 << TERMSEL_FULLSPEED_SHIFT |
  66. 1 << SUSPENDN_SHIFT);
  67. rk_clrsetreg(&grf->uoc0_con[0],
  68. BYPASSSEL_MASK | BYPASSDMEN_MASK,
  69. 1 << BYPASSSEL_SHIFT | 1 << BYPASSDMEN_SHIFT);
  70. #endif
  71. /* enable noc remap to mimic legacy loaders */
  72. rk_clrsetreg(&grf->soc_con0,
  73. NOC_REMAP_MASK << NOC_REMAP_SHIFT,
  74. NOC_REMAP_MASK << NOC_REMAP_SHIFT);
  75. return 0;
  76. }
  77. #endif
  78. #ifdef CONFIG_SPL_BUILD
  79. static int setup_led(void)
  80. {
  81. #ifdef CONFIG_SPL_LED
  82. struct udevice *dev;
  83. char *led_name;
  84. int ret;
  85. led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led");
  86. if (!led_name)
  87. return 0;
  88. ret = led_get_by_label(led_name, &dev);
  89. if (ret) {
  90. debug("%s: get=%d\n", __func__, ret);
  91. return ret;
  92. }
  93. ret = led_set_on(dev, 1);
  94. if (ret)
  95. return ret;
  96. #endif
  97. return 0;
  98. }
  99. void spl_board_init(void)
  100. {
  101. int ret;
  102. ret = setup_led();
  103. if (ret) {
  104. debug("LED ret=%d\n", ret);
  105. hang();
  106. }
  107. }
  108. #endif