ide.c 29 KB

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  1. /*
  2. * (C) Copyright 2000-2011
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #include <common.h>
  8. #include <ata.h>
  9. #include <dm.h>
  10. #include <ide.h>
  11. #include <watchdog.h>
  12. #include <asm/io.h>
  13. #ifdef __PPC__
  14. # define EIEIO __asm__ volatile ("eieio")
  15. # define SYNC __asm__ volatile ("sync")
  16. #else
  17. # define EIEIO /* nothing */
  18. # define SYNC /* nothing */
  19. #endif
  20. /* Current offset for IDE0 / IDE1 bus access */
  21. ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
  22. #if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
  23. CONFIG_SYS_ATA_IDE0_OFFSET,
  24. #endif
  25. #if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
  26. CONFIG_SYS_ATA_IDE1_OFFSET,
  27. #endif
  28. };
  29. static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
  30. struct blk_desc ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
  31. #define IDE_TIME_OUT 2000 /* 2 sec timeout */
  32. #define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
  33. #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
  34. #ifndef CONFIG_SYS_ATA_PORT_ADDR
  35. #define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
  36. #endif
  37. #ifndef CONFIG_IDE_LED /* define LED macros, they are not used anyways */
  38. # define DEVICE_LED(x) 0
  39. # define LED_IDE1 1
  40. # define LED_IDE2 2
  41. #endif
  42. #ifdef CONFIG_IDE_RESET
  43. extern void ide_set_reset(int idereset);
  44. static void ide_reset(void)
  45. {
  46. int i;
  47. for (i = 0; i < CONFIG_SYS_IDE_MAXBUS; ++i)
  48. ide_bus_ok[i] = 0;
  49. for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i)
  50. ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
  51. ide_set_reset(1); /* assert reset */
  52. /* the reset signal shall be asserted for et least 25 us */
  53. udelay(25);
  54. WATCHDOG_RESET();
  55. /* de-assert RESET signal */
  56. ide_set_reset(0);
  57. /* wait 250 ms */
  58. for (i = 0; i < 250; ++i)
  59. udelay(1000);
  60. }
  61. #else
  62. #define ide_reset() /* dummy */
  63. #endif /* CONFIG_IDE_RESET */
  64. /*
  65. * Wait until Busy bit is off, or timeout (in ms)
  66. * Return last status
  67. */
  68. static uchar ide_wait(int dev, ulong t)
  69. {
  70. ulong delay = 10 * t; /* poll every 100 us */
  71. uchar c;
  72. while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
  73. udelay(100);
  74. if (delay-- == 0)
  75. break;
  76. }
  77. return c;
  78. }
  79. /*
  80. * copy src to dest, skipping leading and trailing blanks and null
  81. * terminate the string
  82. * "len" is the size of available memory including the terminating '\0'
  83. */
  84. static void ident_cpy(unsigned char *dst, unsigned char *src,
  85. unsigned int len)
  86. {
  87. unsigned char *end, *last;
  88. last = dst;
  89. end = src + len - 1;
  90. /* reserve space for '\0' */
  91. if (len < 2)
  92. goto OUT;
  93. /* skip leading white space */
  94. while ((*src) && (src < end) && (*src == ' '))
  95. ++src;
  96. /* copy string, omitting trailing white space */
  97. while ((*src) && (src < end)) {
  98. *dst++ = *src;
  99. if (*src++ != ' ')
  100. last = dst;
  101. }
  102. OUT:
  103. *last = '\0';
  104. }
  105. #ifdef CONFIG_ATAPI
  106. /****************************************************************************
  107. * ATAPI Support
  108. */
  109. #if defined(CONFIG_IDE_SWAP_IO)
  110. /* since ATAPI may use commands with not 4 bytes alligned length
  111. * we have our own transfer functions, 2 bytes alligned */
  112. __weak void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts)
  113. {
  114. ushort *dbuf;
  115. volatile ushort *pbuf;
  116. pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
  117. dbuf = (ushort *)sect_buf;
  118. debug("in output data shorts base for read is %lx\n",
  119. (unsigned long) pbuf);
  120. while (shorts--) {
  121. EIEIO;
  122. *pbuf = *dbuf++;
  123. }
  124. }
  125. __weak void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts)
  126. {
  127. ushort *dbuf;
  128. volatile ushort *pbuf;
  129. pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
  130. dbuf = (ushort *)sect_buf;
  131. debug("in input data shorts base for read is %lx\n",
  132. (unsigned long) pbuf);
  133. while (shorts--) {
  134. EIEIO;
  135. *dbuf++ = *pbuf;
  136. }
  137. }
  138. #else /* ! CONFIG_IDE_SWAP_IO */
  139. __weak void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts)
  140. {
  141. outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
  142. }
  143. __weak void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts)
  144. {
  145. insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
  146. }
  147. #endif /* CONFIG_IDE_SWAP_IO */
  148. /*
  149. * Wait until (Status & mask) == res, or timeout (in ms)
  150. * Return last status
  151. * This is used since some ATAPI CD ROMs clears their Busy Bit first
  152. * and then they set their DRQ Bit
  153. */
  154. static uchar atapi_wait_mask(int dev, ulong t, uchar mask, uchar res)
  155. {
  156. ulong delay = 10 * t; /* poll every 100 us */
  157. uchar c;
  158. /* prevents to read the status before valid */
  159. c = ide_inb(dev, ATA_DEV_CTL);
  160. while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
  161. /* break if error occurs (doesn't make sense to wait more) */
  162. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR)
  163. break;
  164. udelay(100);
  165. if (delay-- == 0)
  166. break;
  167. }
  168. return c;
  169. }
  170. /*
  171. * issue an atapi command
  172. */
  173. unsigned char atapi_issue(int device, unsigned char *ccb, int ccblen,
  174. unsigned char *buffer, int buflen)
  175. {
  176. unsigned char c, err, mask, res;
  177. int n;
  178. ide_led(DEVICE_LED(device), 1); /* LED on */
  179. /* Select device
  180. */
  181. mask = ATA_STAT_BUSY | ATA_STAT_DRQ;
  182. res = 0;
  183. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  184. c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
  185. if ((c & mask) != res) {
  186. printf("ATAPI_ISSUE: device %d not ready status %X\n", device,
  187. c);
  188. err = 0xFF;
  189. goto AI_OUT;
  190. }
  191. /* write taskfile */
  192. ide_outb(device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
  193. ide_outb(device, ATA_SECT_CNT, 0);
  194. ide_outb(device, ATA_SECT_NUM, 0);
  195. ide_outb(device, ATA_CYL_LOW, (unsigned char) (buflen & 0xFF));
  196. ide_outb(device, ATA_CYL_HIGH,
  197. (unsigned char) ((buflen >> 8) & 0xFF));
  198. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  199. ide_outb(device, ATA_COMMAND, ATAPI_CMD_PACKET);
  200. udelay(50);
  201. mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
  202. res = ATA_STAT_DRQ;
  203. c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
  204. if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
  205. printf("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",
  206. device, c);
  207. err = 0xFF;
  208. goto AI_OUT;
  209. }
  210. /* write command block */
  211. ide_output_data_shorts(device, (unsigned short *)ccb, ccblen / 2);
  212. /* ATAPI Command written wait for completition */
  213. udelay(5000); /* device must set bsy */
  214. mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
  215. /*
  216. * if no data wait for DRQ = 0 BSY = 0
  217. * if data wait for DRQ = 1 BSY = 0
  218. */
  219. res = 0;
  220. if (buflen)
  221. res = ATA_STAT_DRQ;
  222. c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
  223. if ((c & mask) != res) {
  224. if (c & ATA_STAT_ERR) {
  225. err = (ide_inb(device, ATA_ERROR_REG)) >> 4;
  226. debug("atapi_issue 1 returned sense key %X status %02X\n",
  227. err, c);
  228. } else {
  229. printf("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n",
  230. ccb[0], c);
  231. err = 0xFF;
  232. }
  233. goto AI_OUT;
  234. }
  235. n = ide_inb(device, ATA_CYL_HIGH);
  236. n <<= 8;
  237. n += ide_inb(device, ATA_CYL_LOW);
  238. if (n > buflen) {
  239. printf("ERROR, transfer bytes %d requested only %d\n", n,
  240. buflen);
  241. err = 0xff;
  242. goto AI_OUT;
  243. }
  244. if ((n == 0) && (buflen < 0)) {
  245. printf("ERROR, transfer bytes %d requested %d\n", n, buflen);
  246. err = 0xff;
  247. goto AI_OUT;
  248. }
  249. if (n != buflen) {
  250. debug("WARNING, transfer bytes %d not equal with requested %d\n",
  251. n, buflen);
  252. }
  253. if (n != 0) { /* data transfer */
  254. debug("ATAPI_ISSUE: %d Bytes to transfer\n", n);
  255. /* we transfer shorts */
  256. n >>= 1;
  257. /* ok now decide if it is an in or output */
  258. if ((ide_inb(device, ATA_SECT_CNT) & 0x02) == 0) {
  259. debug("Write to device\n");
  260. ide_output_data_shorts(device, (unsigned short *)buffer,
  261. n);
  262. } else {
  263. debug("Read from device @ %p shorts %d\n", buffer, n);
  264. ide_input_data_shorts(device, (unsigned short *)buffer,
  265. n);
  266. }
  267. }
  268. udelay(5000); /* seems that some CD ROMs need this... */
  269. mask = ATA_STAT_BUSY | ATA_STAT_ERR;
  270. res = 0;
  271. c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
  272. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  273. err = (ide_inb(device, ATA_ERROR_REG) >> 4);
  274. debug("atapi_issue 2 returned sense key %X status %X\n", err,
  275. c);
  276. } else {
  277. err = 0;
  278. }
  279. AI_OUT:
  280. ide_led(DEVICE_LED(device), 0); /* LED off */
  281. return err;
  282. }
  283. /*
  284. * sending the command to atapi_issue. If an status other than good
  285. * returns, an request_sense will be issued
  286. */
  287. #define ATAPI_DRIVE_NOT_READY 100
  288. #define ATAPI_UNIT_ATTN 10
  289. unsigned char atapi_issue_autoreq(int device,
  290. unsigned char *ccb,
  291. int ccblen,
  292. unsigned char *buffer, int buflen)
  293. {
  294. unsigned char sense_data[18], sense_ccb[12];
  295. unsigned char res, key, asc, ascq;
  296. int notready, unitattn;
  297. unitattn = ATAPI_UNIT_ATTN;
  298. notready = ATAPI_DRIVE_NOT_READY;
  299. retry:
  300. res = atapi_issue(device, ccb, ccblen, buffer, buflen);
  301. if (res == 0)
  302. return 0; /* Ok */
  303. if (res == 0xFF)
  304. return 0xFF; /* error */
  305. debug("(auto_req)atapi_issue returned sense key %X\n", res);
  306. memset(sense_ccb, 0, sizeof(sense_ccb));
  307. memset(sense_data, 0, sizeof(sense_data));
  308. sense_ccb[0] = ATAPI_CMD_REQ_SENSE;
  309. sense_ccb[4] = 18; /* allocation Length */
  310. res = atapi_issue(device, sense_ccb, 12, sense_data, 18);
  311. key = (sense_data[2] & 0xF);
  312. asc = (sense_data[12]);
  313. ascq = (sense_data[13]);
  314. debug("ATAPI_CMD_REQ_SENSE returned %x\n", res);
  315. debug(" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
  316. sense_data[0], key, asc, ascq);
  317. if ((key == 0))
  318. return 0; /* ok device ready */
  319. if ((key == 6) || (asc == 0x29) || (asc == 0x28)) { /* Unit Attention */
  320. if (unitattn-- > 0) {
  321. udelay(200 * 1000);
  322. goto retry;
  323. }
  324. printf("Unit Attention, tried %d\n", ATAPI_UNIT_ATTN);
  325. goto error;
  326. }
  327. if ((asc == 0x4) && (ascq == 0x1)) {
  328. /* not ready, but will be ready soon */
  329. if (notready-- > 0) {
  330. udelay(200 * 1000);
  331. goto retry;
  332. }
  333. printf("Drive not ready, tried %d times\n",
  334. ATAPI_DRIVE_NOT_READY);
  335. goto error;
  336. }
  337. if (asc == 0x3a) {
  338. debug("Media not present\n");
  339. goto error;
  340. }
  341. printf("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n", key, asc,
  342. ascq);
  343. error:
  344. debug("ERROR Sense key %02X ASC %02X ASCQ %02X\n", key, asc, ascq);
  345. return 0xFF;
  346. }
  347. /*
  348. * atapi_read:
  349. * we transfer only one block per command, since the multiple DRQ per
  350. * command is not yet implemented
  351. */
  352. #define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
  353. #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
  354. #define ATAPI_READ_MAX_BLOCK (ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE)
  355. ulong atapi_read(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
  356. void *buffer)
  357. {
  358. int device = block_dev->devnum;
  359. ulong n = 0;
  360. unsigned char ccb[12]; /* Command descriptor block */
  361. ulong cnt;
  362. debug("atapi_read dev %d start " LBAF " blocks " LBAF
  363. " buffer at %lX\n", device, blknr, blkcnt, (ulong) buffer);
  364. do {
  365. if (blkcnt > ATAPI_READ_MAX_BLOCK)
  366. cnt = ATAPI_READ_MAX_BLOCK;
  367. else
  368. cnt = blkcnt;
  369. ccb[0] = ATAPI_CMD_READ_12;
  370. ccb[1] = 0; /* reserved */
  371. ccb[2] = (unsigned char) (blknr >> 24) & 0xFF; /* MSB Block */
  372. ccb[3] = (unsigned char) (blknr >> 16) & 0xFF; /* */
  373. ccb[4] = (unsigned char) (blknr >> 8) & 0xFF;
  374. ccb[5] = (unsigned char) blknr & 0xFF; /* LSB Block */
  375. ccb[6] = (unsigned char) (cnt >> 24) & 0xFF; /* MSB Block cnt */
  376. ccb[7] = (unsigned char) (cnt >> 16) & 0xFF;
  377. ccb[8] = (unsigned char) (cnt >> 8) & 0xFF;
  378. ccb[9] = (unsigned char) cnt & 0xFF; /* LSB Block */
  379. ccb[10] = 0; /* reserved */
  380. ccb[11] = 0; /* reserved */
  381. if (atapi_issue_autoreq(device, ccb, 12,
  382. (unsigned char *)buffer,
  383. cnt * ATAPI_READ_BLOCK_SIZE)
  384. == 0xFF) {
  385. return n;
  386. }
  387. n += cnt;
  388. blkcnt -= cnt;
  389. blknr += cnt;
  390. buffer += (cnt * ATAPI_READ_BLOCK_SIZE);
  391. } while (blkcnt > 0);
  392. return n;
  393. }
  394. static void atapi_inquiry(struct blk_desc *dev_desc)
  395. {
  396. unsigned char ccb[12]; /* Command descriptor block */
  397. unsigned char iobuf[64]; /* temp buf */
  398. unsigned char c;
  399. int device;
  400. device = dev_desc->devnum;
  401. dev_desc->type = DEV_TYPE_UNKNOWN; /* not yet valid */
  402. dev_desc->block_read = atapi_read;
  403. memset(ccb, 0, sizeof(ccb));
  404. memset(iobuf, 0, sizeof(iobuf));
  405. ccb[0] = ATAPI_CMD_INQUIRY;
  406. ccb[4] = 40; /* allocation Legnth */
  407. c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 40);
  408. debug("ATAPI_CMD_INQUIRY returned %x\n", c);
  409. if (c != 0)
  410. return;
  411. /* copy device ident strings */
  412. ident_cpy((unsigned char *)dev_desc->vendor, &iobuf[8], 8);
  413. ident_cpy((unsigned char *)dev_desc->product, &iobuf[16], 16);
  414. ident_cpy((unsigned char *)dev_desc->revision, &iobuf[32], 5);
  415. dev_desc->lun = 0;
  416. dev_desc->lba = 0;
  417. dev_desc->blksz = 0;
  418. dev_desc->log2blksz = LOG2_INVALID(typeof(dev_desc->log2blksz));
  419. dev_desc->type = iobuf[0] & 0x1f;
  420. if ((iobuf[1] & 0x80) == 0x80)
  421. dev_desc->removable = 1;
  422. else
  423. dev_desc->removable = 0;
  424. memset(ccb, 0, sizeof(ccb));
  425. memset(iobuf, 0, sizeof(iobuf));
  426. ccb[0] = ATAPI_CMD_START_STOP;
  427. ccb[4] = 0x03; /* start */
  428. c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 0);
  429. debug("ATAPI_CMD_START_STOP returned %x\n", c);
  430. if (c != 0)
  431. return;
  432. memset(ccb, 0, sizeof(ccb));
  433. memset(iobuf, 0, sizeof(iobuf));
  434. c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 0);
  435. debug("ATAPI_CMD_UNIT_TEST_READY returned %x\n", c);
  436. if (c != 0)
  437. return;
  438. memset(ccb, 0, sizeof(ccb));
  439. memset(iobuf, 0, sizeof(iobuf));
  440. ccb[0] = ATAPI_CMD_READ_CAP;
  441. c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 8);
  442. debug("ATAPI_CMD_READ_CAP returned %x\n", c);
  443. if (c != 0)
  444. return;
  445. debug("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
  446. iobuf[0], iobuf[1], iobuf[2], iobuf[3],
  447. iobuf[4], iobuf[5], iobuf[6], iobuf[7]);
  448. dev_desc->lba = ((unsigned long) iobuf[0] << 24) +
  449. ((unsigned long) iobuf[1] << 16) +
  450. ((unsigned long) iobuf[2] << 8) + ((unsigned long) iobuf[3]);
  451. dev_desc->blksz = ((unsigned long) iobuf[4] << 24) +
  452. ((unsigned long) iobuf[5] << 16) +
  453. ((unsigned long) iobuf[6] << 8) + ((unsigned long) iobuf[7]);
  454. dev_desc->log2blksz = LOG2(dev_desc->blksz);
  455. #ifdef CONFIG_LBA48
  456. /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
  457. dev_desc->lba48 = 0;
  458. #endif
  459. return;
  460. }
  461. #endif /* CONFIG_ATAPI */
  462. static void ide_ident(struct blk_desc *dev_desc)
  463. {
  464. unsigned char c;
  465. hd_driveid_t iop;
  466. #ifdef CONFIG_ATAPI
  467. int retries = 0;
  468. #endif
  469. int device;
  470. device = dev_desc->devnum;
  471. printf(" Device %d: ", device);
  472. ide_led(DEVICE_LED(device), 1); /* LED on */
  473. /* Select device
  474. */
  475. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  476. dev_desc->if_type = IF_TYPE_IDE;
  477. #ifdef CONFIG_ATAPI
  478. retries = 0;
  479. /* Warning: This will be tricky to read */
  480. while (retries <= 1) {
  481. /* check signature */
  482. if ((ide_inb(device, ATA_SECT_CNT) == 0x01) &&
  483. (ide_inb(device, ATA_SECT_NUM) == 0x01) &&
  484. (ide_inb(device, ATA_CYL_LOW) == 0x14) &&
  485. (ide_inb(device, ATA_CYL_HIGH) == 0xEB)) {
  486. /* ATAPI Signature found */
  487. dev_desc->if_type = IF_TYPE_ATAPI;
  488. /*
  489. * Start Ident Command
  490. */
  491. ide_outb(device, ATA_COMMAND, ATAPI_CMD_IDENT);
  492. /*
  493. * Wait for completion - ATAPI devices need more time
  494. * to become ready
  495. */
  496. c = ide_wait(device, ATAPI_TIME_OUT);
  497. } else
  498. #endif
  499. {
  500. /*
  501. * Start Ident Command
  502. */
  503. ide_outb(device, ATA_COMMAND, ATA_CMD_IDENT);
  504. /*
  505. * Wait for completion
  506. */
  507. c = ide_wait(device, IDE_TIME_OUT);
  508. }
  509. ide_led(DEVICE_LED(device), 0); /* LED off */
  510. if (((c & ATA_STAT_DRQ) == 0) ||
  511. ((c & (ATA_STAT_FAULT | ATA_STAT_ERR)) != 0)) {
  512. #ifdef CONFIG_ATAPI
  513. {
  514. /*
  515. * Need to soft reset the device
  516. * in case it's an ATAPI...
  517. */
  518. debug("Retrying...\n");
  519. ide_outb(device, ATA_DEV_HD,
  520. ATA_LBA | ATA_DEVICE(device));
  521. udelay(100000);
  522. ide_outb(device, ATA_COMMAND, 0x08);
  523. udelay(500000); /* 500 ms */
  524. }
  525. /*
  526. * Select device
  527. */
  528. ide_outb(device, ATA_DEV_HD,
  529. ATA_LBA | ATA_DEVICE(device));
  530. retries++;
  531. #else
  532. return;
  533. #endif
  534. }
  535. #ifdef CONFIG_ATAPI
  536. else
  537. break;
  538. } /* see above - ugly to read */
  539. if (retries == 2) /* Not found */
  540. return;
  541. #endif
  542. ide_input_swap_data(device, (ulong *)&iop, ATA_SECTORWORDS);
  543. ident_cpy((unsigned char *)dev_desc->revision, iop.fw_rev,
  544. sizeof(dev_desc->revision));
  545. ident_cpy((unsigned char *)dev_desc->vendor, iop.model,
  546. sizeof(dev_desc->vendor));
  547. ident_cpy((unsigned char *)dev_desc->product, iop.serial_no,
  548. sizeof(dev_desc->product));
  549. #ifdef __LITTLE_ENDIAN
  550. /*
  551. * firmware revision, model, and serial number have Big Endian Byte
  552. * order in Word. Convert all three to little endian.
  553. *
  554. * See CF+ and CompactFlash Specification Revision 2.0:
  555. * 6.2.1.6: Identify Drive, Table 39 for more details
  556. */
  557. strswab(dev_desc->revision);
  558. strswab(dev_desc->vendor);
  559. strswab(dev_desc->product);
  560. #endif /* __LITTLE_ENDIAN */
  561. if ((iop.config & 0x0080) == 0x0080)
  562. dev_desc->removable = 1;
  563. else
  564. dev_desc->removable = 0;
  565. #ifdef CONFIG_ATAPI
  566. if (dev_desc->if_type == IF_TYPE_ATAPI) {
  567. atapi_inquiry(dev_desc);
  568. return;
  569. }
  570. #endif /* CONFIG_ATAPI */
  571. #ifdef __BIG_ENDIAN
  572. /* swap shorts */
  573. dev_desc->lba = (iop.lba_capacity << 16) | (iop.lba_capacity >> 16);
  574. #else /* ! __BIG_ENDIAN */
  575. /*
  576. * do not swap shorts on little endian
  577. *
  578. * See CF+ and CompactFlash Specification Revision 2.0:
  579. * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
  580. */
  581. dev_desc->lba = iop.lba_capacity;
  582. #endif /* __BIG_ENDIAN */
  583. #ifdef CONFIG_LBA48
  584. if (iop.command_set_2 & 0x0400) { /* LBA 48 support */
  585. dev_desc->lba48 = 1;
  586. dev_desc->lba = (unsigned long long) iop.lba48_capacity[0] |
  587. ((unsigned long long) iop.lba48_capacity[1] << 16) |
  588. ((unsigned long long) iop.lba48_capacity[2] << 32) |
  589. ((unsigned long long) iop.lba48_capacity[3] << 48);
  590. } else {
  591. dev_desc->lba48 = 0;
  592. }
  593. #endif /* CONFIG_LBA48 */
  594. /* assuming HD */
  595. dev_desc->type = DEV_TYPE_HARDDISK;
  596. dev_desc->blksz = ATA_BLOCKSIZE;
  597. dev_desc->log2blksz = LOG2(dev_desc->blksz);
  598. dev_desc->lun = 0; /* just to fill something in... */
  599. #if 0 /* only used to test the powersaving mode,
  600. * if enabled, the drive goes after 5 sec
  601. * in standby mode */
  602. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  603. c = ide_wait(device, IDE_TIME_OUT);
  604. ide_outb(device, ATA_SECT_CNT, 1);
  605. ide_outb(device, ATA_LBA_LOW, 0);
  606. ide_outb(device, ATA_LBA_MID, 0);
  607. ide_outb(device, ATA_LBA_HIGH, 0);
  608. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  609. ide_outb(device, ATA_COMMAND, 0xe3);
  610. udelay(50);
  611. c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
  612. #endif
  613. }
  614. __weak void ide_led(uchar led, uchar status)
  615. {
  616. #if defined(CONFIG_IDE_LED) && defined(PER8_BASE) /* required by LED_PORT */
  617. static uchar led_buffer; /* Buffer for current LED status */
  618. uchar *led_port = LED_PORT;
  619. if (status) /* switch LED on */
  620. led_buffer |= led;
  621. else /* switch LED off */
  622. led_buffer &= ~led;
  623. *led_port = led_buffer;
  624. #endif
  625. }
  626. __weak void ide_outb(int dev, int port, unsigned char val)
  627. {
  628. debug("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
  629. dev, port, val,
  630. (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
  631. #if defined(CONFIG_IDE_AHB)
  632. if (port) {
  633. /* write command */
  634. ide_write_register(dev, port, val);
  635. } else {
  636. /* write data */
  637. outb(val, (ATA_CURR_BASE(dev)));
  638. }
  639. #else
  640. outb(val, (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
  641. #endif
  642. }
  643. __weak unsigned char ide_inb(int dev, int port)
  644. {
  645. uchar val;
  646. #if defined(CONFIG_IDE_AHB)
  647. val = ide_read_register(dev, port);
  648. #else
  649. val = inb((ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
  650. #endif
  651. debug("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
  652. dev, port,
  653. (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)), val);
  654. return val;
  655. }
  656. void ide_init(void)
  657. {
  658. unsigned char c;
  659. int i, bus;
  660. #ifdef CONFIG_IDE_PREINIT
  661. WATCHDOG_RESET();
  662. if (ide_preinit()) {
  663. puts("ide_preinit failed\n");
  664. return;
  665. }
  666. #endif /* CONFIG_IDE_PREINIT */
  667. WATCHDOG_RESET();
  668. /*
  669. * Reset the IDE just to be sure.
  670. * Light LED's to show
  671. */
  672. ide_led((LED_IDE1 | LED_IDE2), 1); /* LED's on */
  673. /* ATAPI Drives seems to need a proper IDE Reset */
  674. ide_reset();
  675. #ifdef CONFIG_IDE_INIT_POSTRESET
  676. WATCHDOG_RESET();
  677. if (ide_init_postreset()) {
  678. puts("ide_preinit_postreset failed\n");
  679. return;
  680. }
  681. #endif /* CONFIG_IDE_INIT_POSTRESET */
  682. /*
  683. * Wait for IDE to get ready.
  684. * According to spec, this can take up to 31 seconds!
  685. */
  686. for (bus = 0; bus < CONFIG_SYS_IDE_MAXBUS; ++bus) {
  687. int dev =
  688. bus * (CONFIG_SYS_IDE_MAXDEVICE /
  689. CONFIG_SYS_IDE_MAXBUS);
  690. printf("Bus %d: ", bus);
  691. ide_bus_ok[bus] = 0;
  692. /* Select device
  693. */
  694. udelay(100000); /* 100 ms */
  695. ide_outb(dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
  696. udelay(100000); /* 100 ms */
  697. i = 0;
  698. do {
  699. udelay(10000); /* 10 ms */
  700. c = ide_inb(dev, ATA_STATUS);
  701. i++;
  702. if (i > (ATA_RESET_TIME * 100)) {
  703. puts("** Timeout **\n");
  704. /* LED's off */
  705. ide_led((LED_IDE1 | LED_IDE2), 0);
  706. return;
  707. }
  708. if ((i >= 100) && ((i % 100) == 0))
  709. putc('.');
  710. } while (c & ATA_STAT_BUSY);
  711. if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
  712. puts("not available ");
  713. debug("Status = 0x%02X ", c);
  714. #ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
  715. } else if ((c & ATA_STAT_READY) == 0) {
  716. puts("not available ");
  717. debug("Status = 0x%02X ", c);
  718. #endif
  719. } else {
  720. puts("OK ");
  721. ide_bus_ok[bus] = 1;
  722. }
  723. WATCHDOG_RESET();
  724. }
  725. putc('\n');
  726. ide_led((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  727. for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) {
  728. int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
  729. ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
  730. ide_dev_desc[i].if_type = IF_TYPE_IDE;
  731. ide_dev_desc[i].devnum = i;
  732. ide_dev_desc[i].part_type = PART_TYPE_UNKNOWN;
  733. ide_dev_desc[i].blksz = 0;
  734. ide_dev_desc[i].log2blksz =
  735. LOG2_INVALID(typeof(ide_dev_desc[i].log2blksz));
  736. ide_dev_desc[i].lba = 0;
  737. #ifndef CONFIG_BLK
  738. ide_dev_desc[i].block_read = ide_read;
  739. ide_dev_desc[i].block_write = ide_write;
  740. #endif
  741. if (!ide_bus_ok[IDE_BUS(i)])
  742. continue;
  743. ide_led(led, 1); /* LED on */
  744. ide_ident(&ide_dev_desc[i]);
  745. ide_led(led, 0); /* LED off */
  746. dev_print(&ide_dev_desc[i]);
  747. if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
  748. /* initialize partition type */
  749. part_init(&ide_dev_desc[i]);
  750. }
  751. }
  752. WATCHDOG_RESET();
  753. }
  754. /* We only need to swap data if we are running on a big endian cpu. */
  755. #if defined(__LITTLE_ENDIAN)
  756. __weak void ide_input_swap_data(int dev, ulong *sect_buf, int words)
  757. {
  758. ide_input_data(dev, sect_buf, words);
  759. }
  760. #else
  761. __weak void ide_input_swap_data(int dev, ulong *sect_buf, int words)
  762. {
  763. volatile ushort *pbuf =
  764. (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
  765. ushort *dbuf = (ushort *)sect_buf;
  766. debug("in input swap data base for read is %lx\n",
  767. (unsigned long) pbuf);
  768. while (words--) {
  769. #ifdef __MIPS__
  770. *dbuf++ = swab16p((u16 *)pbuf);
  771. *dbuf++ = swab16p((u16 *)pbuf);
  772. #else
  773. *dbuf++ = ld_le16(pbuf);
  774. *dbuf++ = ld_le16(pbuf);
  775. #endif /* !MIPS */
  776. }
  777. }
  778. #endif /* __LITTLE_ENDIAN */
  779. #if defined(CONFIG_IDE_SWAP_IO)
  780. __weak void ide_output_data(int dev, const ulong *sect_buf, int words)
  781. {
  782. ushort *dbuf;
  783. volatile ushort *pbuf;
  784. pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
  785. dbuf = (ushort *)sect_buf;
  786. while (words--) {
  787. EIEIO;
  788. *pbuf = *dbuf++;
  789. EIEIO;
  790. *pbuf = *dbuf++;
  791. }
  792. }
  793. #else /* ! CONFIG_IDE_SWAP_IO */
  794. __weak void ide_output_data(int dev, const ulong *sect_buf, int words)
  795. {
  796. #if defined(CONFIG_IDE_AHB)
  797. ide_write_data(dev, sect_buf, words);
  798. #else
  799. outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
  800. #endif
  801. }
  802. #endif /* CONFIG_IDE_SWAP_IO */
  803. #if defined(CONFIG_IDE_SWAP_IO)
  804. __weak void ide_input_data(int dev, ulong *sect_buf, int words)
  805. {
  806. ushort *dbuf;
  807. volatile ushort *pbuf;
  808. pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
  809. dbuf = (ushort *)sect_buf;
  810. debug("in input data base for read is %lx\n", (unsigned long) pbuf);
  811. while (words--) {
  812. EIEIO;
  813. *dbuf++ = *pbuf;
  814. EIEIO;
  815. *dbuf++ = *pbuf;
  816. }
  817. }
  818. #else /* ! CONFIG_IDE_SWAP_IO */
  819. __weak void ide_input_data(int dev, ulong *sect_buf, int words)
  820. {
  821. #if defined(CONFIG_IDE_AHB)
  822. ide_read_data(dev, sect_buf, words);
  823. #else
  824. insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
  825. #endif
  826. }
  827. #endif /* CONFIG_IDE_SWAP_IO */
  828. #ifdef CONFIG_BLK
  829. ulong ide_read(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
  830. void *buffer)
  831. #else
  832. ulong ide_read(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
  833. void *buffer)
  834. #endif
  835. {
  836. #ifdef CONFIG_BLK
  837. struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
  838. #endif
  839. int device = block_dev->devnum;
  840. ulong n = 0;
  841. unsigned char c;
  842. unsigned char pwrsave = 0; /* power save */
  843. #ifdef CONFIG_LBA48
  844. unsigned char lba48 = 0;
  845. if (blknr & 0x0000fffff0000000ULL) {
  846. /* more than 28 bits used, use 48bit mode */
  847. lba48 = 1;
  848. }
  849. #endif
  850. debug("ide_read dev %d start " LBAF ", blocks " LBAF " buffer at %lX\n",
  851. device, blknr, blkcnt, (ulong) buffer);
  852. ide_led(DEVICE_LED(device), 1); /* LED on */
  853. /* Select device
  854. */
  855. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  856. c = ide_wait(device, IDE_TIME_OUT);
  857. if (c & ATA_STAT_BUSY) {
  858. printf("IDE read: device %d not ready\n", device);
  859. goto IDE_READ_E;
  860. }
  861. /* first check if the drive is in Powersaving mode, if yes,
  862. * increase the timeout value */
  863. ide_outb(device, ATA_COMMAND, ATA_CMD_CHK_PWR);
  864. udelay(50);
  865. c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
  866. if (c & ATA_STAT_BUSY) {
  867. printf("IDE read: device %d not ready\n", device);
  868. goto IDE_READ_E;
  869. }
  870. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  871. printf("No Powersaving mode %X\n", c);
  872. } else {
  873. c = ide_inb(device, ATA_SECT_CNT);
  874. debug("Powersaving %02X\n", c);
  875. if (c == 0)
  876. pwrsave = 1;
  877. }
  878. while (blkcnt-- > 0) {
  879. c = ide_wait(device, IDE_TIME_OUT);
  880. if (c & ATA_STAT_BUSY) {
  881. printf("IDE read: device %d not ready\n", device);
  882. break;
  883. }
  884. #ifdef CONFIG_LBA48
  885. if (lba48) {
  886. /* write high bits */
  887. ide_outb(device, ATA_SECT_CNT, 0);
  888. ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  889. #ifdef CONFIG_SYS_64BIT_LBA
  890. ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  891. ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  892. #else
  893. ide_outb(device, ATA_LBA_MID, 0);
  894. ide_outb(device, ATA_LBA_HIGH, 0);
  895. #endif
  896. }
  897. #endif
  898. ide_outb(device, ATA_SECT_CNT, 1);
  899. ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  900. ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  901. ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  902. #ifdef CONFIG_LBA48
  903. if (lba48) {
  904. ide_outb(device, ATA_DEV_HD,
  905. ATA_LBA | ATA_DEVICE(device));
  906. ide_outb(device, ATA_COMMAND, ATA_CMD_READ_EXT);
  907. } else
  908. #endif
  909. {
  910. ide_outb(device, ATA_DEV_HD, ATA_LBA |
  911. ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
  912. ide_outb(device, ATA_COMMAND, ATA_CMD_READ);
  913. }
  914. udelay(50);
  915. if (pwrsave) {
  916. /* may take up to 4 sec */
  917. c = ide_wait(device, IDE_SPIN_UP_TIME_OUT);
  918. pwrsave = 0;
  919. } else {
  920. /* can't take over 500 ms */
  921. c = ide_wait(device, IDE_TIME_OUT);
  922. }
  923. if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
  924. ATA_STAT_DRQ) {
  925. printf("Error (no IRQ) dev %d blk " LBAF
  926. ": status %#02x\n", device, blknr, c);
  927. break;
  928. }
  929. ide_input_data(device, buffer, ATA_SECTORWORDS);
  930. (void) ide_inb(device, ATA_STATUS); /* clear IRQ */
  931. ++n;
  932. ++blknr;
  933. buffer += ATA_BLOCKSIZE;
  934. }
  935. IDE_READ_E:
  936. ide_led(DEVICE_LED(device), 0); /* LED off */
  937. return n;
  938. }
  939. #ifdef CONFIG_BLK
  940. ulong ide_write(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
  941. const void *buffer)
  942. #else
  943. ulong ide_write(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
  944. const void *buffer)
  945. #endif
  946. {
  947. #ifdef CONFIG_BLK
  948. struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
  949. #endif
  950. int device = block_dev->devnum;
  951. ulong n = 0;
  952. unsigned char c;
  953. #ifdef CONFIG_LBA48
  954. unsigned char lba48 = 0;
  955. if (blknr & 0x0000fffff0000000ULL) {
  956. /* more than 28 bits used, use 48bit mode */
  957. lba48 = 1;
  958. }
  959. #endif
  960. ide_led(DEVICE_LED(device), 1); /* LED on */
  961. /* Select device
  962. */
  963. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  964. while (blkcnt-- > 0) {
  965. c = ide_wait(device, IDE_TIME_OUT);
  966. if (c & ATA_STAT_BUSY) {
  967. printf("IDE read: device %d not ready\n", device);
  968. goto WR_OUT;
  969. }
  970. #ifdef CONFIG_LBA48
  971. if (lba48) {
  972. /* write high bits */
  973. ide_outb(device, ATA_SECT_CNT, 0);
  974. ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  975. #ifdef CONFIG_SYS_64BIT_LBA
  976. ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  977. ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  978. #else
  979. ide_outb(device, ATA_LBA_MID, 0);
  980. ide_outb(device, ATA_LBA_HIGH, 0);
  981. #endif
  982. }
  983. #endif
  984. ide_outb(device, ATA_SECT_CNT, 1);
  985. ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  986. ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  987. ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  988. #ifdef CONFIG_LBA48
  989. if (lba48) {
  990. ide_outb(device, ATA_DEV_HD,
  991. ATA_LBA | ATA_DEVICE(device));
  992. ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
  993. } else
  994. #endif
  995. {
  996. ide_outb(device, ATA_DEV_HD, ATA_LBA |
  997. ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
  998. ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE);
  999. }
  1000. udelay(50);
  1001. /* can't take over 500 ms */
  1002. c = ide_wait(device, IDE_TIME_OUT);
  1003. if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
  1004. ATA_STAT_DRQ) {
  1005. printf("Error (no IRQ) dev %d blk " LBAF
  1006. ": status %#02x\n", device, blknr, c);
  1007. goto WR_OUT;
  1008. }
  1009. ide_output_data(device, buffer, ATA_SECTORWORDS);
  1010. c = ide_inb(device, ATA_STATUS); /* clear IRQ */
  1011. ++n;
  1012. ++blknr;
  1013. buffer += ATA_BLOCKSIZE;
  1014. }
  1015. WR_OUT:
  1016. ide_led(DEVICE_LED(device), 0); /* LED off */
  1017. return n;
  1018. }
  1019. #if defined(CONFIG_OF_IDE_FIXUP)
  1020. int ide_device_present(int dev)
  1021. {
  1022. if (dev >= CONFIG_SYS_IDE_MAXBUS)
  1023. return 0;
  1024. return ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN ? 0 : 1;
  1025. }
  1026. #endif
  1027. #ifdef CONFIG_BLK
  1028. static const struct blk_ops ide_blk_ops = {
  1029. .read = ide_read,
  1030. .write = ide_write,
  1031. };
  1032. U_BOOT_DRIVER(ide_blk) = {
  1033. .name = "ide_blk",
  1034. .id = UCLASS_BLK,
  1035. .ops = &ide_blk_ops,
  1036. };
  1037. #else
  1038. U_BOOT_LEGACY_BLK(ide) = {
  1039. .if_typename = "ide",
  1040. .if_type = IF_TYPE_IDE,
  1041. .max_devs = CONFIG_SYS_IDE_MAXDEVICE,
  1042. .desc = ide_dev_desc,
  1043. };
  1044. #endif