beacon-renesom-som.dtsi 5.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright 2020, Compass Electronics Group, LLC
  4. */
  5. #include <dt-bindings/gpio/gpio.h>
  6. / {
  7. memory@48000000 {
  8. device_type = "memory";
  9. /* first 128MB is reserved for secure area. */
  10. reg = <0x0 0x48000000 0x0 0x78000000>;
  11. };
  12. memory@600000000 {
  13. device_type = "memory";
  14. reg = <0x6 0x00000000 0x0 0x80000000>;
  15. };
  16. osc_32k: osc_32k {
  17. compatible = "fixed-clock";
  18. #clock-cells = <0>;
  19. clock-frequency = <32768>;
  20. clock-output-names = "osc_32k";
  21. };
  22. reg_1p8v: regulator0 {
  23. compatible = "regulator-fixed";
  24. regulator-name = "fixed-1.8V";
  25. regulator-min-microvolt = <1800000>;
  26. regulator-max-microvolt = <1800000>;
  27. regulator-boot-on;
  28. regulator-always-on;
  29. };
  30. reg_3p3v: regulator1 {
  31. compatible = "regulator-fixed";
  32. regulator-name = "fixed-3.3V";
  33. regulator-min-microvolt = <3300000>;
  34. regulator-max-microvolt = <3300000>;
  35. regulator-boot-on;
  36. regulator-always-on;
  37. };
  38. wlan_pwrseq: wlan_pwrseq {
  39. compatible = "mmc-pwrseq-simple";
  40. reset-gpios = <&pca9654 1 GPIO_ACTIVE_LOW>;
  41. clocks = <&osc_32k>;
  42. clock-names = "ext_clock";
  43. post-power-on-delay-ms = <80>;
  44. };
  45. };
  46. &avb {
  47. pinctrl-0 = <&avb_pins>;
  48. pinctrl-names = "default";
  49. phy-handle = <&phy0>;
  50. phy-mode = "rgmii-id";
  51. status = "okay";
  52. phy0: ethernet-phy@0 {
  53. reg = <0>;
  54. interrupt-parent = <&gpio2>;
  55. interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
  56. reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
  57. };
  58. };
  59. &extal_clk {
  60. clock-frequency = <16666666>;
  61. };
  62. &extalr_clk {
  63. clock-frequency = <32768>;
  64. };
  65. &gpio6 {
  66. usb_hub_reset {
  67. gpio-hog;
  68. gpios = <10 GPIO_ACTIVE_HIGH>;
  69. output-high;
  70. line-name = "usb-hub-reset";
  71. };
  72. };
  73. &hscif0 {
  74. pinctrl-0 = <&hscif0_pins>;
  75. pinctrl-names = "default";
  76. uart-has-rtscts;
  77. status = "okay";
  78. max-speed = <4000000>;
  79. bluetooth {
  80. compatible = "brcm,bcm43438-bt";
  81. shutdown-gpios = <&pca9654 2 GPIO_ACTIVE_HIGH>;
  82. host-wakeup-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
  83. device-wakeup-gpios = <&pca9654 5 GPIO_ACTIVE_HIGH>;
  84. clocks = <&osc_32k>;
  85. clock-names = "extclk";
  86. };
  87. };
  88. &hscif2 {
  89. status = "okay";
  90. pinctrl-0 = <&hscif2_pins>;
  91. pinctrl-names = "default";
  92. };
  93. &i2c4 {
  94. status = "okay";
  95. clock-frequency = <400000>;
  96. pca9654: gpio@20 {
  97. compatible = "onnn,pca9654";
  98. reg = <0x20>;
  99. gpio-controller;
  100. #gpio-cells = <2>;
  101. gpio-line-names =
  102. "i2c4_20_0",
  103. "wl_reg_on",
  104. "bt_reg_on",
  105. "i2c4_20_3",
  106. "i2c4_20_4",
  107. "bt_dev_wake",
  108. "i2c4_20_6",
  109. "i2c4_20_7";
  110. };
  111. pca9654_lte: gpio@21 {
  112. compatible = "onnn,pca9654";
  113. reg = <0x21>;
  114. interrupt-parent = <&gpio5>;
  115. interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
  116. interrupt-controller;
  117. #interrupt-cells = <2>;
  118. gpio-controller;
  119. #gpio-cells = <2>;
  120. gpio-line-names =
  121. "i2c4_21_0",
  122. "zoe_pwr_on",
  123. "zoe_extint",
  124. "zoe_reset_n",
  125. "sara_reset",
  126. "i2c4_21_5",
  127. "sara_pwr_off",
  128. "sara_networking_status";
  129. };
  130. eeprom@50 {
  131. compatible = "microchip, at24c64", "atmel,24c64";
  132. pagesize = <32>;
  133. read-only; /* Manufacturing EEPROM programmed at factory */
  134. reg = <0x50>;
  135. };
  136. rtc@51 {
  137. compatible = "nxp,pcf85263";
  138. reg = <0x51>;
  139. };
  140. versaclock5: versaclock_som@6a {
  141. compatible = "idt,5p49v6965";
  142. reg = <0x6a>;
  143. #clock-cells = <1>;
  144. clocks = <&x304_clk>;
  145. clock-names = "xin";
  146. /* du_dotclkin0, du_dotclkin2, usb_extal, avb_txcrefclk */
  147. assigned-clocks = <&versaclock5 1>,
  148. <&versaclock5 2>,
  149. <&versaclock5 3>,
  150. <&versaclock5 4>;
  151. assigned-clock-rates = <33333333>, <33333333>, <50000000>, <125000000>;
  152. };
  153. };
  154. &pfc {
  155. pinctrl-0 = <&scif_clk_pins>;
  156. pinctrl-names = "default";
  157. avb_pins: avb {
  158. mux {
  159. groups = "avb_link", "avb_mdio", "avb_mii";
  160. function = "avb";
  161. };
  162. pins_mdio {
  163. groups = "avb_mdio";
  164. drive-strength = <24>;
  165. };
  166. pins_mii_tx {
  167. pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
  168. "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
  169. drive-strength = <12>;
  170. };
  171. };
  172. scif2_pins: scif2 {
  173. groups = "scif2_data_a";
  174. function = "scif2";
  175. };
  176. hscif0_pins: hscif0 {
  177. groups = "hscif0_data", "hscif0_ctrl";
  178. function = "hscif0";
  179. };
  180. hscif1_pins: hscif1 {
  181. groups = "hscif1_data_a", "hscif1_ctrl_a";
  182. function = "hscif1";
  183. };
  184. hscif2_pins: hscif2 {
  185. groups = "hscif2_data_a";
  186. function = "hscif2";
  187. };
  188. scif0_pins: scif0 {
  189. groups = "scif0_data";
  190. function = "scif0";
  191. };
  192. scif5_pins: scif5 {
  193. groups = "scif5_data_a";
  194. function = "scif5";
  195. };
  196. scif_clk_pins: scif_clk {
  197. groups = "scif_clk_a";
  198. function = "scif_clk";
  199. };
  200. i2c0_pins: i2c0 {
  201. groups = "i2c0";
  202. function = "i2c0";
  203. };
  204. sdhi2_pins: sd2 {
  205. groups = "sdhi2_data4", "sdhi2_ctrl";
  206. function = "sdhi2";
  207. power-source = <1800>;
  208. };
  209. sdhi3_pins: sd3 {
  210. groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
  211. function = "sdhi3";
  212. power-source = <1800>;
  213. };
  214. };
  215. &scif_clk {
  216. clock-frequency = <14745600>;
  217. };
  218. &scif2 {
  219. pinctrl-0 = <&scif2_pins>;
  220. pinctrl-names = "default";
  221. status = "okay";
  222. };
  223. &sdhi2 {
  224. pinctrl-names = "default";
  225. pinctrl-0 = <&sdhi2_pins>;
  226. bus-width = <4>;
  227. vmmc-supply = <&reg_3p3v>;
  228. vqmmc-supply = <&reg_1p8v>;
  229. non-removable;
  230. cap-power-off-card;
  231. pm-ignore-notify;
  232. keep-power-in-suspend;
  233. mmc-pwrseq = <&wlan_pwrseq>;
  234. status = "okay";
  235. #address-cells = <1>;
  236. #size-cells = <0>;
  237. brcmf: bcrmf@1 {
  238. reg = <1>;
  239. compatible = "brcm,bcm4329-fmac";
  240. interrupt-parent = <&gpio1>;
  241. interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
  242. interrupt-names = "host-wake";
  243. };
  244. };
  245. &sdhi3 {
  246. pinctrl-0 = <&sdhi3_pins>;
  247. pinctrl-1 = <&sdhi3_pins>;
  248. pinctrl-names = "default", "state_uhs";
  249. vmmc-supply = <&reg_3p3v>;
  250. vqmmc-supply = <&reg_1p8v>;
  251. bus-width = <8>;
  252. mmc-hs200-1_8v;
  253. non-removable;
  254. fixed-emmc-driver-type = <1>;
  255. status = "okay";
  256. };
  257. &usb_extal_clk {
  258. clock-frequency = <50000000>;
  259. };
  260. &usb3s0_clk {
  261. clock-frequency = <100000000>;
  262. };
  263. &vspb {
  264. status = "okay";
  265. };
  266. &vspi0 {
  267. status = "okay";
  268. };