Makefile.build 14 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. # ==========================================================================
  3. # Building
  4. # ==========================================================================
  5. # Modified for U-Boot
  6. prefix := tpl
  7. src := $(patsubst $(prefix)/%,%,$(obj))
  8. ifeq ($(obj),$(src))
  9. prefix := spl
  10. src := $(patsubst $(prefix)/%,%,$(obj))
  11. ifeq ($(obj),$(src))
  12. prefix := .
  13. endif
  14. endif
  15. PHONY := __build
  16. __build:
  17. # Init all relevant variables used in kbuild files so
  18. # 1) they have correct type
  19. # 2) they do not inherit any value from the environment
  20. obj-y :=
  21. obj-m :=
  22. lib-y :=
  23. lib-m :=
  24. always :=
  25. targets :=
  26. subdir-y :=
  27. subdir-m :=
  28. EXTRA_AFLAGS :=
  29. EXTRA_CFLAGS :=
  30. EXTRA_CPPFLAGS :=
  31. EXTRA_LDFLAGS :=
  32. asflags-y :=
  33. ccflags-y :=
  34. cppflags-y :=
  35. ldflags-y :=
  36. subdir-asflags-y :=
  37. subdir-ccflags-y :=
  38. # Read auto.conf if it exists, otherwise ignore
  39. # Modified for U-Boot
  40. -include include/config/auto.conf
  41. -include $(prefix)/include/autoconf.mk
  42. include scripts/Makefile.uncmd_spl
  43. include scripts/Kbuild.include
  44. # For backward compatibility check that these variables do not change
  45. save-cflags := $(CFLAGS)
  46. # The filename Kbuild has precedence over Makefile
  47. kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
  48. kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
  49. include $(kbuild-file)
  50. # Added for U-Boot
  51. asflags-y += $(PLATFORM_CPPFLAGS)
  52. ccflags-y += $(PLATFORM_CPPFLAGS)
  53. cppflags-y += $(PLATFORM_CPPFLAGS)
  54. # If the save-* variables changed error out
  55. ifeq ($(KBUILD_NOPEDANTIC),)
  56. ifneq ("$(save-cflags)","$(CFLAGS)")
  57. $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use ccflags-y)
  58. endif
  59. endif
  60. include scripts/Makefile.lib
  61. # Do not include host rules unless needed
  62. ifneq ($(hostprogs-y)$(hostprogs-m)$(hostlibs-y)$(hostlibs-m)$(hostcxxlibs-y)$(hostcxxlibs-m),)
  63. include scripts/Makefile.host
  64. endif
  65. # Uncommented for U-Boot
  66. # We need to create output dicrectory for SPL and TPL even for in-tree build
  67. #ifneq ($(KBUILD_SRC),)
  68. # Create output directory if not already present
  69. _dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
  70. # Create directories for object files if directory does not exist
  71. # Needed when obj-y := dir/file.o syntax is used
  72. _dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
  73. #endif
  74. ifndef obj
  75. $(warning kbuild: Makefile.build is included improperly)
  76. endif
  77. # ===========================================================================
  78. ifneq ($(strip $(lib-y) $(lib-m) $(lib-)),)
  79. lib-target := $(obj)/lib.a
  80. endif
  81. ifneq ($(strip $(obj-y) $(obj-m) $(obj-) $(subdir-m) $(lib-target)),)
  82. builtin-target := $(obj)/built-in.o
  83. endif
  84. modorder-target := $(obj)/modules.order
  85. # We keep a list of all modules in $(MODVERDIR)
  86. __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
  87. $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
  88. $(subdir-ym) $(always)
  89. @:
  90. # Linus' kernel sanity checking tool
  91. ifneq ($(KBUILD_CHECKSRC),0)
  92. ifeq ($(KBUILD_CHECKSRC),2)
  93. quiet_cmd_force_checksrc = CHECK $<
  94. cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  95. else
  96. quiet_cmd_checksrc = CHECK $<
  97. cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  98. endif
  99. endif
  100. # Do section mismatch analysis for each module/built-in.o
  101. ifdef CONFIG_DEBUG_SECTION_MISMATCH
  102. cmd_secanalysis = ; scripts/mod/modpost $@
  103. endif
  104. # Compile C sources (.c)
  105. # ---------------------------------------------------------------------------
  106. # Default is built-in, unless we know otherwise
  107. modkern_cflags = \
  108. $(if $(part-of-module), \
  109. $(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
  110. $(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
  111. quiet_modtag := $(empty) $(empty)
  112. $(real-objs-m) : part-of-module := y
  113. $(real-objs-m:.o=.i) : part-of-module := y
  114. $(real-objs-m:.o=.s) : part-of-module := y
  115. $(real-objs-m:.o=.lst): part-of-module := y
  116. $(real-objs-m) : quiet_modtag := [M]
  117. $(real-objs-m:.o=.i) : quiet_modtag := [M]
  118. $(real-objs-m:.o=.s) : quiet_modtag := [M]
  119. $(real-objs-m:.o=.lst): quiet_modtag := [M]
  120. $(obj-m) : quiet_modtag := [M]
  121. # Default for not multi-part modules
  122. modname = $(basetarget)
  123. $(multi-objs-m) : modname = $(modname-multi)
  124. $(multi-objs-m:.o=.i) : modname = $(modname-multi)
  125. $(multi-objs-m:.o=.s) : modname = $(modname-multi)
  126. $(multi-objs-m:.o=.lst) : modname = $(modname-multi)
  127. $(multi-objs-y) : modname = $(modname-multi)
  128. $(multi-objs-y:.o=.i) : modname = $(modname-multi)
  129. $(multi-objs-y:.o=.s) : modname = $(modname-multi)
  130. $(multi-objs-y:.o=.lst) : modname = $(modname-multi)
  131. quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
  132. cmd_cc_s_c = $(CC) $(c_flags) $(DISABLE_LTO) -fverbose-asm -S -o $@ $<
  133. $(obj)/%.s: $(src)/%.c FORCE
  134. $(call if_changed_dep,cc_s_c)
  135. quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
  136. cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
  137. $(obj)/%.i: $(src)/%.c FORCE
  138. $(call if_changed_dep,cc_i_c)
  139. cmd_gensymtypes = \
  140. $(CPP) -D__GENKSYMS__ $(c_flags) $< | \
  141. $(GENKSYMS) $(if $(1), -T $(2)) \
  142. $(if $(KBUILD_PRESERVE),-p) \
  143. -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
  144. quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
  145. cmd_cc_symtypes_c = \
  146. set -e; \
  147. $(call cmd_gensymtypes,true,$@) >/dev/null; \
  148. test -s $@ || rm -f $@
  149. $(obj)/%.symtypes : $(src)/%.c FORCE
  150. $(call cmd,cc_symtypes_c)
  151. # C (.c) files
  152. # The C file is compiled and updated dependency information is generated.
  153. # (See cmd_cc_o_c + relevant part of rule_cc_o_c)
  154. quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
  155. ifndef CONFIG_MODVERSIONS
  156. cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
  157. else
  158. # When module versioning is enabled the following steps are executed:
  159. # o compile a .tmp_<file>.o from <file>.c
  160. # o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
  161. # not export symbols, we just rename .tmp_<file>.o to <file>.o and
  162. # are done.
  163. # o otherwise, we calculate symbol versions using the good old
  164. # genksyms on the preprocessed source and postprocess them in a way
  165. # that they are usable as a linker script
  166. # o generate <file>.o from .tmp_<file>.o using the linker to
  167. # replace the unresolved symbols __crc_exported_symbol with
  168. # the actual value of the checksum generated by genksyms
  169. cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
  170. cmd_modversions = \
  171. if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
  172. $(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
  173. > $(@D)/.tmp_$(@F:.o=.ver); \
  174. \
  175. $(LD) $(KBUILD_LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
  176. -T $(@D)/.tmp_$(@F:.o=.ver); \
  177. rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
  178. else \
  179. mv -f $(@D)/.tmp_$(@F) $@; \
  180. fi;
  181. endif
  182. ifdef CONFIG_FTRACE_MCOUNT_RECORD
  183. # gcc 5 supports generating the mcount tables directly
  184. ifneq ($(call cc-option,-mrecord-mcount,y),y)
  185. KBUILD_CFLAGS += -mrecord-mcount
  186. else
  187. # else do it all manually
  188. ifdef BUILD_C_RECORDMCOUNT
  189. ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
  190. RECORDMCOUNT_FLAGS = -w
  191. endif
  192. # Due to recursion, we must skip empty.o.
  193. # The empty.o file is created in the make process in order to determine
  194. # the target endianness and word size. It is made before all other C
  195. # files, including recordmcount.
  196. sub_cmd_record_mcount = \
  197. if [ $(@) != "scripts/mod/empty.o" ]; then \
  198. $(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)"; \
  199. fi;
  200. recordmcount_source := $(srctree)/scripts/recordmcount.c \
  201. $(srctree)/scripts/recordmcount.h
  202. else
  203. sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
  204. "$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
  205. "$(if $(CONFIG_64BIT),64,32)" \
  206. "$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS)" \
  207. "$(LD) $(KBUILD_LDFLAGS)" "$(NM)" "$(RM)" "$(MV)" \
  208. "$(if $(part-of-module),1,0)" "$(@)";
  209. recordmcount_source := $(srctree)/scripts/recordmcount.pl
  210. endif
  211. cmd_record_mcount = \
  212. if [ "$(findstring $(CC_FLAGS_FTRACE),$(_c_flags))" = \
  213. "$(CC_FLAGS_FTRACE)" ]; then \
  214. $(sub_cmd_record_mcount) \
  215. fi;
  216. endif # -record-mcount
  217. endif
  218. define rule_cc_o_c
  219. $(call echo-cmd,checksrc) $(cmd_checksrc) \
  220. $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
  221. $(cmd_modversions) \
  222. $(call echo-cmd,record_mcount) \
  223. $(cmd_record_mcount) \
  224. scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
  225. $(dot-target).tmp; \
  226. rm -f $(depfile); \
  227. mv -f $(dot-target).tmp $(dot-target).cmd
  228. endef
  229. # Built-in and composite module parts
  230. $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
  231. $(call cmd,force_checksrc)
  232. $(call if_changed_rule,cc_o_c)
  233. # Single-part modules are special since we need to mark them in $(MODVERDIR)
  234. $(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
  235. $(call cmd,force_checksrc)
  236. $(call if_changed_rule,cc_o_c)
  237. @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
  238. quiet_cmd_cc_lst_c = MKLST $@
  239. cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
  240. $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
  241. System.map $(OBJDUMP) > $@
  242. $(obj)/%.lst: $(src)/%.c FORCE
  243. $(call if_changed_dep,cc_lst_c)
  244. # Compile assembler sources (.S)
  245. # ---------------------------------------------------------------------------
  246. modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
  247. $(real-objs-m) : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
  248. $(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
  249. quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
  250. cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
  251. $(obj)/%.s: $(src)/%.S FORCE
  252. $(call if_changed_dep,as_s_S)
  253. quiet_cmd_as_o_S = AS $(quiet_modtag) $@
  254. cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
  255. $(obj)/%.o: $(src)/%.S FORCE
  256. $(call if_changed_dep,as_o_S)
  257. targets += $(real-objs-y) $(real-objs-m) $(lib-y)
  258. targets += $(extra-y) $(MAKECMDGOALS) $(always)
  259. # Linker scripts preprocessor (.lds.S -> .lds)
  260. # ---------------------------------------------------------------------------
  261. quiet_cmd_cpp_lds_S = LDS $@
  262. cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
  263. -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
  264. $(obj)/%.lds: $(src)/%.lds.S FORCE
  265. $(call if_changed_dep,cpp_lds_S)
  266. # ASN.1 grammar
  267. # ---------------------------------------------------------------------------
  268. quiet_cmd_asn1_compiler = ASN.1 $@
  269. cmd_asn1_compiler = $(objtree)/tools/asn1_compiler $< \
  270. $(subst .h,.c,$@) $(subst .c,.h,$@)
  271. $(obj)/%.asn1.c $(obj)/%.asn1.h: $(src)/%.asn1 $(objtree)/tools/asn1_compiler
  272. $(call cmd,asn1_compiler)
  273. # Build the compiled-in targets
  274. # ---------------------------------------------------------------------------
  275. # To build objects in subdirs, we need to descend into the directories
  276. $(sort $(subdir-obj-y)): $(subdir-ym) ;
  277. #
  278. # Rule to compile a set of .o files into one .o file
  279. #
  280. ifdef builtin-target
  281. quiet_cmd_link_o_target = LD $@
  282. # If the list of objects to link is empty, just create an empty built-in.o
  283. cmd_link_o_target = $(if $(strip $(obj-y)),\
  284. $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
  285. $(cmd_secanalysis),\
  286. rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@)
  287. $(builtin-target): $(obj-y) FORCE
  288. $(call if_changed,link_o_target)
  289. targets += $(builtin-target)
  290. endif # builtin-target
  291. #
  292. # Rule to create modules.order file
  293. #
  294. # Create commands to either record .ko file or cat modules.order from
  295. # a subdirectory
  296. modorder-cmds = \
  297. $(foreach m, $(modorder), \
  298. $(if $(filter %/modules.order, $m), \
  299. cat $m;, echo kernel/$m;))
  300. $(modorder-target): $(subdir-ym) FORCE
  301. $(Q)(cat /dev/null; $(modorder-cmds)) > $@
  302. #
  303. # Rule to compile a set of .o files into one .a file
  304. #
  305. ifdef lib-target
  306. quiet_cmd_link_l_target = AR $@
  307. cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y)
  308. $(lib-target): $(lib-y) FORCE
  309. $(call if_changed,link_l_target)
  310. targets += $(lib-target)
  311. endif
  312. #
  313. # Rule to link composite objects
  314. #
  315. # Composite objects are specified in kbuild makefile as follows:
  316. # <composite-object>-objs := <list of .o files>
  317. # or
  318. # <composite-object>-y := <list of .o files>
  319. link_multi_deps = \
  320. $(filter $(addprefix $(obj)/, \
  321. $($(subst $(obj)/,,$(@:.o=-objs))) \
  322. $($(subst $(obj)/,,$(@:.o=-y)))), $^)
  323. quiet_cmd_link_multi-y = LD $@
  324. cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
  325. quiet_cmd_link_multi-m = LD [M] $@
  326. cmd_link_multi-m = $(cmd_link_multi-y)
  327. $(multi-used-y): FORCE
  328. $(call if_changed,link_multi-y)
  329. $(call multi_depend, $(multi-used-y), .o, -objs -y)
  330. $(multi-used-m): FORCE
  331. $(call if_changed,link_multi-m)
  332. @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
  333. $(call multi_depend, $(multi-used-m), .o, -objs -y)
  334. targets += $(multi-used-y) $(multi-used-m)
  335. # Add intermediate targets:
  336. # When building objects with specific suffix patterns, add intermediate
  337. # targets that the final targets are derived from.
  338. intermediate_targets = $(foreach sfx, $(2), \
  339. $(patsubst %$(strip $(1)),%$(sfx), \
  340. $(filter %$(strip $(1)), $(targets))))
  341. # %.lex.o <- %.lex.c <- %.l
  342. # %.tab.o <- %.tab.[ch] <- %.y
  343. targets += $(call intermediate_targets, .lex.o, .lex.c) \
  344. $(call intermediate_targets, .tab.o, .tab.c .tab.h)
  345. # Descending
  346. # ---------------------------------------------------------------------------
  347. PHONY += $(subdir-ym)
  348. $(subdir-ym):
  349. $(Q)$(MAKE) $(build)=$@
  350. # Add FORCE to the prequisites of a target to force it to be always rebuilt.
  351. # ---------------------------------------------------------------------------
  352. PHONY += FORCE
  353. FORCE:
  354. # Read all saved command lines and dependencies for the $(targets) we
  355. # may be building above, using $(if_changed{,_dep}). As an
  356. # optimization, we don't need to read them if the target does not
  357. # exist, we will rebuild anyway in that case.
  358. targets := $(wildcard $(sort $(targets)))
  359. cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
  360. ifneq ($(cmd_files),)
  361. include $(cmd_files)
  362. endif
  363. .PHONY: $(PHONY)