Kconfig 47 KB

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  1. menu "ARM architecture"
  2. depends on ARM
  3. config SYS_ARCH
  4. default "arm"
  5. config ARM64
  6. bool
  7. select PHYS_64BIT
  8. select SYS_CACHE_SHIFT_6
  9. if ARM64
  10. config POSITION_INDEPENDENT
  11. bool "Generate position-independent pre-relocation code"
  12. select INIT_SP_RELATIVE
  13. help
  14. U-Boot expects to be linked to a specific hard-coded address, and to
  15. be loaded to and run from that address. This option lifts that
  16. restriction, thus allowing the code to be loaded to and executed
  17. from almost any address. This logic relies on the relocation
  18. information that is embedded in the binary to support U-Boot
  19. relocating itself to the top-of-RAM later during execution.
  20. config INIT_SP_RELATIVE
  21. bool "Specify the early stack pointer relative to the .bss section"
  22. help
  23. U-Boot typically uses a hard-coded value for the stack pointer
  24. before relocation. Enable this option to instead calculate the
  25. initial SP at run-time. This is useful to avoid hard-coding addresses
  26. into U-Boot, so that it can be loaded and executed at arbitrary
  27. addresses and thus avoid using arbitrary addresses at runtime.
  28. If this option is enabled, the early stack pointer is set to
  29. &_bss_start with a offset value added. The offset is specified by
  30. SYS_INIT_SP_BSS_OFFSET.
  31. config SYS_INIT_SP_BSS_OFFSET
  32. int "Early stack offset from the .bss base address"
  33. depends on INIT_SP_RELATIVE
  34. default 524288
  35. help
  36. This option's value is the offset added to &_bss_start in order to
  37. calculate the stack pointer. This offset should be large enough so
  38. that the early malloc region, global data (gd), and early stack usage
  39. do not overlap any appended DTB.
  40. config LINUX_KERNEL_IMAGE_HEADER
  41. bool
  42. help
  43. Place a Linux kernel image header at the start of the U-Boot binary.
  44. The format of the header is described in the Linux kernel source at
  45. Documentation/arm64/booting.txt. This feature is useful since the
  46. image header reports the amount of memory (BSS and similar) that
  47. U-Boot needs to use, but which isn't part of the binary.
  48. if LINUX_KERNEL_IMAGE_HEADER
  49. config LNX_KRNL_IMG_TEXT_OFFSET_BASE
  50. hex
  51. help
  52. The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
  53. TEXT_OFFSET value written to the Linux kernel image header.
  54. endif
  55. endif
  56. config GIC_V3_ITS
  57. bool "ARM GICV3 ITS"
  58. select REGMAP
  59. select SYSCON
  60. help
  61. ARM GICV3 Interrupt translation service (ITS).
  62. Basic support for programming locality specific peripheral
  63. interrupts (LPI) configuration tables and enable LPI tables.
  64. LPI configuration table can be used by u-boot or Linux.
  65. ARM GICV3 has limitation, once the LPI table is enabled, LPI
  66. configuration table can not be re-programmed, unless GICV3 reset.
  67. config STATIC_RELA
  68. bool
  69. default y if ARM64 && !POSITION_INDEPENDENT
  70. config DMA_ADDR_T_64BIT
  71. bool
  72. default y if ARM64
  73. config HAS_VBAR
  74. bool
  75. config HAS_THUMB2
  76. bool
  77. # Used for compatibility with asm files copied from the kernel
  78. config ARM_ASM_UNIFIED
  79. bool
  80. default y
  81. # Used for compatibility with asm files copied from the kernel
  82. config THUMB2_KERNEL
  83. bool
  84. config SYS_ICACHE_OFF
  85. bool "Do not enable icache"
  86. default n
  87. help
  88. Do not enable instruction cache in U-Boot.
  89. config SPL_SYS_ICACHE_OFF
  90. bool "Do not enable icache in SPL"
  91. depends on SPL
  92. default SYS_ICACHE_OFF
  93. help
  94. Do not enable instruction cache in SPL.
  95. config SYS_DCACHE_OFF
  96. bool "Do not enable dcache"
  97. default n
  98. help
  99. Do not enable data cache in U-Boot.
  100. config SPL_SYS_DCACHE_OFF
  101. bool "Do not enable dcache in SPL"
  102. depends on SPL
  103. default SYS_DCACHE_OFF
  104. help
  105. Do not enable data cache in SPL.
  106. config SYS_ARM_CACHE_CP15
  107. bool "CP15 based cache enabling support"
  108. help
  109. Select this if your processor suports enabling caches by using
  110. CP15 registers.
  111. config SYS_ARM_MMU
  112. bool "MMU-based Paged Memory Management Support"
  113. select SYS_ARM_CACHE_CP15
  114. help
  115. Select if you want MMU-based virtualised addressing space
  116. support via paged memory management.
  117. config SYS_ARM_MPU
  118. bool 'Use the ARM v7 PMSA Compliant MPU'
  119. help
  120. Some ARM systems without an MMU have instead a Memory Protection
  121. Unit (MPU) that defines the type and permissions for regions of
  122. memory.
  123. If your CPU has an MPU then you should choose 'y' here unless you
  124. know that you do not want to use the MPU.
  125. # If set, the workarounds for these ARM errata are applied early during U-Boot
  126. # startup. Note that in general these options force the workarounds to be
  127. # applied; no CPU-type/version detection exists, unlike the similar options in
  128. # the Linux kernel. Do not set these options unless they apply! Also note that
  129. # the following can be machine-specific errata. These do have ability to
  130. # provide rudimentary version and machine-specific checks, but expect no
  131. # product checks:
  132. # CONFIG_ARM_ERRATA_430973
  133. # CONFIG_ARM_ERRATA_454179
  134. # CONFIG_ARM_ERRATA_621766
  135. # CONFIG_ARM_ERRATA_798870
  136. # CONFIG_ARM_ERRATA_801819
  137. # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
  138. # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
  139. config ARM_ERRATA_430973
  140. bool
  141. config ARM_ERRATA_454179
  142. bool
  143. config ARM_ERRATA_621766
  144. bool
  145. config ARM_ERRATA_716044
  146. bool
  147. config ARM_ERRATA_725233
  148. bool
  149. config ARM_ERRATA_742230
  150. bool
  151. config ARM_ERRATA_743622
  152. bool
  153. config ARM_ERRATA_751472
  154. bool
  155. config ARM_ERRATA_761320
  156. bool
  157. config ARM_ERRATA_773022
  158. bool
  159. config ARM_ERRATA_774769
  160. bool
  161. config ARM_ERRATA_794072
  162. bool
  163. config ARM_ERRATA_798870
  164. bool
  165. config ARM_ERRATA_801819
  166. bool
  167. config ARM_ERRATA_826974
  168. bool
  169. config ARM_ERRATA_828024
  170. bool
  171. config ARM_ERRATA_829520
  172. bool
  173. config ARM_ERRATA_833069
  174. bool
  175. config ARM_ERRATA_833471
  176. bool
  177. config ARM_ERRATA_845369
  178. bool
  179. config ARM_ERRATA_852421
  180. bool
  181. config ARM_ERRATA_852423
  182. bool
  183. config ARM_ERRATA_855873
  184. bool
  185. config ARM_CORTEX_A8_CVE_2017_5715
  186. bool
  187. config ARM_CORTEX_A15_CVE_2017_5715
  188. bool
  189. config CPU_ARM720T
  190. bool
  191. select SYS_CACHE_SHIFT_5
  192. imply SYS_ARM_MMU
  193. config CPU_ARM920T
  194. bool
  195. select SYS_CACHE_SHIFT_5
  196. imply SYS_ARM_MMU
  197. config CPU_ARM926EJS
  198. bool
  199. select SYS_CACHE_SHIFT_5
  200. imply SYS_ARM_MMU
  201. config CPU_ARM946ES
  202. bool
  203. select SYS_CACHE_SHIFT_5
  204. imply SYS_ARM_MMU
  205. config CPU_ARM1136
  206. bool
  207. select SYS_CACHE_SHIFT_5
  208. imply SYS_ARM_MMU
  209. config CPU_ARM1176
  210. bool
  211. select HAS_VBAR
  212. select SYS_CACHE_SHIFT_5
  213. imply SYS_ARM_MMU
  214. config CPU_V7A
  215. bool
  216. select HAS_THUMB2
  217. select HAS_VBAR
  218. select SYS_CACHE_SHIFT_6
  219. imply SYS_ARM_MMU
  220. config CPU_V7M
  221. bool
  222. select HAS_THUMB2
  223. select SYS_ARM_MPU
  224. select SYS_CACHE_SHIFT_5
  225. select SYS_THUMB_BUILD
  226. select THUMB2_KERNEL
  227. config CPU_V7R
  228. bool
  229. select HAS_THUMB2
  230. select SYS_ARM_CACHE_CP15
  231. select SYS_ARM_MPU
  232. select SYS_CACHE_SHIFT_6
  233. config CPU_PXA
  234. bool
  235. select SYS_CACHE_SHIFT_5
  236. imply SYS_ARM_MMU
  237. config CPU_SA1100
  238. bool
  239. select SYS_CACHE_SHIFT_5
  240. imply SYS_ARM_MMU
  241. config SYS_CPU
  242. default "arm720t" if CPU_ARM720T
  243. default "arm920t" if CPU_ARM920T
  244. default "arm926ejs" if CPU_ARM926EJS
  245. default "arm946es" if CPU_ARM946ES
  246. default "arm1136" if CPU_ARM1136
  247. default "arm1176" if CPU_ARM1176
  248. default "armv7" if CPU_V7A
  249. default "armv7" if CPU_V7R
  250. default "armv7m" if CPU_V7M
  251. default "pxa" if CPU_PXA
  252. default "sa1100" if CPU_SA1100
  253. default "armv8" if ARM64
  254. config SYS_ARM_ARCH
  255. int
  256. default 4 if CPU_ARM720T
  257. default 4 if CPU_ARM920T
  258. default 5 if CPU_ARM926EJS
  259. default 5 if CPU_ARM946ES
  260. default 6 if CPU_ARM1136
  261. default 6 if CPU_ARM1176
  262. default 7 if CPU_V7A
  263. default 7 if CPU_V7M
  264. default 7 if CPU_V7R
  265. default 5 if CPU_PXA
  266. default 4 if CPU_SA1100
  267. default 8 if ARM64
  268. config SYS_CACHE_SHIFT_5
  269. bool
  270. config SYS_CACHE_SHIFT_6
  271. bool
  272. config SYS_CACHE_SHIFT_7
  273. bool
  274. config SYS_CACHELINE_SIZE
  275. int
  276. default 128 if SYS_CACHE_SHIFT_7
  277. default 64 if SYS_CACHE_SHIFT_6
  278. default 32 if SYS_CACHE_SHIFT_5
  279. choice
  280. prompt "Select the ARM data write cache policy"
  281. default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
  282. TARGET_BCMNSP || CPU_PXA || RZA1
  283. default SYS_ARM_CACHE_WRITEBACK
  284. config SYS_ARM_CACHE_WRITEBACK
  285. bool "Write-back (WB)"
  286. help
  287. A write updates the cache only and marks the cache line as dirty.
  288. External memory is updated only when the line is evicted or explicitly
  289. cleaned.
  290. config SYS_ARM_CACHE_WRITETHROUGH
  291. bool "Write-through (WT)"
  292. help
  293. A write updates both the cache and the external memory system.
  294. This does not mark the cache line as dirty.
  295. config SYS_ARM_CACHE_WRITEALLOC
  296. bool "Write allocation (WA)"
  297. help
  298. A cache line is allocated on a write miss. This means that executing a
  299. store instruction on the processor might cause a burst read to occur.
  300. There is a linefill to obtain the data for the cache line, before the
  301. write is performed.
  302. endchoice
  303. config ARCH_CPU_INIT
  304. bool "Enable ARCH_CPU_INIT"
  305. help
  306. Some architectures require a call to arch_cpu_init().
  307. Say Y here to enable it
  308. config SYS_ARCH_TIMER
  309. bool "ARM Generic Timer support"
  310. depends on CPU_V7A || ARM64
  311. default y if ARM64
  312. help
  313. The ARM Generic Timer (aka arch-timer) provides an architected
  314. interface to a timer source on an SoC.
  315. It is mandatory for ARMv8 implementation and widely available
  316. on ARMv7 systems.
  317. config ARM_SMCCC
  318. bool "Support for ARM SMC Calling Convention (SMCCC)"
  319. depends on CPU_V7A || ARM64
  320. select ARM_PSCI_FW
  321. help
  322. Say Y here if you want to enable ARM SMC Calling Convention.
  323. This should be enabled if U-Boot needs to communicate with system
  324. firmware (for example, PSCI) according to SMCCC.
  325. config SEMIHOSTING
  326. bool "support boot from semihosting"
  327. help
  328. In emulated environments, semihosting is a way for
  329. the hosted environment to call out to the emulator to
  330. retrieve files from the host machine.
  331. config SYS_THUMB_BUILD
  332. bool "Build U-Boot using the Thumb instruction set"
  333. depends on !ARM64
  334. help
  335. Use this flag to build U-Boot using the Thumb instruction set for
  336. ARM architectures. Thumb instruction set provides better code
  337. density. For ARM architectures that support Thumb2 this flag will
  338. result in Thumb2 code generated by GCC.
  339. config SPL_SYS_THUMB_BUILD
  340. bool "Build SPL using the Thumb instruction set"
  341. default y if SYS_THUMB_BUILD
  342. depends on !ARM64 && SPL
  343. help
  344. Use this flag to build SPL using the Thumb instruction set for
  345. ARM architectures. Thumb instruction set provides better code
  346. density. For ARM architectures that support Thumb2 this flag will
  347. result in Thumb2 code generated by GCC.
  348. config TPL_SYS_THUMB_BUILD
  349. bool "Build TPL using the Thumb instruction set"
  350. default y if SYS_THUMB_BUILD
  351. depends on TPL && !ARM64
  352. help
  353. Use this flag to build TPL using the Thumb instruction set for
  354. ARM architectures. Thumb instruction set provides better code
  355. density. For ARM architectures that support Thumb2 this flag will
  356. result in Thumb2 code generated by GCC.
  357. config SYS_L2CACHE_OFF
  358. bool "L2cache off"
  359. help
  360. If SoC does not support L2CACHE or one does not want to enable
  361. L2CACHE, choose this option.
  362. config ENABLE_ARM_SOC_BOOT0_HOOK
  363. bool "prepare BOOT0 header"
  364. help
  365. If the SoC's BOOT0 requires a header area filled with (magic)
  366. values, then choose this option, and create a file included as
  367. <asm/arch/boot0.h> which contains the required assembler code.
  368. config ARM_CORTEX_CPU_IS_UP
  369. bool
  370. default n
  371. config USE_ARCH_MEMCPY
  372. bool "Use an assembly optimized implementation of memcpy"
  373. default y
  374. depends on !ARM64
  375. help
  376. Enable the generation of an optimized version of memcpy.
  377. Such an implementation may be faster under some conditions
  378. but may increase the binary size.
  379. config SPL_USE_ARCH_MEMCPY
  380. bool "Use an assembly optimized implementation of memcpy for SPL"
  381. default y if USE_ARCH_MEMCPY
  382. depends on !ARM64 && SPL
  383. help
  384. Enable the generation of an optimized version of memcpy.
  385. Such an implementation may be faster under some conditions
  386. but may increase the binary size.
  387. config TPL_USE_ARCH_MEMCPY
  388. bool "Use an assembly optimized implementation of memcpy for TPL"
  389. default y if USE_ARCH_MEMCPY
  390. depends on !ARM64 && TPL
  391. help
  392. Enable the generation of an optimized version of memcpy.
  393. Such an implementation may be faster under some conditions
  394. but may increase the binary size.
  395. config USE_ARCH_MEMSET
  396. bool "Use an assembly optimized implementation of memset"
  397. default y
  398. depends on !ARM64
  399. help
  400. Enable the generation of an optimized version of memset.
  401. Such an implementation may be faster under some conditions
  402. but may increase the binary size.
  403. config SPL_USE_ARCH_MEMSET
  404. bool "Use an assembly optimized implementation of memset for SPL"
  405. default y if USE_ARCH_MEMSET
  406. depends on !ARM64 && SPL
  407. help
  408. Enable the generation of an optimized version of memset.
  409. Such an implementation may be faster under some conditions
  410. but may increase the binary size.
  411. config TPL_USE_ARCH_MEMSET
  412. bool "Use an assembly optimized implementation of memset for TPL"
  413. default y if USE_ARCH_MEMSET
  414. depends on !ARM64 && TPL
  415. help
  416. Enable the generation of an optimized version of memset.
  417. Such an implementation may be faster under some conditions
  418. but may increase the binary size.
  419. config ARM64_SUPPORT_AARCH32
  420. bool "ARM64 system support AArch32 execution state"
  421. depends on ARM64
  422. default y if !TARGET_THUNDERX_88XX
  423. help
  424. This ARM64 system supports AArch32 execution state.
  425. choice
  426. prompt "Target select"
  427. default TARGET_HIKEY
  428. config ARCH_AT91
  429. bool "Atmel AT91"
  430. select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
  431. select SPL_SEPARATE_BSS if SPL
  432. config TARGET_EDB93XX
  433. bool "Support edb93xx"
  434. select CPU_ARM920T
  435. select PL010_SERIAL
  436. config TARGET_ASPENITE
  437. bool "Support aspenite"
  438. select CPU_ARM926EJS
  439. config TARGET_GPLUGD
  440. bool "Support gplugd"
  441. select CPU_ARM926EJS
  442. config ARCH_DAVINCI
  443. bool "TI DaVinci"
  444. select CPU_ARM926EJS
  445. select SPL_DM_SPI if SPL
  446. imply CMD_SAVES
  447. help
  448. Support for TI's DaVinci platform.
  449. config ARCH_KIRKWOOD
  450. bool "Marvell Kirkwood"
  451. select ARCH_MISC_INIT
  452. select BOARD_EARLY_INIT_F
  453. select CPU_ARM926EJS
  454. config ARCH_MVEBU
  455. bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
  456. select DM
  457. select DM_ETH
  458. select DM_SERIAL
  459. select DM_SPI
  460. select DM_SPI_FLASH
  461. select SPL_DM_SPI if SPL
  462. select SPL_DM_SPI_FLASH if SPL
  463. select OF_CONTROL
  464. select OF_SEPARATE
  465. select SPI
  466. imply CMD_DM
  467. config TARGET_APF27
  468. bool "Support apf27"
  469. select CPU_ARM926EJS
  470. select SUPPORT_SPL
  471. config ARCH_ORION5X
  472. bool "Marvell Orion"
  473. select CPU_ARM926EJS
  474. config TARGET_SPEAR300
  475. bool "Support spear300"
  476. select BOARD_EARLY_INIT_F
  477. select CPU_ARM926EJS
  478. select PL011_SERIAL
  479. imply CMD_SAVES
  480. config TARGET_SPEAR310
  481. bool "Support spear310"
  482. select BOARD_EARLY_INIT_F
  483. select CPU_ARM926EJS
  484. select PL011_SERIAL
  485. imply CMD_SAVES
  486. config TARGET_SPEAR320
  487. bool "Support spear320"
  488. select BOARD_EARLY_INIT_F
  489. select CPU_ARM926EJS
  490. select PL011_SERIAL
  491. imply CMD_SAVES
  492. config TARGET_SPEAR600
  493. bool "Support spear600"
  494. select BOARD_EARLY_INIT_F
  495. select CPU_ARM926EJS
  496. select PL011_SERIAL
  497. imply CMD_SAVES
  498. config TARGET_STV0991
  499. bool "Support stv0991"
  500. select CPU_V7A
  501. select DM
  502. select DM_SERIAL
  503. select DM_SPI
  504. select DM_SPI_FLASH
  505. select PL01X_SERIAL
  506. select SPI
  507. select SPI_FLASH
  508. imply CMD_DM
  509. config TARGET_X600
  510. bool "Support x600"
  511. select BOARD_LATE_INIT
  512. select CPU_ARM926EJS
  513. select PL011_SERIAL
  514. select SUPPORT_SPL
  515. config TARGET_FLEA3
  516. bool "Support flea3"
  517. select CPU_ARM1136
  518. config TARGET_MX35PDK
  519. bool "Support mx35pdk"
  520. select BOARD_LATE_INIT
  521. select CPU_ARM1136
  522. config ARCH_BCM283X
  523. bool "Broadcom BCM283X family"
  524. select DM
  525. select DM_GPIO
  526. select DM_SERIAL
  527. select OF_CONTROL
  528. select PL01X_SERIAL
  529. select SERIAL_SEARCH_ALL
  530. imply CMD_DM
  531. imply FAT_WRITE
  532. config ARCH_BCM63158
  533. bool "Broadcom BCM63158 family"
  534. select DM
  535. select OF_CONTROL
  536. imply CMD_DM
  537. config ARCH_BCM68360
  538. bool "Broadcom BCM68360 family"
  539. select DM
  540. select OF_CONTROL
  541. imply CMD_DM
  542. config ARCH_BCM6858
  543. bool "Broadcom BCM6858 family"
  544. select DM
  545. select OF_CONTROL
  546. imply CMD_DM
  547. config TARGET_VEXPRESS_CA15_TC2
  548. bool "Support vexpress_ca15_tc2"
  549. select CPU_V7A
  550. select CPU_V7_HAS_NONSEC
  551. select CPU_V7_HAS_VIRT
  552. select PL011_SERIAL
  553. config ARCH_BCMSTB
  554. bool "Broadcom BCM7XXX family"
  555. select CPU_V7A
  556. select DM
  557. select OF_CONTROL
  558. select OF_PRIOR_STAGE
  559. imply CMD_DM
  560. help
  561. This enables support for Broadcom ARM-based set-top box
  562. chipsets, including the 7445 family of chips.
  563. config TARGET_VEXPRESS_CA5X2
  564. bool "Support vexpress_ca5x2"
  565. select CPU_V7A
  566. select PL011_SERIAL
  567. config TARGET_VEXPRESS_CA9X4
  568. bool "Support vexpress_ca9x4"
  569. select CPU_V7A
  570. select PL011_SERIAL
  571. config TARGET_BCM23550_W1D
  572. bool "Support bcm23550_w1d"
  573. select CPU_V7A
  574. imply CRC32_VERIFY
  575. imply FAT_WRITE
  576. config TARGET_BCM28155_AP
  577. bool "Support bcm28155_ap"
  578. select CPU_V7A
  579. imply CRC32_VERIFY
  580. imply FAT_WRITE
  581. config TARGET_BCMCYGNUS
  582. bool "Support bcmcygnus"
  583. select CPU_V7A
  584. imply BCM_SF2_ETH
  585. imply BCM_SF2_ETH_GMAC
  586. imply CMD_HASH
  587. imply CRC32_VERIFY
  588. imply FAT_WRITE
  589. imply HASH_VERIFY
  590. imply NETDEVICES
  591. config TARGET_BCMNSP
  592. bool "Support bcmnsp"
  593. select CPU_V7A
  594. config TARGET_BCMNS2
  595. bool "Support Broadcom Northstar2"
  596. select ARM64
  597. help
  598. Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
  599. ARMv8 Cortex-A57 processors targeting a broad range of networking
  600. applications.
  601. config TARGET_BCMNS3
  602. bool "Support Broadcom NS3"
  603. select ARM64
  604. select BOARD_LATE_INIT
  605. help
  606. Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
  607. ARMv8 Cortex-A72 processors targeting a broad range of networking
  608. applications.
  609. config ARCH_EXYNOS
  610. bool "Samsung EXYNOS"
  611. select DM
  612. select DM_GPIO
  613. select DM_I2C
  614. select DM_KEYBOARD
  615. select DM_SERIAL
  616. select DM_SPI
  617. select DM_SPI_FLASH
  618. select SPI
  619. imply SYS_THUMB_BUILD
  620. imply CMD_DM
  621. imply FAT_WRITE
  622. config ARCH_S5PC1XX
  623. bool "Samsung S5PC1XX"
  624. select CPU_V7A
  625. select DM
  626. select DM_GPIO
  627. select DM_I2C
  628. select DM_SERIAL
  629. imply CMD_DM
  630. config ARCH_HIGHBANK
  631. bool "Calxeda Highbank"
  632. select CPU_V7A
  633. select PL011_SERIAL
  634. config ARCH_INTEGRATOR
  635. bool "ARM Ltd. Integrator family"
  636. select DM
  637. select DM_SERIAL
  638. select PL01X_SERIAL
  639. imply CMD_DM
  640. config ARCH_IPQ40XX
  641. bool "Qualcomm IPQ40xx SoCs"
  642. select CPU_V7A
  643. select DM
  644. select DM_GPIO
  645. select DM_SERIAL
  646. select PINCTRL
  647. select CLK
  648. select OF_CONTROL
  649. imply CMD_DM
  650. config ARCH_KEYSTONE
  651. bool "TI Keystone"
  652. select CMD_POWEROFF
  653. select CPU_V7A
  654. select SUPPORT_SPL
  655. select SYS_ARCH_TIMER
  656. select SYS_THUMB_BUILD
  657. imply CMD_MTDPARTS
  658. imply CMD_SAVES
  659. imply FIT
  660. config ARCH_K3
  661. bool "Texas Instruments' K3 Architecture"
  662. select SPL
  663. select SUPPORT_SPL
  664. select FIT
  665. config ARCH_OMAP2PLUS
  666. bool "TI OMAP2+"
  667. select CPU_V7A
  668. select SPL_BOARD_INIT if SPL
  669. select SPL_STACK_R if SPL
  670. select SUPPORT_SPL
  671. imply FIT
  672. config ARCH_MESON
  673. bool "Amlogic Meson"
  674. imply DISTRO_DEFAULTS
  675. imply DM_RNG
  676. help
  677. Support for the Meson SoC family developed by Amlogic Inc.,
  678. targeted at media players and tablet computers. We currently
  679. support the S905 (GXBaby) 64-bit SoC.
  680. config ARCH_MEDIATEK
  681. bool "MediaTek SoCs"
  682. select DM
  683. select OF_CONTROL
  684. select SPL_DM if SPL
  685. select SPL_LIBCOMMON_SUPPORT if SPL
  686. select SPL_LIBGENERIC_SUPPORT if SPL
  687. select SPL_OF_CONTROL if SPL
  688. select SUPPORT_SPL
  689. help
  690. Support for the MediaTek SoCs family developed by MediaTek Inc.
  691. Please refer to doc/README.mediatek for more information.
  692. config ARCH_LPC32XX
  693. bool "NXP LPC32xx platform"
  694. select CPU_ARM926EJS
  695. select DM
  696. select DM_GPIO
  697. select DM_SERIAL
  698. select SPL_DM if SPL
  699. select SUPPORT_SPL
  700. imply CMD_DM
  701. config ARCH_IMX8
  702. bool "NXP i.MX8 platform"
  703. select ARM64
  704. select DM
  705. select OF_CONTROL
  706. select ENABLE_ARM_SOC_BOOT0_HOOK
  707. config ARCH_IMX8M
  708. bool "NXP i.MX8M platform"
  709. select ARM64
  710. select DM
  711. select SUPPORT_SPL
  712. imply CMD_DM
  713. config ARCH_IMXRT
  714. bool "NXP i.MXRT platform"
  715. select CPU_V7M
  716. select DM
  717. select DM_SERIAL
  718. select SUPPORT_SPL
  719. imply CMD_DM
  720. config ARCH_MX23
  721. bool "NXP i.MX23 family"
  722. select CPU_ARM926EJS
  723. select PL011_SERIAL
  724. select SUPPORT_SPL
  725. config ARCH_MX25
  726. bool "NXP MX25"
  727. select CPU_ARM926EJS
  728. imply MXC_GPIO
  729. config ARCH_MX28
  730. bool "NXP i.MX28 family"
  731. select CPU_ARM926EJS
  732. select PL011_SERIAL
  733. select SUPPORT_SPL
  734. config ARCH_MX31
  735. bool "NXP i.MX31 family"
  736. select CPU_ARM1136
  737. config ARCH_MX7ULP
  738. bool "NXP MX7ULP"
  739. select CPU_V7A
  740. select ROM_UNIFIED_SECTIONS
  741. imply MXC_GPIO
  742. imply SYS_THUMB_BUILD
  743. config ARCH_MX7
  744. bool "Freescale MX7"
  745. select ARCH_MISC_INIT
  746. select CPU_V7A
  747. select SYS_FSL_HAS_SEC if IMX_HAB
  748. select SYS_FSL_SEC_COMPAT_4
  749. select SYS_FSL_SEC_LE
  750. imply BOARD_EARLY_INIT_F
  751. imply MXC_GPIO
  752. imply SYS_THUMB_BUILD
  753. config ARCH_MX6
  754. bool "Freescale MX6"
  755. select CPU_V7A
  756. select SYS_FSL_HAS_SEC
  757. select SYS_FSL_SEC_COMPAT_4
  758. select SYS_FSL_SEC_LE
  759. imply MXC_GPIO
  760. imply SYS_THUMB_BUILD
  761. if ARCH_MX6
  762. config SPL_LDSCRIPT
  763. default "arch/arm/mach-omap2/u-boot-spl.lds"
  764. endif
  765. config ARCH_MX5
  766. bool "Freescale MX5"
  767. select BOARD_EARLY_INIT_F
  768. select CPU_V7A
  769. imply MXC_GPIO
  770. config ARCH_NEXELL
  771. bool "Nexell S5P4418/S5P6818 SoC"
  772. select ENABLE_ARM_SOC_BOOT0_HOOK
  773. select DM
  774. config ARCH_OWL
  775. bool "Actions Semi OWL SoCs"
  776. select DM
  777. select DM_ETH
  778. select DM_SERIAL
  779. select OWL_SERIAL
  780. select CLK
  781. select CLK_OWL
  782. select OF_CONTROL
  783. select SYS_RELOC_GD_ENV_ADDR
  784. imply CMD_DM
  785. config ARCH_QEMU
  786. bool "QEMU Virtual Platform"
  787. select ARCH_SUPPORT_TFABOOT
  788. select DM
  789. select DM_SERIAL
  790. select OF_CONTROL
  791. select PL01X_SERIAL
  792. imply CMD_DM
  793. imply DM_RTC
  794. imply RTC_PL031
  795. config ARCH_RMOBILE
  796. bool "Renesas ARM SoCs"
  797. select BOARD_EARLY_INIT_F if !RZA1
  798. select DM
  799. select DM_SERIAL
  800. imply CMD_DM
  801. imply FAT_WRITE
  802. imply SYS_THUMB_BUILD
  803. imply ARCH_MISC_INIT if DISPLAY_CPUINFO
  804. config TARGET_S32V234EVB
  805. bool "Support s32v234evb"
  806. select ARM64
  807. select SYS_FSL_ERRATUM_ESDHC111
  808. config ARCH_SNAPDRAGON
  809. bool "Qualcomm Snapdragon SoCs"
  810. select ARM64
  811. select DM
  812. select DM_GPIO
  813. select DM_SERIAL
  814. select MSM_SMEM
  815. select OF_CONTROL
  816. select OF_SEPARATE
  817. select SMEM
  818. select SPMI
  819. imply CMD_DM
  820. config ARCH_SOCFPGA
  821. bool "Altera SOCFPGA family"
  822. select ARCH_EARLY_INIT_R
  823. select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
  824. select ARM64 if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
  825. select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  826. select DM
  827. select DM_SERIAL
  828. select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  829. select OF_CONTROL
  830. select SPL_DM_RESET if DM_RESET
  831. select SPL_DM_SERIAL
  832. select SPL_LIBCOMMON_SUPPORT
  833. select SPL_LIBGENERIC_SUPPORT
  834. select SPL_NAND_SUPPORT if SPL_NAND_DENALI
  835. select SPL_OF_CONTROL
  836. select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
  837. select SPL_SERIAL_SUPPORT
  838. select SPL_SYSRESET
  839. select SPL_WATCHDOG_SUPPORT
  840. select SUPPORT_SPL
  841. select SYS_NS16550
  842. select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  843. select SYSRESET
  844. select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  845. select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10
  846. imply CMD_DM
  847. imply CMD_MTDPARTS
  848. imply CRC32_VERIFY
  849. imply DM_SPI
  850. imply DM_SPI_FLASH
  851. imply FAT_WRITE
  852. imply SPL
  853. imply SPL_DM
  854. imply SPL_DM_SPI
  855. imply SPL_DM_SPI_FLASH
  856. imply SPL_LIBDISK_SUPPORT
  857. imply SPL_MMC_SUPPORT
  858. imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
  859. imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
  860. imply SPL_SPI_FLASH_SUPPORT
  861. imply SPL_SPI_SUPPORT
  862. imply L2X0_CACHE
  863. config ARCH_SUNXI
  864. bool "Support sunxi (Allwinner) SoCs"
  865. select BINMAN
  866. select CMD_GPIO
  867. select CMD_MMC if MMC
  868. select CMD_USB if DISTRO_DEFAULTS
  869. select CLK
  870. select DM
  871. select DM_ETH
  872. select DM_GPIO
  873. select DM_KEYBOARD
  874. select DM_MMC if MMC
  875. select DM_SCSI if SCSI
  876. select DM_SERIAL
  877. select DM_USB if DISTRO_DEFAULTS
  878. select OF_BOARD_SETUP
  879. select OF_CONTROL
  880. select OF_SEPARATE
  881. select SPECIFY_CONSOLE_INDEX
  882. select SPL_STACK_R if SPL
  883. select SPL_SYS_MALLOC_SIMPLE if SPL
  884. select SPL_SYS_THUMB_BUILD if !ARM64
  885. select SUNXI_GPIO
  886. select SYS_NS16550
  887. select SYS_THUMB_BUILD if !ARM64
  888. select USB if DISTRO_DEFAULTS
  889. select USB_KEYBOARD if DISTRO_DEFAULTS
  890. select USB_STORAGE if DISTRO_DEFAULTS
  891. select SPL_USE_TINY_PRINTF
  892. select USE_PREBOOT
  893. select SYS_RELOC_GD_ENV_ADDR
  894. imply CMD_DM
  895. imply CMD_GPT
  896. imply CMD_UBI if MTD_RAW_NAND
  897. imply DISTRO_DEFAULTS
  898. imply FAT_WRITE
  899. imply FIT
  900. imply OF_LIBFDT_OVERLAY
  901. imply PRE_CONSOLE_BUFFER
  902. imply SPL_GPIO_SUPPORT
  903. imply SPL_LIBCOMMON_SUPPORT
  904. imply SPL_LIBGENERIC_SUPPORT
  905. imply SPL_MMC_SUPPORT if MMC
  906. imply SPL_POWER_SUPPORT
  907. imply SPL_SERIAL_SUPPORT
  908. imply USB_GADGET
  909. config ARCH_U8500
  910. bool "ST-Ericsson U8500 Series"
  911. select CPU_V7A
  912. select DM
  913. select DM_GPIO
  914. select DM_MMC if MMC
  915. select DM_SERIAL
  916. select DM_USB if USB
  917. select OF_CONTROL
  918. select SYSRESET
  919. select TIMER
  920. imply ARM_PL180_MMCI
  921. imply DM_RTC
  922. imply NOMADIK_MTU_TIMER
  923. imply PL01X_SERIAL
  924. imply RTC_PL031
  925. imply SYSRESET_SYSCON
  926. config ARCH_VERSAL
  927. bool "Support Xilinx Versal Platform"
  928. select ARM64
  929. select CLK
  930. select DM
  931. select DM_ETH if NET
  932. select DM_MMC if MMC
  933. select DM_SERIAL
  934. select OF_CONTROL
  935. imply BOARD_LATE_INIT
  936. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  937. config ARCH_VF610
  938. bool "Freescale Vybrid"
  939. select CPU_V7A
  940. select SYS_FSL_ERRATUM_ESDHC111
  941. imply CMD_MTDPARTS
  942. imply MTD_RAW_NAND
  943. config ARCH_ZYNQ
  944. bool "Xilinx Zynq based platform"
  945. select CLK
  946. select CLK_ZYNQ
  947. select CPU_V7A
  948. select DM
  949. select DM_ETH if NET
  950. select DM_MMC if MMC
  951. select DM_SERIAL
  952. select DM_SPI
  953. select DM_SPI_FLASH
  954. select DM_USB if USB
  955. select OF_CONTROL
  956. select SPI
  957. select SPL_BOARD_INIT if SPL
  958. select SPL_CLK if SPL
  959. select SPL_DM if SPL
  960. select SPL_DM_SPI if SPL
  961. select SPL_DM_SPI_FLASH if SPL
  962. select SPL_OF_CONTROL if SPL
  963. select SPL_SEPARATE_BSS if SPL
  964. select SUPPORT_SPL
  965. imply ARCH_EARLY_INIT_R
  966. imply BOARD_LATE_INIT
  967. imply CMD_CLK
  968. imply CMD_DM
  969. imply CMD_SPL
  970. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  971. imply FAT_WRITE
  972. config ARCH_ZYNQMP_R5
  973. bool "Xilinx ZynqMP R5 based platform"
  974. select CLK
  975. select CPU_V7R
  976. select DM
  977. select DM_ETH if NET
  978. select DM_MMC if MMC
  979. select DM_SERIAL
  980. select OF_CONTROL
  981. imply CMD_DM
  982. imply DM_USB_GADGET
  983. config ARCH_ZYNQMP
  984. bool "Xilinx ZynqMP based platform"
  985. select ARM64
  986. select CLK
  987. select DM
  988. select DM_ETH if NET
  989. select DM_MAILBOX
  990. select DM_MMC if MMC
  991. select DM_SERIAL
  992. select DM_SPI if SPI
  993. select DM_SPI_FLASH if DM_SPI
  994. select DM_USB if USB
  995. select FIRMWARE
  996. select OF_CONTROL
  997. select SPL_BOARD_INIT if SPL
  998. select SPL_CLK if SPL
  999. select SPL_DM_SPI if SPI
  1000. select SPL_DM_SPI_FLASH if SPL_DM_SPI
  1001. select SPL_DM_MAILBOX if SPL
  1002. select SPL_FIRMWARE if SPL
  1003. select SPL_SEPARATE_BSS if SPL
  1004. select SUPPORT_SPL
  1005. select ZYNQMP_IPI
  1006. imply BOARD_LATE_INIT
  1007. imply CMD_DM
  1008. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  1009. imply FAT_WRITE
  1010. imply MP
  1011. imply DM_USB_GADGET
  1012. config ARCH_TEGRA
  1013. bool "NVIDIA Tegra"
  1014. imply DISTRO_DEFAULTS
  1015. imply FAT_WRITE
  1016. config TARGET_VEXPRESS64_AEMV8A
  1017. bool "Support vexpress_aemv8a"
  1018. select ARM64
  1019. select PL01X_SERIAL
  1020. config TARGET_VEXPRESS64_BASE_FVP
  1021. bool "Support Versatile Express ARMv8a FVP BASE model"
  1022. select ARM64
  1023. select PL01X_SERIAL
  1024. select SEMIHOSTING
  1025. config TARGET_VEXPRESS64_JUNO
  1026. bool "Support Versatile Express Juno Development Platform"
  1027. select ARM64
  1028. select PL01X_SERIAL
  1029. select DM
  1030. select OF_CONTROL
  1031. select OF_BOARD
  1032. select CLK
  1033. select DM_SERIAL
  1034. select ARM_PSCI_FW
  1035. select PSCI_RESET
  1036. select DM_ETH
  1037. select BLK
  1038. select USB
  1039. select DM_USB
  1040. config TARGET_TOTAL_COMPUTE
  1041. bool "Support Total Compute Platform"
  1042. select ARM64
  1043. select PL01X_SERIAL
  1044. select DM
  1045. select DM_SERIAL
  1046. select DM_MMC
  1047. select DM_GPIO
  1048. config TARGET_LS2080A_EMU
  1049. bool "Support ls2080a_emu"
  1050. select ARCH_LS2080A
  1051. select ARM64
  1052. select ARMV8_MULTIENTRY
  1053. select FSL_DDR_SYNC_REFRESH
  1054. help
  1055. Support for Freescale LS2080A_EMU platform.
  1056. The LS2080A Development System (EMULATOR) is a pre-silicon
  1057. development platform that supports the QorIQ LS2080A
  1058. Layerscape Architecture processor.
  1059. config TARGET_LS2080A_SIMU
  1060. bool "Support ls2080a_simu"
  1061. select ARCH_LS2080A
  1062. select ARM64
  1063. select ARMV8_MULTIENTRY
  1064. select BOARD_LATE_INIT
  1065. help
  1066. Support for Freescale LS2080A_SIMU platform.
  1067. The LS2080A Development System (QDS) is a pre silicon
  1068. development platform that supports the QorIQ LS2080A
  1069. Layerscape Architecture processor.
  1070. config TARGET_LS1088AQDS
  1071. bool "Support ls1088aqds"
  1072. select ARCH_LS1088A
  1073. select ARM64
  1074. select ARMV8_MULTIENTRY
  1075. select ARCH_SUPPORT_TFABOOT
  1076. select BOARD_LATE_INIT
  1077. select SUPPORT_SPL
  1078. select FSL_DDR_INTERACTIVE if !SD_BOOT
  1079. help
  1080. Support for NXP LS1088AQDS platform.
  1081. The LS1088A Development System (QDS) is a high-performance
  1082. development platform that supports the QorIQ LS1088A
  1083. Layerscape Architecture processor.
  1084. config TARGET_LS2080AQDS
  1085. bool "Support ls2080aqds"
  1086. select ARCH_LS2080A
  1087. select ARM64
  1088. select ARMV8_MULTIENTRY
  1089. select ARCH_SUPPORT_TFABOOT
  1090. select BOARD_LATE_INIT
  1091. select SUPPORT_SPL
  1092. imply SCSI
  1093. imply SCSI_AHCI
  1094. select FSL_DDR_BIST
  1095. select FSL_DDR_INTERACTIVE if !SPL
  1096. help
  1097. Support for Freescale LS2080AQDS platform.
  1098. The LS2080A Development System (QDS) is a high-performance
  1099. development platform that supports the QorIQ LS2080A
  1100. Layerscape Architecture processor.
  1101. config TARGET_LS2080ARDB
  1102. bool "Support ls2080ardb"
  1103. select ARCH_LS2080A
  1104. select ARM64
  1105. select ARMV8_MULTIENTRY
  1106. select ARCH_SUPPORT_TFABOOT
  1107. select BOARD_LATE_INIT
  1108. select SUPPORT_SPL
  1109. select FSL_DDR_BIST
  1110. select FSL_DDR_INTERACTIVE if !SPL
  1111. imply SCSI
  1112. imply SCSI_AHCI
  1113. help
  1114. Support for Freescale LS2080ARDB platform.
  1115. The LS2080A Reference design board (RDB) is a high-performance
  1116. development platform that supports the QorIQ LS2080A
  1117. Layerscape Architecture processor.
  1118. config TARGET_LS2081ARDB
  1119. bool "Support ls2081ardb"
  1120. select ARCH_LS2080A
  1121. select ARM64
  1122. select ARMV8_MULTIENTRY
  1123. select BOARD_LATE_INIT
  1124. select SUPPORT_SPL
  1125. help
  1126. Support for Freescale LS2081ARDB platform.
  1127. The LS2081A Reference design board (RDB) is a high-performance
  1128. development platform that supports the QorIQ LS2081A/LS2041A
  1129. Layerscape Architecture processor.
  1130. config TARGET_LX2160ARDB
  1131. bool "Support lx2160ardb"
  1132. select ARCH_LX2160A
  1133. select ARM64
  1134. select ARMV8_MULTIENTRY
  1135. select ARCH_SUPPORT_TFABOOT
  1136. select BOARD_LATE_INIT
  1137. help
  1138. Support for NXP LX2160ARDB platform.
  1139. The lx2160ardb (LX2160A Reference design board (RDB)
  1140. is a high-performance development platform that supports the
  1141. QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
  1142. config TARGET_LX2160AQDS
  1143. bool "Support lx2160aqds"
  1144. select ARCH_LX2160A
  1145. select ARM64
  1146. select ARMV8_MULTIENTRY
  1147. select ARCH_SUPPORT_TFABOOT
  1148. select BOARD_LATE_INIT
  1149. help
  1150. Support for NXP LX2160AQDS platform.
  1151. The lx2160aqds (LX2160A QorIQ Development System (QDS)
  1152. is a high-performance development platform that supports the
  1153. QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
  1154. config TARGET_HIKEY
  1155. bool "Support HiKey 96boards Consumer Edition Platform"
  1156. select ARM64
  1157. select DM
  1158. select DM_GPIO
  1159. select DM_SERIAL
  1160. select OF_CONTROL
  1161. select PL01X_SERIAL
  1162. select SPECIFY_CONSOLE_INDEX
  1163. imply CMD_DM
  1164. help
  1165. Support for HiKey 96boards platform. It features a HI6220
  1166. SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
  1167. config TARGET_HIKEY960
  1168. bool "Support HiKey960 96boards Consumer Edition Platform"
  1169. select ARM64
  1170. select DM
  1171. select DM_SERIAL
  1172. select OF_CONTROL
  1173. select PL01X_SERIAL
  1174. imply CMD_DM
  1175. help
  1176. Support for HiKey960 96boards platform. It features a HI3660
  1177. SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
  1178. config TARGET_POPLAR
  1179. bool "Support Poplar 96boards Enterprise Edition Platform"
  1180. select ARM64
  1181. select DM
  1182. select DM_SERIAL
  1183. select DM_USB
  1184. select OF_CONTROL
  1185. select PL01X_SERIAL
  1186. imply CMD_DM
  1187. help
  1188. Support for Poplar 96boards EE platform. It features a HI3798cv200
  1189. SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
  1190. making it capable of running any commercial set-top solution based on
  1191. Linux or Android.
  1192. config TARGET_LS1012AQDS
  1193. bool "Support ls1012aqds"
  1194. select ARCH_LS1012A
  1195. select ARM64
  1196. select ARCH_SUPPORT_TFABOOT
  1197. select BOARD_LATE_INIT
  1198. help
  1199. Support for Freescale LS1012AQDS platform.
  1200. The LS1012A Development System (QDS) is a high-performance
  1201. development platform that supports the QorIQ LS1012A
  1202. Layerscape Architecture processor.
  1203. config TARGET_LS1012ARDB
  1204. bool "Support ls1012ardb"
  1205. select ARCH_LS1012A
  1206. select ARM64
  1207. select ARCH_SUPPORT_TFABOOT
  1208. select BOARD_LATE_INIT
  1209. imply SCSI
  1210. imply SCSI_AHCI
  1211. help
  1212. Support for Freescale LS1012ARDB platform.
  1213. The LS1012A Reference design board (RDB) is a high-performance
  1214. development platform that supports the QorIQ LS1012A
  1215. Layerscape Architecture processor.
  1216. config TARGET_LS1012A2G5RDB
  1217. bool "Support ls1012a2g5rdb"
  1218. select ARCH_LS1012A
  1219. select ARM64
  1220. select ARCH_SUPPORT_TFABOOT
  1221. select BOARD_LATE_INIT
  1222. imply SCSI
  1223. help
  1224. Support for Freescale LS1012A2G5RDB platform.
  1225. The LS1012A 2G5 Reference design board (RDB) is a high-performance
  1226. development platform that supports the QorIQ LS1012A
  1227. Layerscape Architecture processor.
  1228. config TARGET_LS1012AFRWY
  1229. bool "Support ls1012afrwy"
  1230. select ARCH_LS1012A
  1231. select ARM64
  1232. select ARCH_SUPPORT_TFABOOT
  1233. select BOARD_LATE_INIT
  1234. imply SCSI
  1235. imply SCSI_AHCI
  1236. help
  1237. Support for Freescale LS1012AFRWY platform.
  1238. The LS1012A FRWY board (FRWY) is a high-performance
  1239. development platform that supports the QorIQ LS1012A
  1240. Layerscape Architecture processor.
  1241. config TARGET_LS1012AFRDM
  1242. bool "Support ls1012afrdm"
  1243. select ARCH_LS1012A
  1244. select ARM64
  1245. select ARCH_SUPPORT_TFABOOT
  1246. help
  1247. Support for Freescale LS1012AFRDM platform.
  1248. The LS1012A Freedom board (FRDM) is a high-performance
  1249. development platform that supports the QorIQ LS1012A
  1250. Layerscape Architecture processor.
  1251. config TARGET_LS1028AQDS
  1252. bool "Support ls1028aqds"
  1253. select ARCH_LS1028A
  1254. select ARM64
  1255. select ARMV8_MULTIENTRY
  1256. select ARCH_SUPPORT_TFABOOT
  1257. select BOARD_LATE_INIT
  1258. help
  1259. Support for Freescale LS1028AQDS platform
  1260. The LS1028A Development System (QDS) is a high-performance
  1261. development platform that supports the QorIQ LS1028A
  1262. Layerscape Architecture processor.
  1263. config TARGET_LS1028ARDB
  1264. bool "Support ls1028ardb"
  1265. select ARCH_LS1028A
  1266. select ARM64
  1267. select ARMV8_MULTIENTRY
  1268. select ARCH_SUPPORT_TFABOOT
  1269. select BOARD_LATE_INIT
  1270. help
  1271. Support for Freescale LS1028ARDB platform
  1272. The LS1028A Development System (RDB) is a high-performance
  1273. development platform that supports the QorIQ LS1028A
  1274. Layerscape Architecture processor.
  1275. config TARGET_LS1088ARDB
  1276. bool "Support ls1088ardb"
  1277. select ARCH_LS1088A
  1278. select ARM64
  1279. select ARMV8_MULTIENTRY
  1280. select ARCH_SUPPORT_TFABOOT
  1281. select BOARD_LATE_INIT
  1282. select SUPPORT_SPL
  1283. select FSL_DDR_INTERACTIVE if !SD_BOOT
  1284. help
  1285. Support for NXP LS1088ARDB platform.
  1286. The LS1088A Reference design board (RDB) is a high-performance
  1287. development platform that supports the QorIQ LS1088A
  1288. Layerscape Architecture processor.
  1289. config TARGET_LS1021AQDS
  1290. bool "Support ls1021aqds"
  1291. select ARCH_LS1021A
  1292. select ARCH_SUPPORT_PSCI
  1293. select BOARD_EARLY_INIT_F
  1294. select BOARD_LATE_INIT
  1295. select CPU_V7A
  1296. select CPU_V7_HAS_NONSEC
  1297. select CPU_V7_HAS_VIRT
  1298. select LS1_DEEP_SLEEP
  1299. select SUPPORT_SPL
  1300. select SYS_FSL_DDR
  1301. select FSL_DDR_INTERACTIVE
  1302. select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
  1303. select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
  1304. imply SCSI
  1305. config TARGET_LS1021ATWR
  1306. bool "Support ls1021atwr"
  1307. select ARCH_LS1021A
  1308. select ARCH_SUPPORT_PSCI
  1309. select BOARD_EARLY_INIT_F
  1310. select BOARD_LATE_INIT
  1311. select CPU_V7A
  1312. select CPU_V7_HAS_NONSEC
  1313. select CPU_V7_HAS_VIRT
  1314. select LS1_DEEP_SLEEP
  1315. select SUPPORT_SPL
  1316. select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
  1317. imply SCSI
  1318. config TARGET_LS1021ATSN
  1319. bool "Support ls1021atsn"
  1320. select ARCH_LS1021A
  1321. select ARCH_SUPPORT_PSCI
  1322. select BOARD_EARLY_INIT_F
  1323. select BOARD_LATE_INIT
  1324. select CPU_V7A
  1325. select CPU_V7_HAS_NONSEC
  1326. select CPU_V7_HAS_VIRT
  1327. select LS1_DEEP_SLEEP
  1328. select SUPPORT_SPL
  1329. imply SCSI
  1330. config TARGET_LS1021AIOT
  1331. bool "Support ls1021aiot"
  1332. select ARCH_LS1021A
  1333. select ARCH_SUPPORT_PSCI
  1334. select BOARD_LATE_INIT
  1335. select CPU_V7A
  1336. select CPU_V7_HAS_NONSEC
  1337. select CPU_V7_HAS_VIRT
  1338. select SUPPORT_SPL
  1339. select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
  1340. imply SCSI
  1341. help
  1342. Support for Freescale LS1021AIOT platform.
  1343. The LS1021A Freescale board (IOT) is a high-performance
  1344. development platform that supports the QorIQ LS1021A
  1345. Layerscape Architecture processor.
  1346. config TARGET_LS1043AQDS
  1347. bool "Support ls1043aqds"
  1348. select ARCH_LS1043A
  1349. select ARM64
  1350. select ARMV8_MULTIENTRY
  1351. select ARCH_SUPPORT_TFABOOT
  1352. select BOARD_EARLY_INIT_F
  1353. select BOARD_LATE_INIT
  1354. select SUPPORT_SPL
  1355. select FSL_DDR_INTERACTIVE if !SPL
  1356. select FSL_DSPI if !SPL_NO_DSPI
  1357. select DM_SPI_FLASH if FSL_DSPI
  1358. imply SCSI
  1359. imply SCSI_AHCI
  1360. help
  1361. Support for Freescale LS1043AQDS platform.
  1362. config TARGET_LS1043ARDB
  1363. bool "Support ls1043ardb"
  1364. select ARCH_LS1043A
  1365. select ARM64
  1366. select ARMV8_MULTIENTRY
  1367. select ARCH_SUPPORT_TFABOOT
  1368. select BOARD_EARLY_INIT_F
  1369. select BOARD_LATE_INIT
  1370. select SUPPORT_SPL
  1371. select FSL_DSPI if !SPL_NO_DSPI
  1372. select DM_SPI_FLASH if FSL_DSPI
  1373. help
  1374. Support for Freescale LS1043ARDB platform.
  1375. config TARGET_LS1046AQDS
  1376. bool "Support ls1046aqds"
  1377. select ARCH_LS1046A
  1378. select ARM64
  1379. select ARMV8_MULTIENTRY
  1380. select ARCH_SUPPORT_TFABOOT
  1381. select BOARD_EARLY_INIT_F
  1382. select BOARD_LATE_INIT
  1383. select DM_SPI_FLASH if DM_SPI
  1384. select SUPPORT_SPL
  1385. select FSL_DDR_BIST if !SPL
  1386. select FSL_DDR_INTERACTIVE if !SPL
  1387. select FSL_DDR_INTERACTIVE if !SPL
  1388. imply SCSI
  1389. help
  1390. Support for Freescale LS1046AQDS platform.
  1391. The LS1046A Development System (QDS) is a high-performance
  1392. development platform that supports the QorIQ LS1046A
  1393. Layerscape Architecture processor.
  1394. config TARGET_LS1046ARDB
  1395. bool "Support ls1046ardb"
  1396. select ARCH_LS1046A
  1397. select ARM64
  1398. select ARMV8_MULTIENTRY
  1399. select ARCH_SUPPORT_TFABOOT
  1400. select BOARD_EARLY_INIT_F
  1401. select BOARD_LATE_INIT
  1402. select DM_SPI_FLASH if DM_SPI
  1403. select POWER_MC34VR500
  1404. select SUPPORT_SPL
  1405. select FSL_DDR_BIST
  1406. select FSL_DDR_INTERACTIVE if !SPL
  1407. imply SCSI
  1408. help
  1409. Support for Freescale LS1046ARDB platform.
  1410. The LS1046A Reference Design Board (RDB) is a high-performance
  1411. development platform that supports the QorIQ LS1046A
  1412. Layerscape Architecture processor.
  1413. config TARGET_LS1046AFRWY
  1414. bool "Support ls1046afrwy"
  1415. select ARCH_LS1046A
  1416. select ARM64
  1417. select ARMV8_MULTIENTRY
  1418. select ARCH_SUPPORT_TFABOOT
  1419. select BOARD_EARLY_INIT_F
  1420. select BOARD_LATE_INIT
  1421. select DM_SPI_FLASH if DM_SPI
  1422. imply SCSI
  1423. help
  1424. Support for Freescale LS1046AFRWY platform.
  1425. The LS1046A Freeway Board (FRWY) is a high-performance
  1426. development platform that supports the QorIQ LS1046A
  1427. Layerscape Architecture processor.
  1428. config TARGET_COLIBRI_PXA270
  1429. bool "Support colibri_pxa270"
  1430. select CPU_PXA
  1431. config ARCH_UNIPHIER
  1432. bool "Socionext UniPhier SoCs"
  1433. select BOARD_LATE_INIT
  1434. select DM
  1435. select DM_ETH
  1436. select DM_GPIO
  1437. select DM_I2C
  1438. select DM_MMC
  1439. select DM_MTD
  1440. select DM_RESET
  1441. select DM_SERIAL
  1442. select DM_USB
  1443. select OF_BOARD_SETUP
  1444. select OF_CONTROL
  1445. select OF_LIBFDT
  1446. select PINCTRL
  1447. select SPL_BOARD_INIT if SPL
  1448. select SPL_DM if SPL
  1449. select SPL_LIBCOMMON_SUPPORT if SPL
  1450. select SPL_LIBGENERIC_SUPPORT if SPL
  1451. select SPL_OF_CONTROL if SPL
  1452. select SPL_PINCTRL if SPL
  1453. select SUPPORT_SPL
  1454. imply CMD_DM
  1455. imply DISTRO_DEFAULTS
  1456. imply FAT_WRITE
  1457. help
  1458. Support for UniPhier SoC family developed by Socionext Inc.
  1459. (formerly, System LSI Business Division of Panasonic Corporation)
  1460. config ARCH_STM32
  1461. bool "Support STMicroelectronics STM32 MCU with cortex M"
  1462. select CPU_V7M
  1463. select DM
  1464. select DM_SERIAL
  1465. imply CMD_DM
  1466. config ARCH_STI
  1467. bool "Support STMicrolectronics SoCs"
  1468. select BLK
  1469. select CPU_V7A
  1470. select DM
  1471. select DM_MMC
  1472. select DM_RESET
  1473. select DM_SERIAL
  1474. imply CMD_DM
  1475. help
  1476. Support for STMicroelectronics STiH407/10 SoC family.
  1477. This SoC is used on Linaro 96Board STiH410-B2260
  1478. config ARCH_STM32MP
  1479. bool "Support STMicroelectronics STM32MP Socs with cortex A"
  1480. select ARCH_MISC_INIT
  1481. select ARCH_SUPPORT_TFABOOT
  1482. select BOARD_LATE_INIT
  1483. select CLK
  1484. select DM
  1485. select DM_GPIO
  1486. select DM_RESET
  1487. select DM_SERIAL
  1488. select MISC
  1489. select OF_CONTROL
  1490. select OF_LIBFDT
  1491. select OF_SYSTEM_SETUP
  1492. select PINCTRL
  1493. select REGMAP
  1494. select SUPPORT_SPL
  1495. select SYSCON
  1496. select SYSRESET
  1497. select SYS_THUMB_BUILD
  1498. imply SPL_SYSRESET
  1499. imply CMD_DM
  1500. imply CMD_POWEROFF
  1501. imply OF_LIBFDT_OVERLAY
  1502. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  1503. imply USE_PREBOOT
  1504. help
  1505. Support for STM32MP SoC family developed by STMicroelectronics,
  1506. MPUs based on ARM cortex A core
  1507. U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
  1508. FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
  1509. chain.
  1510. SPL is the unsecure FSBL for the basic boot chain.
  1511. config ARCH_ROCKCHIP
  1512. bool "Support Rockchip SoCs"
  1513. select BLK
  1514. select BINMAN if !ARM64
  1515. select DM
  1516. select DM_GPIO
  1517. select DM_I2C
  1518. select DM_MMC
  1519. select DM_PWM
  1520. select DM_REGULATOR
  1521. select DM_SERIAL
  1522. select DM_SPI
  1523. select DM_SPI_FLASH
  1524. select DM_USB if USB
  1525. select ENABLE_ARM_SOC_BOOT0_HOOK
  1526. select OF_CONTROL
  1527. select SPI
  1528. select SPL_DM if SPL
  1529. select SPL_DM_SPI if SPL
  1530. select SPL_DM_SPI_FLASH if SPL
  1531. select SYS_MALLOC_F
  1532. select SYS_THUMB_BUILD if !ARM64
  1533. imply ADC
  1534. imply CMD_DM
  1535. imply DEBUG_UART_BOARD_INIT
  1536. imply DISTRO_DEFAULTS
  1537. imply FAT_WRITE
  1538. imply SARADC_ROCKCHIP
  1539. imply SPL_SYSRESET
  1540. imply SPL_SYS_MALLOC_SIMPLE
  1541. imply SYS_NS16550
  1542. imply TPL_SYSRESET
  1543. imply USB_FUNCTION_FASTBOOT
  1544. config TARGET_THUNDERX_88XX
  1545. bool "Support ThunderX 88xx"
  1546. select ARM64
  1547. select OF_CONTROL
  1548. select PL01X_SERIAL
  1549. select SYS_CACHE_SHIFT_7
  1550. config ARCH_ASPEED
  1551. bool "Support Aspeed SoCs"
  1552. select DM
  1553. select OF_CONTROL
  1554. imply CMD_DM
  1555. config TARGET_DURIAN
  1556. bool "Support Phytium Durian Platform"
  1557. select ARM64
  1558. help
  1559. Support for durian platform.
  1560. It has 2GB Sdram, uart and pcie.
  1561. config TARGET_PRESIDIO_ASIC
  1562. bool "Support Cortina Presidio ASIC Platform"
  1563. select ARM64
  1564. config TARGET_XENGUEST_ARM64
  1565. bool "Xen guest ARM64"
  1566. select ARM64
  1567. select XEN
  1568. select OF_CONTROL
  1569. select LINUX_KERNEL_IMAGE_HEADER
  1570. select XEN_SERIAL
  1571. select SSCANF
  1572. endchoice
  1573. config ARCH_SUPPORT_TFABOOT
  1574. bool
  1575. config TFABOOT
  1576. bool "Support for booting from TF-A"
  1577. depends on ARCH_SUPPORT_TFABOOT
  1578. default n
  1579. help
  1580. Enabling this will make a U-Boot binary that is capable of being
  1581. booted via TF-A (Trusted Firmware for Cortex-A).
  1582. config TI_SECURE_DEVICE
  1583. bool "HS Device Type Support"
  1584. depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
  1585. help
  1586. If a high secure (HS) device type is being used, this config
  1587. must be set. This option impacts various aspects of the
  1588. build system (to create signed boot images that can be
  1589. authenticated) and the code. See the doc/README.ti-secure
  1590. file for further details.
  1591. if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
  1592. config ISW_ENTRY_ADDR
  1593. hex "Address in memory or XIP address of bootloader entry point"
  1594. default 0x402F4000 if AM43XX
  1595. default 0x402F0400 if AM33XX
  1596. default 0x40301350 if OMAP54XX
  1597. help
  1598. After any reset, the boot ROM searches the boot media for a valid
  1599. boot image. For non-XIP devices, the ROM then copies the image into
  1600. internal memory. For all boot modes, after the ROM processes the
  1601. boot image it eventually computes the entry point address depending
  1602. on the device type (secure/non-secure), boot media (xip/non-xip) and
  1603. image headers.
  1604. endif
  1605. source "arch/arm/mach-aspeed/Kconfig"
  1606. source "arch/arm/mach-at91/Kconfig"
  1607. source "arch/arm/mach-bcm283x/Kconfig"
  1608. source "arch/arm/mach-bcmstb/Kconfig"
  1609. source "arch/arm/mach-davinci/Kconfig"
  1610. source "arch/arm/mach-exynos/Kconfig"
  1611. source "arch/arm/mach-highbank/Kconfig"
  1612. source "arch/arm/mach-integrator/Kconfig"
  1613. source "arch/arm/mach-ipq40xx/Kconfig"
  1614. source "arch/arm/mach-k3/Kconfig"
  1615. source "arch/arm/mach-keystone/Kconfig"
  1616. source "arch/arm/mach-kirkwood/Kconfig"
  1617. source "arch/arm/mach-lpc32xx/Kconfig"
  1618. source "arch/arm/mach-mvebu/Kconfig"
  1619. source "arch/arm/cpu/armv7/ls102xa/Kconfig"
  1620. source "arch/arm/mach-imx/mx2/Kconfig"
  1621. source "arch/arm/mach-imx/mx3/Kconfig"
  1622. source "arch/arm/mach-imx/mx5/Kconfig"
  1623. source "arch/arm/mach-imx/mx6/Kconfig"
  1624. source "arch/arm/mach-imx/mx7/Kconfig"
  1625. source "arch/arm/mach-imx/mx7ulp/Kconfig"
  1626. source "arch/arm/mach-imx/imx8/Kconfig"
  1627. source "arch/arm/mach-imx/imx8m/Kconfig"
  1628. source "arch/arm/mach-imx/imxrt/Kconfig"
  1629. source "arch/arm/mach-imx/mxs/Kconfig"
  1630. source "arch/arm/mach-omap2/Kconfig"
  1631. source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
  1632. source "arch/arm/mach-orion5x/Kconfig"
  1633. source "arch/arm/mach-owl/Kconfig"
  1634. source "arch/arm/mach-rmobile/Kconfig"
  1635. source "arch/arm/mach-meson/Kconfig"
  1636. source "arch/arm/mach-mediatek/Kconfig"
  1637. source "arch/arm/mach-qemu/Kconfig"
  1638. source "arch/arm/mach-rockchip/Kconfig"
  1639. source "arch/arm/mach-s5pc1xx/Kconfig"
  1640. source "arch/arm/mach-snapdragon/Kconfig"
  1641. source "arch/arm/mach-socfpga/Kconfig"
  1642. source "arch/arm/mach-sti/Kconfig"
  1643. source "arch/arm/mach-stm32/Kconfig"
  1644. source "arch/arm/mach-stm32mp/Kconfig"
  1645. source "arch/arm/mach-sunxi/Kconfig"
  1646. source "arch/arm/mach-tegra/Kconfig"
  1647. source "arch/arm/mach-u8500/Kconfig"
  1648. source "arch/arm/mach-uniphier/Kconfig"
  1649. source "arch/arm/cpu/armv7/vf610/Kconfig"
  1650. source "arch/arm/mach-zynq/Kconfig"
  1651. source "arch/arm/mach-zynqmp/Kconfig"
  1652. source "arch/arm/mach-versal/Kconfig"
  1653. source "arch/arm/mach-zynqmp-r5/Kconfig"
  1654. source "arch/arm/cpu/armv7/Kconfig"
  1655. source "arch/arm/cpu/armv8/Kconfig"
  1656. source "arch/arm/mach-imx/Kconfig"
  1657. source "arch/arm/mach-nexell/Kconfig"
  1658. source "board/armltd/total_compute/Kconfig"
  1659. source "board/bosch/shc/Kconfig"
  1660. source "board/bosch/guardian/Kconfig"
  1661. source "board/CarMediaLab/flea3/Kconfig"
  1662. source "board/Marvell/aspenite/Kconfig"
  1663. source "board/Marvell/gplugd/Kconfig"
  1664. source "board/armadeus/apf27/Kconfig"
  1665. source "board/armltd/vexpress/Kconfig"
  1666. source "board/armltd/vexpress64/Kconfig"
  1667. source "board/cortina/presidio-asic/Kconfig"
  1668. source "board/broadcom/bcm23550_w1d/Kconfig"
  1669. source "board/broadcom/bcm28155_ap/Kconfig"
  1670. source "board/broadcom/bcm963158/Kconfig"
  1671. source "board/broadcom/bcm968360bg/Kconfig"
  1672. source "board/broadcom/bcm968580xref/Kconfig"
  1673. source "board/broadcom/bcmcygnus/Kconfig"
  1674. source "board/broadcom/bcmnsp/Kconfig"
  1675. source "board/broadcom/bcmns2/Kconfig"
  1676. source "board/broadcom/bcmns3/Kconfig"
  1677. source "board/cavium/thunderx/Kconfig"
  1678. source "board/cirrus/edb93xx/Kconfig"
  1679. source "board/eets/pdu001/Kconfig"
  1680. source "board/emulation/qemu-arm/Kconfig"
  1681. source "board/freescale/ls2080a/Kconfig"
  1682. source "board/freescale/ls2080aqds/Kconfig"
  1683. source "board/freescale/ls2080ardb/Kconfig"
  1684. source "board/freescale/ls1088a/Kconfig"
  1685. source "board/freescale/ls1028a/Kconfig"
  1686. source "board/freescale/ls1021aqds/Kconfig"
  1687. source "board/freescale/ls1043aqds/Kconfig"
  1688. source "board/freescale/ls1021atwr/Kconfig"
  1689. source "board/freescale/ls1021atsn/Kconfig"
  1690. source "board/freescale/ls1021aiot/Kconfig"
  1691. source "board/freescale/ls1046aqds/Kconfig"
  1692. source "board/freescale/ls1043ardb/Kconfig"
  1693. source "board/freescale/ls1046ardb/Kconfig"
  1694. source "board/freescale/ls1046afrwy/Kconfig"
  1695. source "board/freescale/ls1012aqds/Kconfig"
  1696. source "board/freescale/ls1012ardb/Kconfig"
  1697. source "board/freescale/ls1012afrdm/Kconfig"
  1698. source "board/freescale/lx2160a/Kconfig"
  1699. source "board/freescale/mx35pdk/Kconfig"
  1700. source "board/freescale/s32v234evb/Kconfig"
  1701. source "board/grinn/chiliboard/Kconfig"
  1702. source "board/hisilicon/hikey/Kconfig"
  1703. source "board/hisilicon/hikey960/Kconfig"
  1704. source "board/hisilicon/poplar/Kconfig"
  1705. source "board/isee/igep003x/Kconfig"
  1706. source "board/myir/mys_6ulx/Kconfig"
  1707. source "board/spear/spear300/Kconfig"
  1708. source "board/spear/spear310/Kconfig"
  1709. source "board/spear/spear320/Kconfig"
  1710. source "board/spear/spear600/Kconfig"
  1711. source "board/spear/x600/Kconfig"
  1712. source "board/st/stv0991/Kconfig"
  1713. source "board/tcl/sl50/Kconfig"
  1714. source "board/toradex/colibri_pxa270/Kconfig"
  1715. source "board/variscite/dart_6ul/Kconfig"
  1716. source "board/vscom/baltos/Kconfig"
  1717. source "board/xilinx/Kconfig"
  1718. source "board/xilinx/zynq/Kconfig"
  1719. source "board/xilinx/zynqmp/Kconfig"
  1720. source "board/xilinx/versal/Kconfig"
  1721. source "board/phytium/durian/Kconfig"
  1722. source "board/xen/xenguest_arm64/Kconfig"
  1723. source "arch/arm/Kconfig.debug"
  1724. endmenu
  1725. config SPL_LDSCRIPT
  1726. default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
  1727. default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
  1728. default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64