stm32mp1.c 22 KB

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  1. // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
  2. /*
  3. * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
  4. */
  5. #include <common.h>
  6. #include <adc.h>
  7. #include <bootm.h>
  8. #include <clk.h>
  9. #include <config.h>
  10. #include <dm.h>
  11. #include <env.h>
  12. #include <env_internal.h>
  13. #include <g_dnl.h>
  14. #include <generic-phy.h>
  15. #include <i2c.h>
  16. #include <led.h>
  17. #include <misc.h>
  18. #include <mtd.h>
  19. #include <mtd_node.h>
  20. #include <netdev.h>
  21. #include <phy.h>
  22. #include <remoteproc.h>
  23. #include <reset.h>
  24. #include <syscon.h>
  25. #include <usb.h>
  26. #include <watchdog.h>
  27. #include <asm/io.h>
  28. #include <asm/gpio.h>
  29. #include <asm/arch/stm32.h>
  30. #include <asm/arch/sys_proto.h>
  31. #include <jffs2/load_kernel.h>
  32. #include <power/regulator.h>
  33. #include <usb/dwc2_udc.h>
  34. /* SYSCFG registers */
  35. #define SYSCFG_BOOTR 0x00
  36. #define SYSCFG_PMCSETR 0x04
  37. #define SYSCFG_IOCTRLSETR 0x18
  38. #define SYSCFG_ICNR 0x1C
  39. #define SYSCFG_CMPCR 0x20
  40. #define SYSCFG_CMPENSETR 0x24
  41. #define SYSCFG_PMCCLRR 0x44
  42. #define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
  43. #define SYSCFG_BOOTR_BOOTPD_SHIFT 4
  44. #define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
  45. #define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
  46. #define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
  47. #define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
  48. #define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
  49. #define SYSCFG_CMPCR_SW_CTRL BIT(1)
  50. #define SYSCFG_CMPCR_READY BIT(8)
  51. #define SYSCFG_CMPENSETR_MPU_EN BIT(0)
  52. #define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
  53. #define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
  54. #define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
  55. #define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
  56. #define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0
  57. #define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21)
  58. #define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23)
  59. /*
  60. * Get a global data pointer
  61. */
  62. DECLARE_GLOBAL_DATA_PTR;
  63. #define USB_LOW_THRESHOLD_UV 200000
  64. #define USB_WARNING_LOW_THRESHOLD_UV 660000
  65. #define USB_START_LOW_THRESHOLD_UV 1230000
  66. #define USB_START_HIGH_THRESHOLD_UV 2150000
  67. int checkboard(void)
  68. {
  69. int ret;
  70. char *mode;
  71. u32 otp;
  72. struct udevice *dev;
  73. const char *fdt_compat;
  74. int fdt_compat_len;
  75. if (IS_ENABLED(CONFIG_STM32MP1_OPTEE))
  76. mode = "trusted with OP-TEE";
  77. else if (IS_ENABLED(CONFIG_STM32MP1_TRUSTED))
  78. mode = "trusted";
  79. else
  80. mode = "basic";
  81. printf("Board: stm32mp1 in %s mode", mode);
  82. fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
  83. &fdt_compat_len);
  84. if (fdt_compat && fdt_compat_len)
  85. printf(" (%s)", fdt_compat);
  86. puts("\n");
  87. ret = uclass_get_device_by_driver(UCLASS_MISC,
  88. DM_GET_DRIVER(stm32mp_bsec),
  89. &dev);
  90. if (!ret)
  91. ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
  92. &otp, sizeof(otp));
  93. if (ret > 0 && otp) {
  94. printf("Board: MB%04x Var%d Rev.%c-%02d\n",
  95. otp >> 16,
  96. (otp >> 12) & 0xF,
  97. ((otp >> 8) & 0xF) - 1 + 'A',
  98. otp & 0xF);
  99. }
  100. return 0;
  101. }
  102. static void board_key_check(void)
  103. {
  104. #if defined(CONFIG_FASTBOOT) || defined(CONFIG_CMD_STM32PROG)
  105. ofnode node;
  106. struct gpio_desc gpio;
  107. enum forced_boot_mode boot_mode = BOOT_NORMAL;
  108. node = ofnode_path("/config");
  109. if (!ofnode_valid(node)) {
  110. debug("%s: no /config node?\n", __func__);
  111. return;
  112. }
  113. #ifdef CONFIG_FASTBOOT
  114. if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
  115. &gpio, GPIOD_IS_IN)) {
  116. debug("%s: could not find a /config/st,fastboot-gpios\n",
  117. __func__);
  118. } else {
  119. if (dm_gpio_get_value(&gpio)) {
  120. puts("Fastboot key pressed, ");
  121. boot_mode = BOOT_FASTBOOT;
  122. }
  123. dm_gpio_free(NULL, &gpio);
  124. }
  125. #endif
  126. #ifdef CONFIG_CMD_STM32PROG
  127. if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
  128. &gpio, GPIOD_IS_IN)) {
  129. debug("%s: could not find a /config/st,stm32prog-gpios\n",
  130. __func__);
  131. } else {
  132. if (dm_gpio_get_value(&gpio)) {
  133. puts("STM32Programmer key pressed, ");
  134. boot_mode = BOOT_STM32PROG;
  135. }
  136. dm_gpio_free(NULL, &gpio);
  137. }
  138. #endif
  139. if (boot_mode != BOOT_NORMAL) {
  140. puts("entering download mode...\n");
  141. clrsetbits_le32(TAMP_BOOT_CONTEXT,
  142. TAMP_BOOT_FORCED_MASK,
  143. boot_mode);
  144. }
  145. #endif
  146. }
  147. #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
  148. /* STMicroelectronics STUSB1600 Type-C controller */
  149. #define STUSB1600_CC_CONNECTION_STATUS 0x0E
  150. /* STUSB1600_CC_CONNECTION_STATUS bitfields */
  151. #define STUSB1600_CC_ATTACH BIT(0)
  152. static int stusb1600_init(struct udevice **dev_stusb1600)
  153. {
  154. ofnode node;
  155. struct udevice *dev, *bus;
  156. int ret;
  157. u32 chip_addr;
  158. *dev_stusb1600 = NULL;
  159. /* if node stusb1600 is present, means DK1 or DK2 board */
  160. node = ofnode_by_compatible(ofnode_null(), "st,stusb1600");
  161. if (!ofnode_valid(node))
  162. return -ENODEV;
  163. ret = ofnode_read_u32(node, "reg", &chip_addr);
  164. if (ret)
  165. return -EINVAL;
  166. ret = uclass_get_device_by_ofnode(UCLASS_I2C, ofnode_get_parent(node),
  167. &bus);
  168. if (ret) {
  169. printf("bus for stusb1600 not found\n");
  170. return -ENODEV;
  171. }
  172. ret = dm_i2c_probe(bus, chip_addr, 0, &dev);
  173. if (!ret)
  174. *dev_stusb1600 = dev;
  175. return ret;
  176. }
  177. static int stusb1600_cable_connected(struct udevice *dev)
  178. {
  179. u8 status;
  180. if (dm_i2c_read(dev, STUSB1600_CC_CONNECTION_STATUS, &status, 1))
  181. return 0;
  182. return status & STUSB1600_CC_ATTACH;
  183. }
  184. #include <usb/dwc2_udc.h>
  185. int g_dnl_board_usb_cable_connected(void)
  186. {
  187. struct udevice *stusb1600;
  188. struct udevice *dwc2_udc_otg;
  189. int ret;
  190. if (!stusb1600_init(&stusb1600))
  191. return stusb1600_cable_connected(stusb1600);
  192. ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
  193. DM_GET_DRIVER(dwc2_udc_otg),
  194. &dwc2_udc_otg);
  195. if (!ret)
  196. debug("dwc2_udc_otg init failed\n");
  197. return dwc2_udc_B_session_valid(dwc2_udc_otg);
  198. }
  199. #endif /* CONFIG_USB_GADGET */
  200. #ifdef CONFIG_LED
  201. static int get_led(struct udevice **dev, char *led_string)
  202. {
  203. char *led_name;
  204. int ret;
  205. led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
  206. if (!led_name) {
  207. pr_debug("%s: could not find %s config string\n",
  208. __func__, led_string);
  209. return -ENOENT;
  210. }
  211. ret = led_get_by_label(led_name, dev);
  212. if (ret) {
  213. debug("%s: get=%d\n", __func__, ret);
  214. return ret;
  215. }
  216. return 0;
  217. }
  218. static int setup_led(enum led_state_t cmd)
  219. {
  220. struct udevice *dev;
  221. int ret;
  222. ret = get_led(&dev, "u-boot,boot-led");
  223. if (ret)
  224. return ret;
  225. ret = led_set_state(dev, cmd);
  226. return ret;
  227. }
  228. #endif
  229. static void __maybe_unused led_error_blink(u32 nb_blink)
  230. {
  231. #ifdef CONFIG_LED
  232. int ret;
  233. struct udevice *led;
  234. u32 i;
  235. #endif
  236. if (!nb_blink)
  237. return;
  238. #ifdef CONFIG_LED
  239. ret = get_led(&led, "u-boot,error-led");
  240. if (!ret) {
  241. /* make u-boot,error-led blinking */
  242. /* if U32_MAX and 125ms interval, for 17.02 years */
  243. for (i = 0; i < 2 * nb_blink; i++) {
  244. led_set_state(led, LEDST_TOGGLE);
  245. mdelay(125);
  246. WATCHDOG_RESET();
  247. }
  248. }
  249. #endif
  250. /* infinite: the boot process must be stopped */
  251. if (nb_blink == U32_MAX)
  252. hang();
  253. }
  254. #ifdef CONFIG_ADC
  255. static int board_check_usb_power(void)
  256. {
  257. struct ofnode_phandle_args adc_args;
  258. struct udevice *adc;
  259. ofnode node;
  260. unsigned int raw;
  261. int max_uV = 0;
  262. int min_uV = USB_START_HIGH_THRESHOLD_UV;
  263. int ret, uV, adc_count;
  264. u32 nb_blink;
  265. u8 i;
  266. node = ofnode_path("/config");
  267. if (!ofnode_valid(node)) {
  268. debug("%s: no /config node?\n", __func__);
  269. return -ENOENT;
  270. }
  271. /*
  272. * Retrieve the ADC channels devices and get measurement
  273. * for each of them
  274. */
  275. adc_count = ofnode_count_phandle_with_args(node, "st,adc_usb_pd",
  276. "#io-channel-cells");
  277. if (adc_count < 0) {
  278. if (adc_count == -ENOENT)
  279. return 0;
  280. pr_err("%s: can't find adc channel (%d)\n", __func__,
  281. adc_count);
  282. return adc_count;
  283. }
  284. for (i = 0; i < adc_count; i++) {
  285. if (ofnode_parse_phandle_with_args(node, "st,adc_usb_pd",
  286. "#io-channel-cells", 0, i,
  287. &adc_args)) {
  288. pr_debug("%s: can't find /config/st,adc_usb_pd\n",
  289. __func__);
  290. return 0;
  291. }
  292. ret = uclass_get_device_by_ofnode(UCLASS_ADC, adc_args.node,
  293. &adc);
  294. if (ret) {
  295. pr_err("%s: Can't get adc device(%d)\n", __func__,
  296. ret);
  297. return ret;
  298. }
  299. ret = adc_channel_single_shot(adc->name, adc_args.args[0],
  300. &raw);
  301. if (ret) {
  302. pr_err("%s: single shot failed for %s[%d]!\n",
  303. __func__, adc->name, adc_args.args[0]);
  304. return ret;
  305. }
  306. /* Convert to uV */
  307. if (!adc_raw_to_uV(adc, raw, &uV)) {
  308. if (uV > max_uV)
  309. max_uV = uV;
  310. if (uV < min_uV)
  311. min_uV = uV;
  312. pr_debug("%s: %s[%02d] = %u, %d uV\n", __func__,
  313. adc->name, adc_args.args[0], raw, uV);
  314. } else {
  315. pr_err("%s: Can't get uV value for %s[%d]\n",
  316. __func__, adc->name, adc_args.args[0]);
  317. }
  318. }
  319. /*
  320. * If highest value is inside 1.23 Volts and 2.10 Volts, that means
  321. * board is plugged on an USB-C 3A power supply and boot process can
  322. * continue.
  323. */
  324. if (max_uV > USB_START_LOW_THRESHOLD_UV &&
  325. max_uV <= USB_START_HIGH_THRESHOLD_UV &&
  326. min_uV <= USB_LOW_THRESHOLD_UV)
  327. return 0;
  328. pr_err("****************************************************\n");
  329. /*
  330. * If highest and lowest value are either both below
  331. * USB_LOW_THRESHOLD_UV or both above USB_LOW_THRESHOLD_UV, that
  332. * means USB TYPE-C is in unattached mode, this is an issue, make
  333. * u-boot,error-led blinking and stop boot process.
  334. */
  335. if ((max_uV > USB_LOW_THRESHOLD_UV &&
  336. min_uV > USB_LOW_THRESHOLD_UV) ||
  337. (max_uV <= USB_LOW_THRESHOLD_UV &&
  338. min_uV <= USB_LOW_THRESHOLD_UV)) {
  339. pr_err("* ERROR USB TYPE-C connection in unattached mode *\n");
  340. pr_err("* Check that USB TYPE-C cable is correctly plugged *\n");
  341. /* with 125ms interval, led will blink for 17.02 years ....*/
  342. nb_blink = U32_MAX;
  343. }
  344. if (max_uV > USB_LOW_THRESHOLD_UV &&
  345. max_uV <= USB_WARNING_LOW_THRESHOLD_UV &&
  346. min_uV <= USB_LOW_THRESHOLD_UV) {
  347. pr_err("* WARNING 500mA power supply detected *\n");
  348. nb_blink = 2;
  349. }
  350. if (max_uV > USB_WARNING_LOW_THRESHOLD_UV &&
  351. max_uV <= USB_START_LOW_THRESHOLD_UV &&
  352. min_uV <= USB_LOW_THRESHOLD_UV) {
  353. pr_err("* WARNING 1.5mA power supply detected *\n");
  354. nb_blink = 3;
  355. }
  356. /*
  357. * If highest value is above 2.15 Volts that means that the USB TypeC
  358. * supplies more than 3 Amp, this is not compliant with TypeC specification
  359. */
  360. if (max_uV > USB_START_HIGH_THRESHOLD_UV) {
  361. pr_err("* USB TYPE-C charger not compliant with *\n");
  362. pr_err("* specification *\n");
  363. pr_err("****************************************************\n\n");
  364. /* with 125ms interval, led will blink for 17.02 years ....*/
  365. nb_blink = U32_MAX;
  366. } else {
  367. pr_err("* Current too low, use a 3A power supply! *\n");
  368. pr_err("****************************************************\n\n");
  369. }
  370. led_error_blink(nb_blink);
  371. return 0;
  372. }
  373. #endif /* CONFIG_ADC */
  374. static void sysconf_init(void)
  375. {
  376. #ifndef CONFIG_STM32MP1_TRUSTED
  377. u8 *syscfg;
  378. #ifdef CONFIG_DM_REGULATOR
  379. struct udevice *pwr_dev;
  380. struct udevice *pwr_reg;
  381. struct udevice *dev;
  382. int ret;
  383. u32 otp = 0;
  384. #endif
  385. u32 bootr;
  386. syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
  387. /* interconnect update : select master using the port 1 */
  388. /* LTDC = AXI_M9 */
  389. /* GPU = AXI_M8 */
  390. /* today information is hardcoded in U-Boot */
  391. writel(BIT(9), syscfg + SYSCFG_ICNR);
  392. /* disable Pull-Down for boot pin connected to VDD */
  393. bootr = readl(syscfg + SYSCFG_BOOTR);
  394. bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
  395. bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
  396. writel(bootr, syscfg + SYSCFG_BOOTR);
  397. #ifdef CONFIG_DM_REGULATOR
  398. /* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
  399. * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
  400. * The customer will have to disable this for low frequencies
  401. * or if AFMUX is selected but the function not used, typically for
  402. * TRACE. Otherwise, impact on power consumption.
  403. *
  404. * WARNING:
  405. * enabling High Speed mode while VDD>2.7V
  406. * with the OTP product_below_2v5 (OTP 18, BIT 13)
  407. * erroneously set to 1 can damage the IC!
  408. * => U-Boot set the register only if VDD < 2.7V (in DT)
  409. * but this value need to be consistent with board design
  410. */
  411. ret = uclass_get_device_by_driver(UCLASS_PMIC,
  412. DM_GET_DRIVER(stm32mp_pwr_pmic),
  413. &pwr_dev);
  414. if (!ret) {
  415. ret = uclass_get_device_by_driver(UCLASS_MISC,
  416. DM_GET_DRIVER(stm32mp_bsec),
  417. &dev);
  418. if (ret) {
  419. pr_err("Can't find stm32mp_bsec driver\n");
  420. return;
  421. }
  422. ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
  423. if (ret > 0)
  424. otp = otp & BIT(13);
  425. /* get VDD = vdd-supply */
  426. ret = device_get_supply_regulator(pwr_dev, "vdd-supply",
  427. &pwr_reg);
  428. /* check if VDD is Low Voltage */
  429. if (!ret) {
  430. if (regulator_get_value(pwr_reg) < 2700000) {
  431. writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
  432. SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
  433. SYSCFG_IOCTRLSETR_HSLVEN_ETH |
  434. SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
  435. SYSCFG_IOCTRLSETR_HSLVEN_SPI,
  436. syscfg + SYSCFG_IOCTRLSETR);
  437. if (!otp)
  438. pr_err("product_below_2v5=0: HSLVEN protected by HW\n");
  439. } else {
  440. if (otp)
  441. pr_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
  442. }
  443. } else {
  444. debug("VDD unknown");
  445. }
  446. }
  447. #endif
  448. /* activate automatic I/O compensation
  449. * warning: need to ensure CSI enabled and ready in clock driver
  450. */
  451. writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
  452. while (!(readl(syscfg + SYSCFG_CMPCR) & SYSCFG_CMPCR_READY))
  453. ;
  454. clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
  455. #endif
  456. }
  457. #ifdef CONFIG_DM_REGULATOR
  458. /* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */
  459. static int dk2_i2c1_fix(void)
  460. {
  461. ofnode node;
  462. struct gpio_desc hdmi, audio;
  463. int ret = 0;
  464. node = ofnode_path("/soc/i2c@40012000/hdmi-transmitter@39");
  465. if (!ofnode_valid(node)) {
  466. pr_debug("%s: no hdmi-transmitter@39 ?\n", __func__);
  467. return -ENOENT;
  468. }
  469. if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
  470. &hdmi, GPIOD_IS_OUT)) {
  471. pr_debug("%s: could not find reset-gpios\n",
  472. __func__);
  473. return -ENOENT;
  474. }
  475. node = ofnode_path("/soc/i2c@40012000/cs42l51@4a");
  476. if (!ofnode_valid(node)) {
  477. pr_debug("%s: no cs42l51@4a ?\n", __func__);
  478. return -ENOENT;
  479. }
  480. if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
  481. &audio, GPIOD_IS_OUT)) {
  482. pr_debug("%s: could not find reset-gpios\n",
  483. __func__);
  484. return -ENOENT;
  485. }
  486. /* before power up, insure that HDMI and AUDIO IC is under reset */
  487. ret = dm_gpio_set_value(&hdmi, 1);
  488. if (ret) {
  489. pr_err("%s: can't set_value for hdmi_nrst gpio", __func__);
  490. goto error;
  491. }
  492. ret = dm_gpio_set_value(&audio, 1);
  493. if (ret) {
  494. pr_err("%s: can't set_value for audio_nrst gpio", __func__);
  495. goto error;
  496. }
  497. /* power-up audio IC */
  498. regulator_autoset_by_name("v1v8_audio", NULL);
  499. /* power-up HDMI IC */
  500. regulator_autoset_by_name("v1v2_hdmi", NULL);
  501. regulator_autoset_by_name("v3v3_hdmi", NULL);
  502. error:
  503. return ret;
  504. }
  505. static bool board_is_dk2(void)
  506. {
  507. if (CONFIG_IS_ENABLED(TARGET_STM32MP157C_DK2) &&
  508. of_machine_is_compatible("st,stm32mp157c-dk2"))
  509. return true;
  510. return false;
  511. }
  512. #endif
  513. /* board dependent setup after realloc */
  514. int board_init(void)
  515. {
  516. struct udevice *dev;
  517. /* address of boot parameters */
  518. gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100;
  519. /* probe all PINCTRL for hog */
  520. for (uclass_first_device(UCLASS_PINCTRL, &dev);
  521. dev;
  522. uclass_next_device(&dev)) {
  523. pr_debug("probe pincontrol = %s\n", dev->name);
  524. }
  525. board_key_check();
  526. #ifdef CONFIG_DM_REGULATOR
  527. if (board_is_dk2())
  528. dk2_i2c1_fix();
  529. regulators_enable_boot_on(_DEBUG);
  530. #endif
  531. sysconf_init();
  532. if (CONFIG_IS_ENABLED(CONFIG_LED))
  533. led_default_state();
  534. return 0;
  535. }
  536. int board_late_init(void)
  537. {
  538. char *boot_device;
  539. #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
  540. const void *fdt_compat;
  541. int fdt_compat_len;
  542. int ret;
  543. u32 otp;
  544. struct udevice *dev;
  545. char buf[10];
  546. fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
  547. &fdt_compat_len);
  548. if (fdt_compat && fdt_compat_len) {
  549. if (strncmp(fdt_compat, "st,", 3) != 0)
  550. env_set("board_name", fdt_compat);
  551. else
  552. env_set("board_name", fdt_compat + 3);
  553. }
  554. ret = uclass_get_device_by_driver(UCLASS_MISC,
  555. DM_GET_DRIVER(stm32mp_bsec),
  556. &dev);
  557. if (!ret)
  558. ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
  559. &otp, sizeof(otp));
  560. if (!ret && otp) {
  561. snprintf(buf, sizeof(buf), "0x%04x", otp >> 16);
  562. env_set("board_id", buf);
  563. snprintf(buf, sizeof(buf), "0x%04x",
  564. ((otp >> 8) & 0xF) - 1 + 0xA);
  565. env_set("board_rev", buf);
  566. }
  567. #endif
  568. #ifdef CONFIG_ADC
  569. /* for DK1/DK2 boards */
  570. board_check_usb_power();
  571. #endif /* CONFIG_ADC */
  572. /* Check the boot-source to disable bootdelay */
  573. boot_device = env_get("boot_device");
  574. if (!strcmp(boot_device, "serial") || !strcmp(boot_device, "usb"))
  575. env_set("bootdelay", "0");
  576. return 0;
  577. }
  578. void board_quiesce_devices(void)
  579. {
  580. #ifdef CONFIG_LED
  581. setup_led(LEDST_OFF);
  582. #endif
  583. }
  584. /* eth init function : weak called in eqos driver */
  585. int board_interface_eth_init(struct udevice *dev,
  586. phy_interface_t interface_type)
  587. {
  588. u8 *syscfg;
  589. u32 value;
  590. bool eth_clk_sel_reg = false;
  591. bool eth_ref_clk_sel_reg = false;
  592. /* Gigabit Ethernet 125MHz clock selection. */
  593. eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
  594. /* Ethernet 50Mhz RMII clock selection */
  595. eth_ref_clk_sel_reg =
  596. dev_read_bool(dev, "st,eth_ref_clk_sel");
  597. syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
  598. if (!syscfg)
  599. return -ENODEV;
  600. switch (interface_type) {
  601. case PHY_INTERFACE_MODE_MII:
  602. value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
  603. SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
  604. debug("%s: PHY_INTERFACE_MODE_MII\n", __func__);
  605. break;
  606. case PHY_INTERFACE_MODE_GMII:
  607. if (eth_clk_sel_reg)
  608. value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
  609. SYSCFG_PMCSETR_ETH_CLK_SEL;
  610. else
  611. value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
  612. debug("%s: PHY_INTERFACE_MODE_GMII\n", __func__);
  613. break;
  614. case PHY_INTERFACE_MODE_RMII:
  615. if (eth_ref_clk_sel_reg)
  616. value = SYSCFG_PMCSETR_ETH_SEL_RMII |
  617. SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
  618. else
  619. value = SYSCFG_PMCSETR_ETH_SEL_RMII;
  620. debug("%s: PHY_INTERFACE_MODE_RMII\n", __func__);
  621. break;
  622. case PHY_INTERFACE_MODE_RGMII:
  623. case PHY_INTERFACE_MODE_RGMII_ID:
  624. case PHY_INTERFACE_MODE_RGMII_RXID:
  625. case PHY_INTERFACE_MODE_RGMII_TXID:
  626. if (eth_clk_sel_reg)
  627. value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
  628. SYSCFG_PMCSETR_ETH_CLK_SEL;
  629. else
  630. value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
  631. debug("%s: PHY_INTERFACE_MODE_RGMII\n", __func__);
  632. break;
  633. default:
  634. debug("%s: Do not manage %d interface\n",
  635. __func__, interface_type);
  636. /* Do not manage others interfaces */
  637. return -EINVAL;
  638. }
  639. /* clear and set ETH configuration bits */
  640. writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
  641. SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
  642. syscfg + SYSCFG_PMCCLRR);
  643. writel(value, syscfg + SYSCFG_PMCSETR);
  644. return 0;
  645. }
  646. enum env_location env_get_location(enum env_operation op, int prio)
  647. {
  648. u32 bootmode = get_bootmode();
  649. if (prio)
  650. return ENVL_UNKNOWN;
  651. switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
  652. #ifdef CONFIG_ENV_IS_IN_EXT4
  653. case BOOT_FLASH_SD:
  654. case BOOT_FLASH_EMMC:
  655. return ENVL_EXT4;
  656. #endif
  657. #ifdef CONFIG_ENV_IS_IN_UBI
  658. case BOOT_FLASH_NAND:
  659. return ENVL_UBI;
  660. #endif
  661. #ifdef CONFIG_ENV_IS_IN_SPI_FLASH
  662. case BOOT_FLASH_NOR:
  663. return ENVL_SPI_FLASH;
  664. #endif
  665. default:
  666. return ENVL_NOWHERE;
  667. }
  668. }
  669. #if defined(CONFIG_ENV_IS_IN_EXT4)
  670. const char *env_ext4_get_intf(void)
  671. {
  672. u32 bootmode = get_bootmode();
  673. switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
  674. case BOOT_FLASH_SD:
  675. case BOOT_FLASH_EMMC:
  676. return "mmc";
  677. default:
  678. return "";
  679. }
  680. }
  681. const char *env_ext4_get_dev_part(void)
  682. {
  683. static char *const dev_part[] = {"0:auto", "1:auto", "2:auto"};
  684. u32 bootmode = get_bootmode();
  685. return dev_part[(bootmode & TAMP_BOOT_INSTANCE_MASK) - 1];
  686. }
  687. #endif
  688. #ifdef CONFIG_SYS_MTDPARTS_RUNTIME
  689. #define MTDPARTS_LEN 256
  690. #define MTDIDS_LEN 128
  691. /**
  692. * The mtdparts_nand0 and mtdparts_nor0 variable tends to be long.
  693. * If we need to access it before the env is relocated, then we need
  694. * to use our own stack buffer. gd->env_buf will be too small.
  695. *
  696. * @param buf temporary buffer pointer MTDPARTS_LEN long
  697. * @return mtdparts variable string, NULL if not found
  698. */
  699. static const char *env_get_mtdparts(const char *str, char *buf)
  700. {
  701. if (gd->flags & GD_FLG_ENV_READY)
  702. return env_get(str);
  703. if (env_get_f(str, buf, MTDPARTS_LEN) != -1)
  704. return buf;
  705. return NULL;
  706. }
  707. /**
  708. * update the variables "mtdids" and "mtdparts" with content of mtdparts_<dev>
  709. */
  710. static void board_get_mtdparts(const char *dev,
  711. char *mtdids,
  712. char *mtdparts)
  713. {
  714. char env_name[32] = "mtdparts_";
  715. char tmp_mtdparts[MTDPARTS_LEN];
  716. const char *tmp;
  717. /* name of env variable to read = mtdparts_<dev> */
  718. strcat(env_name, dev);
  719. tmp = env_get_mtdparts(env_name, tmp_mtdparts);
  720. if (tmp) {
  721. /* mtdids: "<dev>=<dev>, ...." */
  722. if (mtdids[0] != '\0')
  723. strcat(mtdids, ",");
  724. strcat(mtdids, dev);
  725. strcat(mtdids, "=");
  726. strcat(mtdids, dev);
  727. /* mtdparts: "mtdparts=<dev>:<mtdparts_<dev>>;..." */
  728. if (mtdparts[0] != '\0')
  729. strncat(mtdparts, ";", MTDPARTS_LEN);
  730. else
  731. strcat(mtdparts, "mtdparts=");
  732. strncat(mtdparts, dev, MTDPARTS_LEN);
  733. strncat(mtdparts, ":", MTDPARTS_LEN);
  734. strncat(mtdparts, tmp, MTDPARTS_LEN);
  735. }
  736. }
  737. void board_mtdparts_default(const char **mtdids, const char **mtdparts)
  738. {
  739. struct udevice *dev;
  740. static char parts[2 * MTDPARTS_LEN + 1];
  741. static char ids[MTDIDS_LEN + 1];
  742. static bool mtd_initialized;
  743. if (mtd_initialized) {
  744. *mtdids = ids;
  745. *mtdparts = parts;
  746. return;
  747. }
  748. memset(parts, 0, sizeof(parts));
  749. memset(ids, 0, sizeof(ids));
  750. if (!uclass_get_device(UCLASS_MTD, 0, &dev))
  751. board_get_mtdparts("nand0", ids, parts);
  752. if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev))
  753. board_get_mtdparts("nor0", ids, parts);
  754. mtd_initialized = true;
  755. *mtdids = ids;
  756. *mtdparts = parts;
  757. debug("%s:mtdids=%s & mtdparts=%s\n", __func__, ids, parts);
  758. }
  759. #endif
  760. #if defined(CONFIG_OF_BOARD_SETUP)
  761. int ft_board_setup(void *blob, bd_t *bd)
  762. {
  763. #ifdef CONFIG_FDT_FIXUP_PARTITIONS
  764. struct node_info nodes[] = {
  765. { "st,stm32f469-qspi", MTD_DEV_TYPE_NOR, },
  766. { "st,stm32mp15-fmc2", MTD_DEV_TYPE_NAND, },
  767. };
  768. fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
  769. #endif
  770. return 0;
  771. }
  772. #endif
  773. static void board_copro_image_process(ulong fw_image, size_t fw_size)
  774. {
  775. int ret, id = 0; /* Copro id fixed to 0 as only one coproc on mp1 */
  776. if (!rproc_is_initialized())
  777. if (rproc_init()) {
  778. printf("Remote Processor %d initialization failed\n",
  779. id);
  780. return;
  781. }
  782. ret = rproc_load(id, fw_image, fw_size);
  783. printf("Load Remote Processor %d with data@addr=0x%08lx %u bytes:%s\n",
  784. id, fw_image, fw_size, ret ? " Failed!" : " Success!");
  785. if (!ret) {
  786. rproc_start(id);
  787. env_set("copro_state", "booted");
  788. }
  789. }
  790. U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_COPRO, board_copro_image_process);