plx9030.c 5.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173
  1. /* Plx9030.c - system configuration module for PLX9030 PCI to Local Bus Bridge */
  2. /*
  3. * (C) Copyright 2002-2003
  4. * Josef Wagner, MicroSys GmbH, wagner@microsys.de.
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. *
  24. * Date Modification by
  25. * ------- ---------------------------------------------- ---
  26. * 30sep02 converted from VxWorks to LINUX wa
  27. */
  28. /*
  29. DESCRIPTION
  30. This is the configuration module for the PLX9030 PCI to Local Bus Bridge.
  31. It configures the Chip select lines for SRAM (CS0), ST16C552 (CS1,CS2), Display and local
  32. registers (CS3) on CPC45.
  33. */
  34. /* includes */
  35. #include <common.h>
  36. #include <malloc.h>
  37. #include <net.h>
  38. #include <asm/io.h>
  39. #include <pci.h>
  40. /* imports */
  41. /* defines */
  42. #define PLX9030_VENDOR_ID 0x10B5
  43. #define PLX9030_DEVICE_ID 0x9030
  44. #undef PLX_DEBUG
  45. /* PLX9030 register offsets */
  46. #define P9030_LAS0RR 0x00
  47. #define P9030_LAS1RR 0x04
  48. #define P9030_LAS2RR 0x08
  49. #define P9030_LAS3RR 0x0c
  50. #define P9030_EROMRR 0x10
  51. #define P9030_LAS0BA 0x14
  52. #define P9030_LAS1BA 0x18
  53. #define P9030_LAS2BA 0x1c
  54. #define P9030_LAS3BA 0x20
  55. #define P9030_EROMBA 0x24
  56. #define P9030_LAS0BRD 0x28
  57. #define P9030_LAS1BRD 0x2c
  58. #define P9030_LAS2BRD 0x30
  59. #define P9030_LAS3BRD 0x34
  60. #define P9030_EROMBRD 0x38
  61. #define P9030_CS0BASE 0x3C
  62. #define P9030_CS1BASE 0x40
  63. #define P9030_CS2BASE 0x44
  64. #define P9030_CS3BASE 0x48
  65. #define P9030_INTCSR 0x4c
  66. #define P9030_CNTRL 0x50
  67. #define P9030_GPIOC 0x54
  68. /* typedefs */
  69. /* locals */
  70. static struct pci_device_id supported[] = {
  71. { PLX9030_VENDOR_ID, PLX9030_DEVICE_ID },
  72. { }
  73. };
  74. /* forward declarations */
  75. void sysOutLong(ulong address, ulong value);
  76. /***************************************************************************
  77. *
  78. * Plx9030Init - init CS0..CS3 for CPC45
  79. *
  80. *
  81. * RETURNS: N/A
  82. */
  83. void Plx9030Init (void)
  84. {
  85. pci_dev_t devno;
  86. ulong membaseCsr; /* base address of device memory space */
  87. int idx = 0; /* general index */
  88. /* find plx9030 device */
  89. if ((devno = pci_find_devices(supported, idx++)) < 0)
  90. {
  91. printf("No PLX9030 device found !!\n");
  92. return;
  93. }
  94. #ifdef PLX_DEBUG
  95. printf("PLX 9030 device found ! devno = 0x%x\n",devno);
  96. #endif
  97. membaseCsr = PCI_PLX9030_MEMADDR;
  98. /* set base address */
  99. pci_write_config_dword(devno, PCI_BASE_ADDRESS_0, membaseCsr);
  100. /* enable mapped memory and IO addresses */
  101. pci_write_config_dword(devno,
  102. PCI_COMMAND,
  103. PCI_COMMAND_MEMORY |
  104. PCI_COMMAND_MASTER);
  105. /* configure GBIOC */
  106. sysOutLong((membaseCsr + P9030_GPIOC), 0x00000FC0); /* CS2/CS3 enable */
  107. /* configure CS0 (SRAM) */
  108. sysOutLong((membaseCsr + P9030_LAS0BA), 0x00000001); /* enable space base */
  109. sysOutLong((membaseCsr + P9030_LAS0RR), 0x0FE00000); /* 2 MByte */
  110. sysOutLong((membaseCsr + P9030_LAS0BRD), 0x51928900); /* 4 wait states */
  111. sysOutLong((membaseCsr + P9030_CS0BASE), 0x00100001); /* enable 2 MByte */
  112. /* remap CS0 (SRAM) */
  113. pci_write_config_dword(devno, PCI_BASE_ADDRESS_2, SRAM_BASE);
  114. /* configure CS1 (ST16552 / CHAN A) */
  115. sysOutLong((membaseCsr + P9030_LAS1BA), 0x00400001); /* enable space base */
  116. sysOutLong((membaseCsr + P9030_LAS1RR), 0x0FFFFF00); /* 256 byte */
  117. sysOutLong((membaseCsr + P9030_LAS1BRD), 0x55122900); /* 4 wait states */
  118. sysOutLong((membaseCsr + P9030_CS1BASE), 0x00400081); /* enable 256 Byte */
  119. /* remap CS1 (ST16552 / CHAN A) */
  120. /* remap CS1 (ST16552 / CHAN A) */
  121. pci_write_config_dword(devno, PCI_BASE_ADDRESS_3, ST16552_A_BASE);
  122. /* configure CS2 (ST16552 / CHAN B) */
  123. sysOutLong((membaseCsr + P9030_LAS2BA), 0x00800001); /* enable space base */
  124. sysOutLong((membaseCsr + P9030_LAS2RR), 0x0FFFFF00); /* 256 byte */
  125. sysOutLong((membaseCsr + P9030_LAS2BRD), 0x55122900); /* 4 wait states */
  126. sysOutLong((membaseCsr + P9030_CS2BASE), 0x00800081); /* enable 256 Byte */
  127. /* remap CS2 (ST16552 / CHAN B) */
  128. pci_write_config_dword(devno, PCI_BASE_ADDRESS_4, ST16552_B_BASE);
  129. /* configure CS3 (BCSR) */
  130. sysOutLong((membaseCsr + P9030_LAS3BA), 0x00C00001); /* enable space base */
  131. sysOutLong((membaseCsr + P9030_LAS3RR), 0x0FFFFF00); /* 256 byte */
  132. sysOutLong((membaseCsr + P9030_LAS3BRD), 0x55357A80); /* 9 wait states */
  133. sysOutLong((membaseCsr + P9030_CS3BASE), 0x00C00081); /* enable 256 Byte */
  134. /* remap CS3 (DISPLAY and BCSR) */
  135. pci_write_config_dword(devno, PCI_BASE_ADDRESS_5, BCSR_BASE);
  136. }
  137. void sysOutLong(ulong address, ulong value)
  138. {
  139. *(ulong*)address = cpu_to_le32(value);
  140. }