rx51.c 17 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2012
  4. * Ивайло Димитров <freemangordon@abv.bg>
  5. *
  6. * (C) Copyright 2011-2012
  7. * Pali Rohár <pali@kernel.org>
  8. *
  9. * (C) Copyright 2010
  10. * Alistair Buxton <a.j.buxton@gmail.com>
  11. *
  12. * Derived from Beagle Board and 3430 SDP code:
  13. * (C) Copyright 2004-2008
  14. * Texas Instruments, <www.ti.com>
  15. *
  16. * Author :
  17. * Sunil Kumar <sunilsaini05@gmail.com>
  18. * Shashi Ranjan <shashiranjanmca05@gmail.com>
  19. *
  20. * Richard Woodruff <r-woodruff2@ti.com>
  21. * Syed Mohammed Khasim <khasim@ti.com>
  22. */
  23. #include <common.h>
  24. #include <env.h>
  25. #include <watchdog.h>
  26. #include <malloc.h>
  27. #include <twl4030.h>
  28. #include <i2c.h>
  29. #include <video_fb.h>
  30. #include <asm/io.h>
  31. #include <asm/setup.h>
  32. #include <asm/bitops.h>
  33. #include <asm/mach-types.h>
  34. #include <asm/arch/mux.h>
  35. #include <asm/arch/sys_proto.h>
  36. #include <asm/arch/mmc_host_def.h>
  37. #include "rx51.h"
  38. #include "tag_omap.h"
  39. DECLARE_GLOBAL_DATA_PTR;
  40. GraphicDevice gdev;
  41. const omap3_sysinfo sysinfo = {
  42. DDR_STACKED,
  43. "Nokia RX-51",
  44. "OneNAND"
  45. };
  46. /* This structure contains default omap tags needed for booting Maemo 5 */
  47. static struct tag_omap omap[] = {
  48. OMAP_TAG_UART_CONFIG(0x04),
  49. OMAP_TAG_SERIAL_CONSOLE_CONFIG(0x03, 0x01C200),
  50. OMAP_TAG_LCD_CONFIG("acx565akm", "internal", 90, 0x18),
  51. OMAP_TAG_GPIO_SWITCH_CONFIG("cam_focus", 0x44, 0x1, 0x2, 0x0),
  52. OMAP_TAG_GPIO_SWITCH_CONFIG("cam_launch", 0x45, 0x1, 0x2, 0x0),
  53. OMAP_TAG_GPIO_SWITCH_CONFIG("cam_shutter", 0x6e, 0x1, 0x0, 0x0),
  54. OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_apeslpx", 0x46, 0x2, 0x2, 0x0),
  55. OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_bsi", 0x9d, 0x2, 0x2, 0x0),
  56. OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_en", 0x4a, 0x2, 0x2, 0x0),
  57. OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_rst", 0x4b, 0x6, 0x2, 0x0),
  58. OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_rst_rq", 0x49, 0x6, 0x2, 0x0),
  59. OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_wddis", 0x0d, 0x2, 0x2, 0x0),
  60. OMAP_TAG_GPIO_SWITCH_CONFIG("headphone", 0xb1, 0x1, 0x1, 0x0),
  61. OMAP_TAG_GPIO_SWITCH_CONFIG("kb_lock", 0x71, 0x1, 0x0, 0x0),
  62. OMAP_TAG_GPIO_SWITCH_CONFIG("proximity", 0x59, 0x0, 0x0, 0x0),
  63. OMAP_TAG_GPIO_SWITCH_CONFIG("sleep_ind", 0xa2, 0x2, 0x2, 0x0),
  64. OMAP_TAG_GPIO_SWITCH_CONFIG("slide", GPIO_SLIDE, 0x0, 0x0, 0x0),
  65. OMAP_TAG_WLAN_CX3110X_CONFIG(0x25, 0xff, 87, 42, -1),
  66. OMAP_TAG_PARTITION_CONFIG(PART1_NAME, PART1_SIZE * PART1_MULL,
  67. PART1_OFFS, PART1_MASK),
  68. OMAP_TAG_PARTITION_CONFIG(PART2_NAME, PART2_SIZE * PART2_MULL,
  69. PART2_OFFS, PART2_MASK),
  70. OMAP_TAG_PARTITION_CONFIG(PART3_NAME, PART3_SIZE * PART3_MULL,
  71. PART3_OFFS, PART3_MASK),
  72. OMAP_TAG_PARTITION_CONFIG(PART4_NAME, PART4_SIZE * PART4_MULL,
  73. PART4_OFFS, PART4_MASK),
  74. OMAP_TAG_PARTITION_CONFIG(PART5_NAME, PART5_SIZE * PART5_MULL,
  75. PART5_OFFS, PART5_MASK),
  76. OMAP_TAG_PARTITION_CONFIG(PART6_NAME, PART6_SIZE * PART6_MULL,
  77. PART6_OFFS, PART6_MASK),
  78. OMAP_TAG_BOOT_REASON_CONFIG("pwr_key"),
  79. OMAP_TAG_VERSION_STR_CONFIG("product", "RX-51"),
  80. OMAP_TAG_VERSION_STR_CONFIG("hw-build", "2101"),
  81. OMAP_TAG_VERSION_STR_CONFIG("nolo", "1.4.14"),
  82. OMAP_TAG_VERSION_STR_CONFIG("boot-mode", "normal"),
  83. { }
  84. };
  85. static char *boot_reason_ptr;
  86. static char *hw_build_ptr;
  87. static char *nolo_version_ptr;
  88. static char *boot_mode_ptr;
  89. /*
  90. * Routine: init_omap_tags
  91. * Description: Initialize pointers to values in tag_omap
  92. */
  93. static void init_omap_tags(void)
  94. {
  95. char *component;
  96. char *version;
  97. int i = 0;
  98. while (omap[i].hdr.tag) {
  99. switch (omap[i].hdr.tag) {
  100. case OMAP_TAG_BOOT_REASON:
  101. boot_reason_ptr = omap[i].u.boot_reason.reason_str;
  102. break;
  103. case OMAP_TAG_VERSION_STR:
  104. component = omap[i].u.version.component;
  105. version = omap[i].u.version.version;
  106. if (strcmp(component, "hw-build") == 0)
  107. hw_build_ptr = version;
  108. else if (strcmp(component, "nolo") == 0)
  109. nolo_version_ptr = version;
  110. else if (strcmp(component, "boot-mode") == 0)
  111. boot_mode_ptr = version;
  112. break;
  113. default:
  114. break;
  115. }
  116. i++;
  117. }
  118. }
  119. static void reuse_omap_atags(struct tag_omap *t)
  120. {
  121. char *component;
  122. char *version;
  123. while (t->hdr.tag) {
  124. switch (t->hdr.tag) {
  125. case OMAP_TAG_BOOT_REASON:
  126. memset(boot_reason_ptr, 0, 12);
  127. strcpy(boot_reason_ptr, t->u.boot_reason.reason_str);
  128. break;
  129. case OMAP_TAG_VERSION_STR:
  130. component = t->u.version.component;
  131. version = t->u.version.version;
  132. if (strcmp(component, "hw-build") == 0) {
  133. memset(hw_build_ptr, 0, 12);
  134. strcpy(hw_build_ptr, version);
  135. } else if (strcmp(component, "nolo") == 0) {
  136. memset(nolo_version_ptr, 0, 12);
  137. strcpy(nolo_version_ptr, version);
  138. } else if (strcmp(component, "boot-mode") == 0) {
  139. memset(boot_mode_ptr, 0, 12);
  140. strcpy(boot_mode_ptr, version);
  141. }
  142. break;
  143. default:
  144. break;
  145. }
  146. t = tag_omap_next(t);
  147. }
  148. }
  149. /*
  150. * Routine: reuse_atags
  151. * Description: Reuse atags from previous bootloader.
  152. * Reuse only only HW build, boot reason, boot mode and nolo
  153. */
  154. static void reuse_atags(void)
  155. {
  156. struct tag *t = (struct tag *)gd->bd->bi_boot_params;
  157. /* First tag must be ATAG_CORE */
  158. if (t->hdr.tag != ATAG_CORE)
  159. return;
  160. if (!boot_reason_ptr || !hw_build_ptr)
  161. return;
  162. /* Last tag must be ATAG_NONE */
  163. while (t->hdr.tag != ATAG_NONE) {
  164. switch (t->hdr.tag) {
  165. case ATAG_REVISION:
  166. memset(hw_build_ptr, 0, 12);
  167. sprintf(hw_build_ptr, "%x", t->u.revision.rev);
  168. break;
  169. case ATAG_BOARD:
  170. reuse_omap_atags((struct tag_omap *)&t->u);
  171. break;
  172. default:
  173. break;
  174. }
  175. t = tag_next(t);
  176. }
  177. }
  178. /*
  179. * Routine: board_init
  180. * Description: Early hardware init.
  181. */
  182. int board_init(void)
  183. {
  184. /* in SRAM or SDRAM, finish GPMC */
  185. gpmc_init();
  186. /* boot param addr */
  187. gd->bd->bi_boot_params = OMAP34XX_SDRC_CS0 + 0x100;
  188. return 0;
  189. }
  190. /*
  191. * Routine: get_board_revision
  192. * Description: Return board revision.
  193. */
  194. u32 get_board_rev(void)
  195. {
  196. return simple_strtol(hw_build_ptr, NULL, 16);
  197. }
  198. /*
  199. * Routine: setup_board_tags
  200. * Description: Append board specific boot tags.
  201. */
  202. void setup_board_tags(struct tag **in_params)
  203. {
  204. int setup_console_atag;
  205. char *setup_boot_reason_atag;
  206. char *setup_boot_mode_atag;
  207. char *str;
  208. int i;
  209. int size;
  210. int total_size;
  211. struct tag *params;
  212. struct tag_omap *t;
  213. params = (struct tag *)gd->bd->bi_boot_params;
  214. params->u.core.flags = 0x0;
  215. params->u.core.pagesize = 0x1000;
  216. params->u.core.rootdev = 0x0;
  217. /* append omap atag only if env setup_omap_atag is set to 1 */
  218. str = env_get("setup_omap_atag");
  219. if (!str || str[0] != '1')
  220. return;
  221. str = env_get("setup_console_atag");
  222. if (str && str[0] == '1')
  223. setup_console_atag = 1;
  224. else
  225. setup_console_atag = 0;
  226. setup_boot_reason_atag = env_get("setup_boot_reason_atag");
  227. setup_boot_mode_atag = env_get("setup_boot_mode_atag");
  228. params = *in_params;
  229. t = (struct tag_omap *)&params->u;
  230. total_size = sizeof(struct tag_header);
  231. for (i = 0; omap[i].hdr.tag; i++) {
  232. /* skip serial console tag */
  233. if (!setup_console_atag &&
  234. omap[i].hdr.tag == OMAP_TAG_SERIAL_CONSOLE)
  235. continue;
  236. size = omap[i].hdr.size + sizeof(struct tag_omap_header);
  237. memcpy(t, &omap[i], size);
  238. /* set uart tag to 0 - disable serial console */
  239. if (!setup_console_atag && omap[i].hdr.tag == OMAP_TAG_UART)
  240. t->u.uart.enabled_uarts = 0;
  241. /* change boot reason */
  242. if (setup_boot_reason_atag &&
  243. omap[i].hdr.tag == OMAP_TAG_BOOT_REASON) {
  244. memset(t->u.boot_reason.reason_str, 0, 12);
  245. strcpy(t->u.boot_reason.reason_str,
  246. setup_boot_reason_atag);
  247. }
  248. /* change boot mode */
  249. if (setup_boot_mode_atag &&
  250. omap[i].hdr.tag == OMAP_TAG_VERSION_STR &&
  251. strcmp(omap[i].u.version.component, "boot-mode") == 0) {
  252. memset(t->u.version.version, 0, 12);
  253. strcpy(t->u.version.version, setup_boot_mode_atag);
  254. }
  255. total_size += size;
  256. t = tag_omap_next(t);
  257. }
  258. params->hdr.tag = ATAG_BOARD;
  259. params->hdr.size = total_size >> 2;
  260. params = tag_next(params);
  261. *in_params = params;
  262. }
  263. /*
  264. * Routine: video_hw_init
  265. * Description: Set up the GraphicDevice depending on sys_boot.
  266. */
  267. void *video_hw_init(void)
  268. {
  269. /* fill in Graphic Device */
  270. gdev.frameAdrs = 0x8f9c0000;
  271. gdev.winSizeX = 800;
  272. gdev.winSizeY = 480;
  273. gdev.gdfBytesPP = 2;
  274. gdev.gdfIndex = GDF_16BIT_565RGB;
  275. memset((void *)gdev.frameAdrs, 0, 0xbb800);
  276. return (void *) &gdev;
  277. }
  278. /*
  279. * Routine: twl4030_regulator_set_mode
  280. * Description: Set twl4030 regulator mode over i2c powerbus.
  281. */
  282. static void twl4030_regulator_set_mode(u8 id, u8 mode)
  283. {
  284. u16 msg = MSG_SINGULAR(DEV_GRP_P1, id, mode);
  285. twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
  286. TWL4030_PM_MASTER_PB_WORD_MSB, msg >> 8);
  287. twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
  288. TWL4030_PM_MASTER_PB_WORD_LSB, msg & 0xff);
  289. }
  290. static void omap3_emu_romcode_call(u32 service_id, u32 *parameters)
  291. {
  292. u32 i, num_params = *parameters;
  293. u32 *sram_scratch_space = (u32 *)OMAP3_PUBLIC_SRAM_SCRATCH_AREA;
  294. /*
  295. * copy the parameters to an un-cached area to avoid coherency
  296. * issues
  297. */
  298. for (i = 0; i < num_params; i++) {
  299. __raw_writel(*parameters, sram_scratch_space);
  300. parameters++;
  301. sram_scratch_space++;
  302. }
  303. /* Now make the PPA call */
  304. do_omap3_emu_romcode_call(service_id, OMAP3_PUBLIC_SRAM_SCRATCH_AREA);
  305. }
  306. void omap3_set_aux_cr_secure(u32 acr)
  307. {
  308. struct emu_hal_params_rx51 emu_romcode_params = { 0, };
  309. emu_romcode_params.num_params = 2;
  310. emu_romcode_params.param1 = acr;
  311. omap3_emu_romcode_call(OMAP3_EMU_HAL_API_WRITE_ACR,
  312. (u32 *)&emu_romcode_params);
  313. }
  314. /*
  315. * Routine: omap3_update_aux_cr_secure_rx51
  316. * Description: Modify the contents Auxiliary Control Register.
  317. * Parameters:
  318. * set_bits - bits to set in ACR
  319. * clr_bits - bits to clear in ACR
  320. */
  321. static void omap3_update_aux_cr_secure_rx51(u32 set_bits, u32 clear_bits)
  322. {
  323. u32 acr;
  324. /* Read ACR */
  325. asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr));
  326. acr &= ~clear_bits;
  327. acr |= set_bits;
  328. omap3_set_aux_cr_secure(acr);
  329. }
  330. /*
  331. * Routine: misc_init_r
  332. * Description: Configure board specific parts.
  333. */
  334. int misc_init_r(void)
  335. {
  336. char buf[12];
  337. u8 state;
  338. /* reset lp5523 led */
  339. i2c_set_bus_num(1);
  340. state = 0xff;
  341. i2c_write(0x32, 0x3d, 1, &state, 1);
  342. i2c_set_bus_num(0);
  343. /* initialize twl4030 power managment */
  344. twl4030_power_init();
  345. /* set VSIM to 1.8V */
  346. twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VSIM_DEDICATED,
  347. TWL4030_PM_RECEIVER_VSIM_VSEL_18,
  348. TWL4030_PM_RECEIVER_VSIM_DEV_GRP,
  349. TWL4030_PM_RECEIVER_DEV_GRP_P1);
  350. /* store I2C access state */
  351. twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER, TWL4030_PM_MASTER_PB_CFG,
  352. &state);
  353. /* enable I2C access to powerbus (needed for twl4030 regulator) */
  354. twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, TWL4030_PM_MASTER_PB_CFG,
  355. 0x02);
  356. /* set VAUX3, VSIM and VMMC1 state to active - enable eMMC memory */
  357. twl4030_regulator_set_mode(RES_VAUX3, RES_STATE_ACTIVE);
  358. twl4030_regulator_set_mode(RES_VSIM, RES_STATE_ACTIVE);
  359. twl4030_regulator_set_mode(RES_VMMC1, RES_STATE_ACTIVE);
  360. /* restore I2C access state */
  361. twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, TWL4030_PM_MASTER_PB_CFG,
  362. state);
  363. /* set env variable attkernaddr for relocated kernel */
  364. sprintf(buf, "%#x", KERNEL_ADDRESS);
  365. env_set("attkernaddr", buf);
  366. /* initialize omap tags */
  367. init_omap_tags();
  368. /* reuse atags from previous bootloader */
  369. reuse_atags();
  370. omap_die_id_display();
  371. print_cpuinfo();
  372. /*
  373. * Cortex-A8(r1p0..r1p2) errata 430973 workaround
  374. * Set IBE bit in Auxiliary Control Register
  375. *
  376. * Call this routine only on real secure device
  377. * Qemu does not implement secure PPA and crash
  378. */
  379. if (get_device_type() == HS_DEVICE)
  380. omap3_update_aux_cr_secure_rx51(1 << 6, 0);
  381. return 0;
  382. }
  383. /*
  384. * Routine: set_muxconf_regs
  385. * Description: Setting up the configuration Mux registers specific to the
  386. * hardware. Many pins need to be moved from protect to primary
  387. * mode.
  388. */
  389. void set_muxconf_regs(void)
  390. {
  391. MUX_RX51();
  392. }
  393. static unsigned long int twl_wd_time; /* last time of watchdog reset */
  394. static unsigned long int twl_i2c_lock;
  395. /*
  396. * Routine: hw_watchdog_reset
  397. * Description: Reset timeout of twl4030 watchdog.
  398. */
  399. void hw_watchdog_reset(void)
  400. {
  401. u8 timeout = 0;
  402. /* do not reset watchdog too often - max every 4s */
  403. if (get_timer(twl_wd_time) < 4 * CONFIG_SYS_HZ)
  404. return;
  405. /* localy lock twl4030 i2c bus */
  406. if (test_and_set_bit(0, &twl_i2c_lock))
  407. return;
  408. /* read actual watchdog timeout */
  409. twl4030_i2c_read_u8(TWL4030_CHIP_PM_RECEIVER,
  410. TWL4030_PM_RECEIVER_WATCHDOG_CFG, &timeout);
  411. /* timeout 0 means watchdog is disabled */
  412. /* reset watchdog timeout to 31s (maximum) */
  413. if (timeout != 0)
  414. twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
  415. TWL4030_PM_RECEIVER_WATCHDOG_CFG, 31);
  416. /* store last watchdog reset time */
  417. twl_wd_time = get_timer(0);
  418. /* localy unlock twl4030 i2c bus */
  419. test_and_clear_bit(0, &twl_i2c_lock);
  420. }
  421. /*
  422. * TWL4030 keypad handler for cfb_console
  423. */
  424. static const char keymap[] = {
  425. /* normal */
  426. 'q', 'o', 'p', ',', '\b', 0, 'a', 's',
  427. 'w', 'd', 'f', 'g', 'h', 'j', 'k', 'l',
  428. 'e', '.', 0, '\r', 0, 'z', 'x', 'c',
  429. 'r', 'v', 'b', 'n', 'm', ' ', ' ', 0,
  430. 't', 0, 0, 0, 0, 0, 0, 0,
  431. 'y', 0, 0, 0, 0, 0, 0, 0,
  432. 'u', 0, 0, 0, 0, 0, 0, 0,
  433. 'i', 5, 6, 0, 0, 0, 0, 0,
  434. /* fn */
  435. '1', '9', '0', '=', '\b', 0, '*', '+',
  436. '2', '#', '-', '_', '(', ')', '&', '!',
  437. '3', '?', '^', '\r', 0, 156, '$', 238,
  438. '4', '/', '\\', '"', '\'', '@', 0, '<',
  439. '5', '|', '>', 0, 0, 0, 0, 0,
  440. '6', 0, 0, 0, 0, 0, 0, 0,
  441. '7', 0, 0, 0, 0, 0, 0, 0,
  442. '8', 16, 17, 0, 0, 0, 0, 0,
  443. };
  444. static u8 keys[8];
  445. static u8 old_keys[8] = {0, 0, 0, 0, 0, 0, 0, 0};
  446. #define KEYBUF_SIZE 32
  447. static u8 keybuf[KEYBUF_SIZE];
  448. static u8 keybuf_head;
  449. static u8 keybuf_tail;
  450. /*
  451. * Routine: rx51_kp_init
  452. * Description: Initialize HW keyboard.
  453. */
  454. int rx51_kp_init(void)
  455. {
  456. int ret = 0;
  457. u8 ctrl;
  458. ret = twl4030_i2c_read_u8(TWL4030_CHIP_KEYPAD,
  459. TWL4030_KEYPAD_KEYP_CTRL_REG, &ctrl);
  460. if (ret)
  461. return ret;
  462. /* turn on keyboard and use hardware scanning */
  463. ctrl |= TWL4030_KEYPAD_CTRL_KBD_ON;
  464. ctrl |= TWL4030_KEYPAD_CTRL_SOFT_NRST;
  465. ctrl |= TWL4030_KEYPAD_CTRL_SOFTMODEN;
  466. ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
  467. TWL4030_KEYPAD_KEYP_CTRL_REG, ctrl);
  468. /* enable key event status */
  469. ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
  470. TWL4030_KEYPAD_KEYP_IMR1, 0xfe);
  471. /* enable interrupt generation on rising and falling */
  472. /* this is a workaround for qemu twl4030 emulation */
  473. ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
  474. TWL4030_KEYPAD_KEYP_EDR, 0x57);
  475. /* enable ISR clear on read */
  476. ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
  477. TWL4030_KEYPAD_KEYP_SIH_CTRL, 0x05);
  478. return 0;
  479. }
  480. static void rx51_kp_fill(u8 k, u8 mods)
  481. {
  482. /* check if some cursor key without meta fn key was pressed */
  483. if (!(mods & 2) && (k == 18 || k == 31 || k == 33 || k == 34)) {
  484. keybuf[keybuf_tail++] = '\e';
  485. keybuf_tail %= KEYBUF_SIZE;
  486. keybuf[keybuf_tail++] = '[';
  487. keybuf_tail %= KEYBUF_SIZE;
  488. if (k == 18) /* up */
  489. keybuf[keybuf_tail++] = 'A';
  490. else if (k == 31) /* left */
  491. keybuf[keybuf_tail++] = 'D';
  492. else if (k == 33) /* down */
  493. keybuf[keybuf_tail++] = 'B';
  494. else if (k == 34) /* right */
  495. keybuf[keybuf_tail++] = 'C';
  496. keybuf_tail %= KEYBUF_SIZE;
  497. return;
  498. }
  499. if (mods & 2) { /* fn meta key was pressed */
  500. k = keymap[k+64];
  501. } else {
  502. k = keymap[k];
  503. if (mods & 1) { /* ctrl key was pressed */
  504. if (k >= 'a' && k <= 'z')
  505. k -= 'a' - 1;
  506. }
  507. if (mods & 4) { /* shift key was pressed */
  508. if (k >= 'a' && k <= 'z')
  509. k += 'A' - 'a';
  510. else if (k == '.')
  511. k = ':';
  512. else if (k == ',')
  513. k = ';';
  514. }
  515. }
  516. keybuf[keybuf_tail++] = k;
  517. keybuf_tail %= KEYBUF_SIZE;
  518. }
  519. /*
  520. * Routine: rx51_kp_tstc
  521. * Description: Test if key was pressed (from buffer).
  522. */
  523. int rx51_kp_tstc(struct stdio_dev *sdev)
  524. {
  525. u8 c, r, dk, i;
  526. u8 intr;
  527. u8 mods;
  528. /* localy lock twl4030 i2c bus */
  529. if (test_and_set_bit(0, &twl_i2c_lock))
  530. return 0;
  531. /* twl4030 remembers up to 2 events */
  532. for (i = 0; i < 2; i++) {
  533. /* check interrupt register for events */
  534. twl4030_i2c_read_u8(TWL4030_CHIP_KEYPAD,
  535. TWL4030_KEYPAD_KEYP_ISR1 + (2 * i), &intr);
  536. /* no event */
  537. if (!(intr&1))
  538. continue;
  539. /* read the key state */
  540. i2c_read(TWL4030_CHIP_KEYPAD,
  541. TWL4030_KEYPAD_FULL_CODE_7_0, 1, keys, 8);
  542. /* cut out modifier keys from the keystate */
  543. mods = keys[4] >> 4;
  544. keys[4] &= 0x0f;
  545. for (c = 0; c < 8; c++) {
  546. /* get newly pressed keys only */
  547. dk = ((keys[c] ^ old_keys[c])&keys[c]);
  548. old_keys[c] = keys[c];
  549. /* fill the keybuf */
  550. for (r = 0; r < 8; r++) {
  551. if (dk&1)
  552. rx51_kp_fill((c*8)+r, mods);
  553. dk = dk >> 1;
  554. }
  555. }
  556. }
  557. /* localy unlock twl4030 i2c bus */
  558. test_and_clear_bit(0, &twl_i2c_lock);
  559. return (KEYBUF_SIZE + keybuf_tail - keybuf_head)%KEYBUF_SIZE;
  560. }
  561. /*
  562. * Routine: rx51_kp_getc
  563. * Description: Get last pressed key (from buffer).
  564. */
  565. int rx51_kp_getc(struct stdio_dev *sdev)
  566. {
  567. keybuf_head %= KEYBUF_SIZE;
  568. while (!rx51_kp_tstc(sdev))
  569. WATCHDOG_RESET();
  570. return keybuf[keybuf_head++];
  571. }
  572. /*
  573. * Routine: board_mmc_init
  574. * Description: Initialize mmc devices.
  575. */
  576. int board_mmc_init(bd_t *bis)
  577. {
  578. omap_mmc_init(0, 0, 0, -1, -1);
  579. omap_mmc_init(1, 0, 0, -1, -1);
  580. return 0;
  581. }
  582. void board_mmc_power_init(void)
  583. {
  584. twl4030_power_mmc_init(0);
  585. twl4030_power_mmc_init(1);
  586. }