highbank.c 2.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2010-2011 Calxeda, Inc.
  4. */
  5. #include <common.h>
  6. #include <ahci.h>
  7. #include <cpu_func.h>
  8. #include <env.h>
  9. #include <fdt_support.h>
  10. #include <net.h>
  11. #include <netdev.h>
  12. #include <scsi.h>
  13. #include <linux/sizes.h>
  14. #include <asm/io.h>
  15. #define HB_AHCI_BASE 0xffe08000
  16. #define HB_SCU_A9_PWR_STATUS 0xfff10008
  17. #define HB_SREG_A9_PWR_REQ 0xfff3cf00
  18. #define HB_SREG_A9_BOOT_SRC_STAT 0xfff3cf04
  19. #define HB_SREG_A9_PWRDOM_STAT 0xfff3cf20
  20. #define HB_SREG_A15_PWR_CTRL 0xfff3c200
  21. #define HB_PWR_SUSPEND 0
  22. #define HB_PWR_SOFT_RESET 1
  23. #define HB_PWR_HARD_RESET 2
  24. #define HB_PWR_SHUTDOWN 3
  25. #define PWRDOM_STAT_SATA 0x80000000
  26. #define PWRDOM_STAT_PCI 0x40000000
  27. #define PWRDOM_STAT_EMMC 0x20000000
  28. #define HB_SCU_A9_PWR_NORMAL 0
  29. #define HB_SCU_A9_PWR_DORMANT 2
  30. #define HB_SCU_A9_PWR_OFF 3
  31. DECLARE_GLOBAL_DATA_PTR;
  32. void cphy_disable_overrides(void);
  33. /*
  34. * Miscellaneous platform dependent initialisations
  35. */
  36. int board_init(void)
  37. {
  38. icache_enable();
  39. return 0;
  40. }
  41. /* We know all the init functions have been run now */
  42. int board_eth_init(bd_t *bis)
  43. {
  44. int rc = 0;
  45. #ifdef CONFIG_CALXEDA_XGMAC
  46. rc += calxedaxgmac_initialize(0, 0xfff50000);
  47. rc += calxedaxgmac_initialize(1, 0xfff51000);
  48. #endif
  49. return rc;
  50. }
  51. #ifdef CONFIG_SCSI_AHCI_PLAT
  52. void scsi_init(void)
  53. {
  54. u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
  55. cphy_disable_overrides();
  56. if (reg & PWRDOM_STAT_SATA) {
  57. ahci_init((void __iomem *)HB_AHCI_BASE);
  58. scsi_scan(true);
  59. }
  60. }
  61. #endif
  62. #ifdef CONFIG_MISC_INIT_R
  63. int misc_init_r(void)
  64. {
  65. char envbuffer[16];
  66. u32 boot_choice;
  67. boot_choice = readl(HB_SREG_A9_BOOT_SRC_STAT) & 0xff;
  68. sprintf(envbuffer, "bootcmd%d", boot_choice);
  69. if (env_get(envbuffer)) {
  70. sprintf(envbuffer, "run bootcmd%d", boot_choice);
  71. env_set("bootcmd", envbuffer);
  72. } else
  73. env_set("bootcmd", "");
  74. return 0;
  75. }
  76. #endif
  77. int dram_init(void)
  78. {
  79. gd->ram_size = SZ_512M;
  80. return 0;
  81. }
  82. #if defined(CONFIG_OF_BOARD_SETUP)
  83. int ft_board_setup(void *fdt, bd_t *bd)
  84. {
  85. static const char disabled[] = "disabled";
  86. u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
  87. if (!(reg & PWRDOM_STAT_SATA))
  88. do_fixup_by_compat(fdt, "calxeda,hb-ahci", "status",
  89. disabled, sizeof(disabled), 1);
  90. if (!(reg & PWRDOM_STAT_EMMC))
  91. do_fixup_by_compat(fdt, "calxeda,hb-sdhci", "status",
  92. disabled, sizeof(disabled), 1);
  93. return 0;
  94. }
  95. #endif
  96. static int is_highbank(void)
  97. {
  98. uint32_t midr;
  99. asm volatile ("mrc p15, 0, %0, c0, c0, 0\n" : "=r"(midr));
  100. return (midr & 0xfff0) == 0xc090;
  101. }
  102. void reset_cpu(ulong addr)
  103. {
  104. writel(HB_PWR_HARD_RESET, HB_SREG_A9_PWR_REQ);
  105. if (is_highbank())
  106. writeb(HB_SCU_A9_PWR_OFF, HB_SCU_A9_PWR_STATUS);
  107. else
  108. writel(0x1, HB_SREG_A15_PWR_CTRL);
  109. wfi();
  110. }
  111. /*
  112. * turn off the override before transferring control to Linux, since Linux
  113. * may not support spread spectrum.
  114. */
  115. void arch_preboot_os(void)
  116. {
  117. cphy_disable_overrides();
  118. }