t104xrdb.c 3.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2013 Freescale Semiconductor, Inc.
  4. */
  5. #include <common.h>
  6. #include <command.h>
  7. #include <env.h>
  8. #include <fdt_support.h>
  9. #include <hwconfig.h>
  10. #include <image.h>
  11. #include <init.h>
  12. #include <netdev.h>
  13. #include <linux/compiler.h>
  14. #include <asm/mmu.h>
  15. #include <asm/processor.h>
  16. #include <asm/cache.h>
  17. #include <asm/immap_85xx.h>
  18. #include <asm/fsl_fdt.h>
  19. #include <asm/fsl_law.h>
  20. #include <asm/fsl_serdes.h>
  21. #include <asm/fsl_liodn.h>
  22. #include <fm_eth.h>
  23. #include "../common/sleep.h"
  24. #include "t104xrdb.h"
  25. #include "cpld.h"
  26. DECLARE_GLOBAL_DATA_PTR;
  27. int checkboard(void)
  28. {
  29. struct cpu_type *cpu = gd->arch.cpu;
  30. u8 sw;
  31. #if defined(CONFIG_TARGET_T1040D4RDB) || defined(CONFIG_TARGET_T1042D4RDB)
  32. printf("Board: %sD4RDB\n", cpu->name);
  33. #else
  34. printf("Board: %sRDB\n", cpu->name);
  35. #endif
  36. printf("Board rev: 0x%02x CPLD ver: 0x%02x, ",
  37. CPLD_READ(hw_ver), CPLD_READ(sw_ver));
  38. sw = CPLD_READ(flash_ctl_status);
  39. sw = ((sw & CPLD_LBMAP_MASK) >> CPLD_LBMAP_SHIFT);
  40. printf("vBank: %d\n", sw);
  41. return 0;
  42. }
  43. int board_early_init_f(void)
  44. {
  45. #if defined(CONFIG_DEEP_SLEEP)
  46. if (is_warm_boot())
  47. fsl_dp_disable_console();
  48. #endif
  49. return 0;
  50. }
  51. int board_early_init_r(void)
  52. {
  53. #ifdef CONFIG_SYS_FLASH_BASE
  54. const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
  55. int flash_esel = find_tlb_idx((void *)flashbase, 1);
  56. /*
  57. * Remap Boot flash region to caching-inhibited
  58. * so that flash can be erased properly.
  59. */
  60. /* Flush d-cache and invalidate i-cache of any FLASH data */
  61. flush_dcache();
  62. invalidate_icache();
  63. if (flash_esel == -1) {
  64. /* very unlikely unless something is messed up */
  65. puts("Error: Could not find TLB for FLASH BASE\n");
  66. flash_esel = 2; /* give our best effort to continue */
  67. } else {
  68. /* invalidate existing TLB entry for flash */
  69. disable_tlb(flash_esel);
  70. }
  71. set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
  72. MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
  73. 0, flash_esel, BOOKE_PAGESZ_256M, 1);
  74. #endif
  75. return 0;
  76. }
  77. int misc_init_r(void)
  78. {
  79. ccsr_gur_t __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
  80. u32 srds_s1;
  81. srds_s1 = in_be32(&gur->rcwsr[4]) >> 24;
  82. printf("SERDES Reference : 0x%X\n", srds_s1);
  83. /* select SGMII*/
  84. if (srds_s1 == 0x86)
  85. CPLD_WRITE(misc_ctl_status, CPLD_READ(misc_ctl_status) |
  86. MISC_CTL_SG_SEL);
  87. /* select SGMII and Aurora*/
  88. if (srds_s1 == 0x8E)
  89. CPLD_WRITE(misc_ctl_status, CPLD_READ(misc_ctl_status) |
  90. MISC_CTL_SG_SEL | MISC_CTL_AURORA_SEL);
  91. #if defined(CONFIG_TARGET_T1040D4RDB)
  92. if (hwconfig("qe-tdm")) {
  93. CPLD_WRITE(sfp_ctl_status, CPLD_READ(sfp_ctl_status) |
  94. MISC_MUX_QE_TDM);
  95. printf("QECSR : 0x%02x, mux to qe-tdm\n",
  96. CPLD_READ(sfp_ctl_status));
  97. }
  98. /* Mask all CPLD interrupt sources, except QSGMII interrupts */
  99. if (CPLD_READ(sw_ver) < 0x03) {
  100. debug("CPLD SW version 0x%02x doesn't support int_mask\n",
  101. CPLD_READ(sw_ver));
  102. } else {
  103. CPLD_WRITE(int_mask, CPLD_INT_MASK_ALL &
  104. ~(CPLD_INT_MASK_QSGMII1 | CPLD_INT_MASK_QSGMII2));
  105. }
  106. #endif
  107. return 0;
  108. }
  109. int ft_board_setup(void *blob, bd_t *bd)
  110. {
  111. phys_addr_t base;
  112. phys_size_t size;
  113. ft_cpu_setup(blob, bd);
  114. base = env_get_bootm_low();
  115. size = env_get_bootm_size();
  116. fdt_fixup_memory(blob, (u64)base, (u64)size);
  117. #ifdef CONFIG_PCI
  118. pci_of_setup(blob, bd);
  119. #endif
  120. fdt_fixup_liodn(blob);
  121. #ifdef CONFIG_HAS_FSL_DR_USB
  122. fsl_fdt_fixup_dr_usb(blob, bd);
  123. #endif
  124. #ifdef CONFIG_SYS_DPAA_FMAN
  125. fdt_fixup_fman_ethernet(blob);
  126. #endif
  127. if (hwconfig("qe-tdm"))
  128. fdt_del_diu(blob);
  129. return 0;
  130. }