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- /*
- * Copyright 2018-2019 NXP
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
- #include <common.h>
- #include <cpu_func.h>
- #include <hang.h>
- #include <image.h>
- #include <spl.h>
- #include <asm/io.h>
- #include <asm/mach-imx/iomux-v3.h>
- #include <asm/arch/clock.h>
- #include <asm/arch/imx8mn_pins.h>
- #include <asm/arch/sys_proto.h>
- #include <asm/mach-imx/boot_mode.h>
- #include <asm/arch/ddr.h>
- #include <dm/uclass.h>
- #include <dm/device.h>
- #include <dm/uclass-internal.h>
- #include <dm/device-internal.h>
- DECLARE_GLOBAL_DATA_PTR;
- int spl_board_boot_device(enum boot_device boot_dev_spl)
- {
- return BOOT_DEVICE_BOOTROM;
- }
- void spl_dram_init(void)
- {
- ddr_init(&dram_timing);
- }
- void spl_board_init(void)
- {
- struct udevice *dev;
- int ret;
- puts("Normal Boot\n");
- ret = uclass_get_device_by_name(UCLASS_CLK,
- "clock-controller@30380000",
- &dev);
- if (ret < 0)
- printf("Failed to find clock node. Check device tree\n");
- }
- #ifdef CONFIG_SPL_LOAD_FIT
- int board_fit_config_name_match(const char *name)
- {
- /* Just empty function now - can't decide what to choose */
- debug("%s: %s\n", __func__, name);
- return 0;
- }
- #endif
- #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
- #define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
- static iomux_v3_cfg_t const uart_pads[] = {
- IMX8MN_PAD_UART2_RXD__UART2_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
- IMX8MN_PAD_UART2_TXD__UART2_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
- };
- static iomux_v3_cfg_t const wdog_pads[] = {
- IMX8MN_PAD_GPIO1_IO02__WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL),
- };
- int board_early_init_f(void)
- {
- struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
- imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
- set_wdog_reset(wdog);
- imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
- init_uart_clk(1);
- return 0;
- }
- void board_init_f(ulong dummy)
- {
- int ret;
- arch_cpu_init();
- init_uart_clk(1);
- board_early_init_f();
- timer_init();
- preloader_console_init();
- /* Clear the BSS. */
- memset(__bss_start, 0, __bss_end - __bss_start);
- ret = spl_init();
- if (ret) {
- debug("spl_init() failed: %d\n", ret);
- hang();
- }
- enable_tzc380();
- /* DDR initialization */
- spl_dram_init();
- board_init_r(NULL, 0);
- }
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