rk3288_common.h 1.7 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2015 Google, Inc
  4. */
  5. #ifndef __CONFIG_RK3288_COMMON_H
  6. #define __CONFIG_RK3288_COMMON_H
  7. #include <asm/arch-rockchip/hardware.h>
  8. #include "rockchip-common.h"
  9. #define CONFIG_SYS_BOOTM_LEN (16 << 20) /* 16MB */
  10. #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
  11. #define CONFIG_SYS_CBSIZE 1024
  12. #define CONFIG_ROCKCHIP_STIMER_BASE 0xff810020
  13. #define COUNTER_FREQUENCY 24000000
  14. #define CONFIG_SYS_ARCH_TIMER
  15. #define CONFIG_SYS_HZ_CLOCK 24000000
  16. #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
  17. /* Bootrom will load u-boot binary to 0x0 once return from SPL */
  18. #endif
  19. #define CONFIG_SYS_INIT_SP_ADDR 0x00100000
  20. #define CONFIG_SYS_LOAD_ADDR 0x00800800
  21. #define CONFIG_SPL_STACK 0xff718000
  22. #define CONFIG_IRAM_BASE 0xff700000
  23. /* RAW SD card / eMMC locations. */
  24. #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
  25. /* FAT sd card locations. */
  26. #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
  27. #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
  28. #define CONFIG_SYS_SDRAM_BASE 0
  29. #define SDRAM_BANK_SIZE (2UL << 30)
  30. #define SDRAM_MAX_SIZE 0xfe000000
  31. #define CONFIG_SYS_MONITOR_LEN (600 * 1024)
  32. #ifndef CONFIG_SPL_BUILD
  33. #define ENV_MEM_LAYOUT_SETTINGS \
  34. "scriptaddr=0x00000000\0" \
  35. "pxefile_addr_r=0x00100000\0" \
  36. "fdt_addr_r=0x01f00000\0" \
  37. "kernel_addr_r=0x02000000\0" \
  38. "ramdisk_addr_r=0x04000000\0"
  39. #include <config_distro_bootcmd.h>
  40. /* Linux fails to load the fdt if it's loaded above 256M on a Rock 2 board, so
  41. * limit the fdt reallocation to that */
  42. #define CONFIG_EXTRA_ENV_SETTINGS \
  43. "fdt_high=0x0fffffff\0" \
  44. "initrd_high=0x0fffffff\0" \
  45. "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
  46. "partitions=" PARTS_DEFAULT \
  47. ENV_MEM_LAYOUT_SETTINGS \
  48. ROCKCHIP_DEVICE_SETTINGS \
  49. BOOTENV
  50. #endif
  51. #endif