vpac270.h 8.0 KB

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  1. /*
  2. * Voipac PXA270 configuration file
  3. *
  4. * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
  5. *
  6. * SPDX-License-Identifier: GPL-2.0+
  7. */
  8. #ifndef __CONFIG_H
  9. #define __CONFIG_H
  10. /*
  11. * High Level Board Configuration Options
  12. */
  13. #define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */
  14. #define CONFIG_VPAC270 1 /* Voipac PXA270 board */
  15. #define CONFIG_SYS_TEXT_BASE 0xa0000000
  16. #ifdef CONFIG_ONENAND
  17. #define CONFIG_SPL 1
  18. #define CONFIG_SPL_ONENAND_SUPPORT
  19. #define CONFIG_SPL_ONENAND_LOAD_ADDR 0x2000
  20. #define CONFIG_SPL_ONENAND_LOAD_SIZE \
  21. (512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR)
  22. #define CONFIG_SPL_TEXT_BASE 0x5c000000
  23. #define CONFIG_SPL_LDSCRIPT "board/vpac270/u-boot-spl.lds"
  24. #endif
  25. /*
  26. * Environment settings
  27. */
  28. #define CONFIG_ENV_OVERWRITE
  29. #define CONFIG_SYS_MALLOC_LEN (128*1024)
  30. #define CONFIG_ARCH_CPU_INIT
  31. #define CONFIG_BOOTCOMMAND \
  32. "if mmc init && fatload mmc 0 0xa4000000 uImage; then " \
  33. "bootm 0xa4000000; " \
  34. "fi; " \
  35. "if usb reset && fatload usb 0 0xa4000000 uImage; then " \
  36. "bootm 0xa4000000; " \
  37. "fi; " \
  38. "if ide reset && fatload ide 0 0xa4000000 uImage; then " \
  39. "bootm 0xa4000000; " \
  40. "fi; " \
  41. "bootm 0x60000;"
  42. #define CONFIG_EXTRA_ENV_SETTINGS \
  43. "update_onenand=" \
  44. "onenand erase 0x0 0x80000 ; " \
  45. "onenand write 0xa0000000 0x0 0x80000"
  46. #define CONFIG_BOOTARGS "console=tty0 console=ttyS0,115200"
  47. #define CONFIG_TIMESTAMP
  48. #define CONFIG_BOOTDELAY 2 /* Autoboot delay */
  49. #define CONFIG_CMDLINE_TAG
  50. #define CONFIG_SETUP_MEMORY_TAGS
  51. #define CONFIG_LZMA /* LZMA compression support */
  52. #define CONFIG_OF_LIBFDT
  53. /*
  54. * Serial Console Configuration
  55. */
  56. #define CONFIG_PXA_SERIAL
  57. #define CONFIG_FFUART 1
  58. #define CONFIG_CONS_INDEX 3
  59. #define CONFIG_BAUDRATE 115200
  60. /*
  61. * Bootloader Components Configuration
  62. */
  63. #include <config_cmd_default.h>
  64. #define CONFIG_CMD_NET
  65. #define CONFIG_CMD_ENV
  66. #undef CONFIG_CMD_IMLS
  67. #define CONFIG_CMD_MMC
  68. #define CONFIG_CMD_USB
  69. #undef CONFIG_LCD
  70. #define CONFIG_CMD_IDE
  71. #ifdef CONFIG_ONENAND
  72. #undef CONFIG_CMD_FLASH
  73. #define CONFIG_CMD_ONENAND
  74. #else
  75. #define CONFIG_CMD_FLASH
  76. #undef CONFIG_CMD_ONENAND
  77. #endif
  78. /*
  79. * Networking Configuration
  80. * chip on the Voipac PXA270 board
  81. */
  82. #ifdef CONFIG_CMD_NET
  83. #define CONFIG_CMD_PING
  84. #define CONFIG_CMD_DHCP
  85. #define CONFIG_DRIVER_DM9000 1
  86. #define CONFIG_DM9000_BASE 0x08000300 /* CS2 */
  87. #define DM9000_IO (CONFIG_DM9000_BASE)
  88. #define DM9000_DATA (CONFIG_DM9000_BASE + 4)
  89. #define CONFIG_NET_RETRY_COUNT 10
  90. #define CONFIG_BOOTP_BOOTFILESIZE
  91. #define CONFIG_BOOTP_BOOTPATH
  92. #define CONFIG_BOOTP_GATEWAY
  93. #define CONFIG_BOOTP_HOSTNAME
  94. #endif
  95. /*
  96. * MMC Card Configuration
  97. */
  98. #ifdef CONFIG_CMD_MMC
  99. #define CONFIG_MMC
  100. #define CONFIG_GENERIC_MMC
  101. #define CONFIG_PXA_MMC_GENERIC
  102. #define CONFIG_SYS_MMC_BASE 0xF0000000
  103. #define CONFIG_CMD_FAT
  104. #define CONFIG_CMD_EXT2
  105. #define CONFIG_DOS_PARTITION
  106. #endif
  107. /*
  108. * KGDB
  109. */
  110. #ifdef CONFIG_CMD_KGDB
  111. #define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */
  112. #endif
  113. /*
  114. * HUSH Shell Configuration
  115. */
  116. #define CONFIG_SYS_HUSH_PARSER 1
  117. #define CONFIG_SYS_LONGHELP
  118. #ifdef CONFIG_SYS_HUSH_PARSER
  119. #define CONFIG_SYS_PROMPT "$ "
  120. #else
  121. #endif
  122. #define CONFIG_SYS_CBSIZE 256
  123. #define CONFIG_SYS_PBSIZE \
  124. (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
  125. #define CONFIG_SYS_MAXARGS 16
  126. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
  127. #define CONFIG_SYS_DEVICE_NULLDEV 1
  128. #define CONFIG_CMDLINE_EDITING 1
  129. #define CONFIG_AUTO_COMPLETE 1
  130. /*
  131. * Clock Configuration
  132. */
  133. #define CONFIG_SYS_CPUSPEED 0x190 /* 312MHz */
  134. /*
  135. * DRAM Map
  136. */
  137. #define CONFIG_NR_DRAM_BANKS 2 /* 2 banks of DRAM */
  138. #define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
  139. #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
  140. #ifdef CONFIG_RAM_256M
  141. #define PHYS_SDRAM_2 0x80000000 /* SDRAM Bank #2 */
  142. #define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
  143. #endif
  144. #define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */
  145. #ifdef CONFIG_RAM_256M
  146. #define CONFIG_SYS_DRAM_SIZE 0x10000000 /* 256 MB DRAM */
  147. #else
  148. #define CONFIG_SYS_DRAM_SIZE 0x08000000 /* 128 MB DRAM */
  149. #endif
  150. #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
  151. #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
  152. #define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1
  153. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
  154. #define CONFIG_SYS_INIT_SP_ADDR 0x5c010000
  155. /*
  156. * NOR FLASH
  157. */
  158. #define CONFIG_SYS_MONITOR_BASE 0x0
  159. #define CONFIG_SYS_MONITOR_LEN 0x80000
  160. #define CONFIG_ENV_ADDR \
  161. (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
  162. #define CONFIG_ENV_SIZE 0x20000
  163. #define CONFIG_ENV_SECT_SIZE 0x20000
  164. #if defined(CONFIG_CMD_FLASH) /* NOR */
  165. #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
  166. #ifdef CONFIG_RAM_256M
  167. #define PHYS_FLASH_2 0x02000000 /* Flash Bank #2 */
  168. #endif
  169. #define CONFIG_SYS_FLASH_CFI
  170. #define CONFIG_FLASH_CFI_DRIVER 1
  171. #define CONFIG_SYS_MAX_FLASH_SECT (4 + 255)
  172. #ifdef CONFIG_RAM_256M
  173. #define CONFIG_SYS_MAX_FLASH_BANKS 2
  174. #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 }
  175. #else
  176. #define CONFIG_SYS_MAX_FLASH_BANKS 1
  177. #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
  178. #endif
  179. #define CONFIG_SYS_FLASH_ERASE_TOUT (25*CONFIG_SYS_HZ)
  180. #define CONFIG_SYS_FLASH_WRITE_TOUT (25*CONFIG_SYS_HZ)
  181. #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
  182. #define CONFIG_SYS_FLASH_PROTECTION 1
  183. #define CONFIG_ENV_IS_IN_FLASH 1
  184. #elif defined(CONFIG_CMD_ONENAND) /* OneNAND */
  185. #define CONFIG_SYS_NO_FLASH
  186. #define CONFIG_SYS_ONENAND_BASE 0x00000000
  187. #define CONFIG_ENV_IS_IN_ONENAND 1
  188. #else /* No flash */
  189. #define CONFIG_SYS_NO_FLASH
  190. #define CONFIG_SYS_ENV_IS_NOWHERE
  191. #endif
  192. /*
  193. * IDE
  194. */
  195. #ifdef CONFIG_CMD_IDE
  196. #define CONFIG_LBA48
  197. #undef CONFIG_IDE_LED
  198. #undef CONFIG_IDE_RESET
  199. #define __io
  200. #define CONFIG_SYS_IDE_MAXBUS 1
  201. #define CONFIG_SYS_IDE_MAXDEVICE 1
  202. #define CONFIG_SYS_ATA_BASE_ADDR 0x0c000000
  203. #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0
  204. #define CONFIG_SYS_ATA_DATA_OFFSET 0x120
  205. #define CONFIG_SYS_ATA_REG_OFFSET 0x120
  206. #define CONFIG_SYS_ATA_ALT_OFFSET 0x120
  207. #define CONFIG_SYS_ATA_STRIDE 2
  208. #endif
  209. /*
  210. * GPIO settings
  211. */
  212. #define CONFIG_SYS_GPSR0_VAL 0x01308800
  213. #define CONFIG_SYS_GPSR1_VAL 0x00cf0000
  214. #define CONFIG_SYS_GPSR2_VAL 0x922ac000
  215. #define CONFIG_SYS_GPSR3_VAL 0x0161e800
  216. #define CONFIG_SYS_GPCR0_VAL 0x00010000
  217. #define CONFIG_SYS_GPCR1_VAL 0x0
  218. #define CONFIG_SYS_GPCR2_VAL 0x0
  219. #define CONFIG_SYS_GPCR3_VAL 0x0
  220. #define CONFIG_SYS_GPDR0_VAL 0xcbb18800
  221. #define CONFIG_SYS_GPDR1_VAL 0xfccfa981
  222. #define CONFIG_SYS_GPDR2_VAL 0x922affff
  223. #define CONFIG_SYS_GPDR3_VAL 0x0161e904
  224. #define CONFIG_SYS_GAFR0_L_VAL 0x00100000
  225. #define CONFIG_SYS_GAFR0_U_VAL 0xa5da8510
  226. #define CONFIG_SYS_GAFR1_L_VAL 0x6992901a
  227. #define CONFIG_SYS_GAFR1_U_VAL 0xaaa5a0aa
  228. #define CONFIG_SYS_GAFR2_L_VAL 0xaaaaaaaa
  229. #define CONFIG_SYS_GAFR2_U_VAL 0x4109a401
  230. #define CONFIG_SYS_GAFR3_L_VAL 0x54010310
  231. #define CONFIG_SYS_GAFR3_U_VAL 0x00025401
  232. #define CONFIG_SYS_PSSR_VAL 0x30
  233. /*
  234. * Clock settings
  235. */
  236. #define CONFIG_SYS_CKEN 0x00500240
  237. #define CONFIG_SYS_CCCR 0x02000290
  238. /*
  239. * Memory settings
  240. */
  241. #define CONFIG_SYS_MSC0_VAL 0x3ffc95f9
  242. #define CONFIG_SYS_MSC1_VAL 0x02ccf974
  243. #define CONFIG_SYS_MSC2_VAL 0x00000000
  244. #ifdef CONFIG_RAM_256M
  245. #define CONFIG_SYS_MDCNFG_VAL 0x8ad30ad3
  246. #else
  247. #define CONFIG_SYS_MDCNFG_VAL 0x88000ad3
  248. #endif
  249. #define CONFIG_SYS_MDREFR_VAL 0x201fe01e
  250. #define CONFIG_SYS_MDMRS_VAL 0x00000000
  251. #define CONFIG_SYS_FLYCNFG_VAL 0x00000000
  252. #define CONFIG_SYS_SXCNFG_VAL 0x40044004
  253. #define CONFIG_SYS_MEM_BUF_IMP 0x0f
  254. /*
  255. * PCMCIA and CF Interfaces
  256. */
  257. #define CONFIG_SYS_MECR_VAL 0x00000001
  258. #define CONFIG_SYS_MCMEM0_VAL 0x00014307
  259. #define CONFIG_SYS_MCMEM1_VAL 0x00014307
  260. #define CONFIG_SYS_MCATT0_VAL 0x0001c787
  261. #define CONFIG_SYS_MCATT1_VAL 0x0001c787
  262. #define CONFIG_SYS_MCIO0_VAL 0x0001430f
  263. #define CONFIG_SYS_MCIO1_VAL 0x0001430f
  264. /*
  265. * LCD
  266. */
  267. #ifdef CONFIG_LCD
  268. #define CONFIG_VOIPAC_LCD
  269. #endif
  270. /*
  271. * USB
  272. */
  273. #ifdef CONFIG_CMD_USB
  274. #define CONFIG_USB_OHCI_NEW
  275. #define CONFIG_SYS_USB_OHCI_CPU_INIT
  276. #define CONFIG_SYS_USB_OHCI_BOARD_INIT
  277. #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
  278. #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x4C000000
  279. #define CONFIG_SYS_USB_OHCI_SLOT_NAME "vpac270"
  280. #define CONFIG_USB_STORAGE
  281. #endif
  282. #endif /* __CONFIG_H */