tricorder.h 12 KB

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  1. /*
  2. * (C) Copyright 2006-2008
  3. * Texas Instruments.
  4. * Richard Woodruff <r-woodruff2@ti.com>
  5. * Syed Mohammed Khasim <x0khasim@ti.com>
  6. *
  7. * (C) Copyright 2012
  8. * Corscience GmbH & Co. KG
  9. * Thomas Weber <weber@corscience.de>
  10. *
  11. * Configuration settings for the Tricorder board.
  12. *
  13. * SPDX-License-Identifier: GPL-2.0+
  14. */
  15. #ifndef __CONFIG_H
  16. #define __CONFIG_H
  17. /* High Level Configuration Options */
  18. #define CONFIG_OMAP /* in a TI OMAP core */
  19. #define CONFIG_OMAP34XX /* which is a 34XX */
  20. #define CONFIG_OMAP_COMMON
  21. #define CONFIG_MACH_TYPE MACH_TYPE_TRICORDER
  22. /*
  23. * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
  24. * 64 bytes before this address should be set aside for u-boot.img's
  25. * header. That is 0x800FFFC0--0x80100000 should not be used for any
  26. * other needs.
  27. */
  28. #define CONFIG_SYS_TEXT_BASE 0x80100000
  29. #define CONFIG_SDRC /* The chip has SDRC controller */
  30. #include <asm/arch/cpu.h> /* get chip and board defs */
  31. #include <asm/arch/omap3.h>
  32. #define CONFIG_SYS_GENERIC_BOARD
  33. /* Display CPU and Board information */
  34. #define CONFIG_DISPLAY_CPUINFO
  35. #define CONFIG_DISPLAY_BOARDINFO
  36. #define CONFIG_SILENT_CONSOLE
  37. #define CONFIG_ZERO_BOOTDELAY_CHECK
  38. /* Clock Defines */
  39. #define V_OSCK 26000000 /* Clock output from T2 */
  40. #define V_SCLK (V_OSCK >> 1)
  41. #define CONFIG_MISC_INIT_R
  42. #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
  43. #define CONFIG_SETUP_MEMORY_TAGS
  44. #define CONFIG_INITRD_TAG
  45. #define CONFIG_REVISION_TAG
  46. #define CONFIG_OF_LIBFDT
  47. /* Size of malloc() pool */
  48. #define CONFIG_SYS_MALLOC_LEN (1024*1024)
  49. /* Hardware drivers */
  50. /* GPIO support */
  51. #define CONFIG_OMAP_GPIO
  52. /* GPIO banks */
  53. #define CONFIG_OMAP3_GPIO_2 /* GPIO32..63 are in GPIO bank 2 */
  54. /* LED support */
  55. #define CONFIG_STATUS_LED
  56. #define CONFIG_BOARD_SPECIFIC_LED
  57. #define CONFIG_CMD_LED /* LED command */
  58. #define STATUS_LED_BIT (1 << 0)
  59. #define STATUS_LED_STATE STATUS_LED_ON
  60. #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
  61. #define STATUS_LED_BIT1 (1 << 1)
  62. #define STATUS_LED_STATE1 STATUS_LED_ON
  63. #define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2)
  64. #define STATUS_LED_BIT2 (1 << 2)
  65. #define STATUS_LED_STATE2 STATUS_LED_ON
  66. #define STATUS_LED_PERIOD2 (CONFIG_SYS_HZ / 2)
  67. /* NS16550 Configuration */
  68. #define CONFIG_SYS_NS16550
  69. #define CONFIG_SYS_NS16550_SERIAL
  70. #define CONFIG_SYS_NS16550_REG_SIZE (-4)
  71. #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
  72. /* select serial console configuration */
  73. #define CONFIG_CONS_INDEX 3
  74. #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
  75. #define CONFIG_SERIAL3 3
  76. #define CONFIG_BAUDRATE 115200
  77. #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
  78. 115200}
  79. /* MMC */
  80. #define CONFIG_GENERIC_MMC
  81. #define CONFIG_MMC
  82. #define CONFIG_OMAP_HSMMC
  83. #define CONFIG_DOS_PARTITION
  84. /* I2C */
  85. #define CONFIG_SYS_I2C
  86. #define CONFIG_SYS_OMAP24_I2C_SPEED 100000
  87. #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
  88. #define CONFIG_SYS_I2C_OMAP34XX
  89. /* EEPROM */
  90. #define CONFIG_SYS_I2C_MULTI_EEPROMS
  91. #define CONFIG_CMD_EEPROM
  92. #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
  93. #define CONFIG_SYS_EEPROM_BUS_NUM 1
  94. /* TWL4030 */
  95. #define CONFIG_TWL4030_POWER
  96. #define CONFIG_TWL4030_LED
  97. /* Board NAND Info */
  98. #define CONFIG_SYS_NO_FLASH /* no NOR flash */
  99. #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
  100. #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
  101. #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \
  102. "128k(SPL)," \
  103. "1m(u-boot)," \
  104. "384k(u-boot-env1)," \
  105. "1152k(mtdoops)," \
  106. "384k(u-boot-env2)," \
  107. "5m(kernel)," \
  108. "2m(fdt)," \
  109. "-(ubi)"
  110. #define CONFIG_NAND_OMAP_GPMC
  111. #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
  112. /* to access nand */
  113. #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
  114. /* to access nand at */
  115. /* CS0 */
  116. #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
  117. /* devices */
  118. #define CONFIG_BCH
  119. #define CONFIG_SYS_NAND_MAX_OOBFREE 2
  120. #define CONFIG_SYS_NAND_MAX_ECCPOS 56
  121. /* commands to include */
  122. #include <config_cmd_default.h>
  123. #define CONFIG_CMD_EXT2 /* EXT2 Support */
  124. #define CONFIG_CMD_FAT /* FAT support */
  125. #define CONFIG_CMD_I2C /* I2C serial bus support */
  126. #define CONFIG_CMD_MMC /* MMC support */
  127. #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
  128. #define CONFIG_CMD_NAND /* NAND support */
  129. #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */
  130. #define CONFIG_CMD_UBI /* UBI commands */
  131. #define CONFIG_CMD_UBIFS /* UBIFS commands */
  132. #define CONFIG_LZO /* LZO is needed for UBIFS */
  133. #undef CONFIG_CMD_NET
  134. #undef CONFIG_CMD_NFS
  135. #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
  136. #undef CONFIG_CMD_IMI /* iminfo */
  137. #undef CONFIG_CMD_JFFS2 /* JFFS2 Support */
  138. /* needed for ubi */
  139. #define CONFIG_RBTREE
  140. #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
  141. #define CONFIG_MTD_PARTITIONS
  142. /* Environment information (this is the common part) */
  143. #define CONFIG_BOOTDELAY 0
  144. /* hang() the board on panic() */
  145. #define CONFIG_PANIC_HANG
  146. /* environment placement (for NAND), is different for FLASHCARD but does not
  147. * harm there */
  148. #define CONFIG_ENV_OFFSET 0x120000 /* env start */
  149. #define CONFIG_ENV_OFFSET_REDUND 0x2A0000 /* redundant env start */
  150. #define CONFIG_ENV_SIZE (16 << 10) /* use 16KiB for env */
  151. #define CONFIG_ENV_RANGE (384 << 10) /* allow badblocks in env */
  152. /* the loadaddr is the same as CONFIG_SYS_LOAD_ADDR, unfortunately the defiend
  153. * value can not be used here! */
  154. #define CONFIG_LOADADDR 0x82000000
  155. #define CONFIG_COMMON_ENV_SETTINGS \
  156. "console=ttyO2,115200n8\0" \
  157. "mmcdev=0\0" \
  158. "vram=3M\0" \
  159. "defaultdisplay=lcd\0" \
  160. "kernelopts=mtdoops.mtddev=3\0" \
  161. "mtdparts=" MTDPARTS_DEFAULT "\0" \
  162. "mtdids=" MTDIDS_DEFAULT "\0" \
  163. "commonargs=" \
  164. "setenv bootargs console=${console} " \
  165. "${mtdparts} " \
  166. "${kernelopts} " \
  167. "vt.global_cursor_default=0 " \
  168. "vram=${vram} " \
  169. "omapdss.def_disp=${defaultdisplay}\0"
  170. #define CONFIG_BOOTCOMMAND "run autoboot"
  171. /* specific environment settings for different use cases
  172. * FLASHCARD: used to run a rdimage from sdcard to program the device
  173. * 'NORMAL': used to boot kernel from sdcard, nand, ...
  174. *
  175. * The main aim for the FLASHCARD skin is to have an embedded environment
  176. * which will not be influenced by any data already on the device.
  177. */
  178. #ifdef CONFIG_FLASHCARD
  179. #define CONFIG_ENV_IS_NOWHERE
  180. /* the rdaddr is 16 MiB before the loadaddr */
  181. #define CONFIG_ENV_RDADDR "rdaddr=0x81000000\0"
  182. #define CONFIG_EXTRA_ENV_SETTINGS \
  183. CONFIG_COMMON_ENV_SETTINGS \
  184. CONFIG_ENV_RDADDR \
  185. "autoboot=" \
  186. "run commonargs; " \
  187. "setenv bootargs ${bootargs} " \
  188. "flashy_updateimg=/dev/mmcblk0p1:corscience_update.img " \
  189. "rdinit=/sbin/init; " \
  190. "mmc dev ${mmcdev}; mmc rescan; " \
  191. "fatload mmc ${mmcdev} ${loadaddr} uImage; " \
  192. "fatload mmc ${mmcdev} ${rdaddr} uRamdisk; " \
  193. "bootm ${loadaddr} ${rdaddr}\0"
  194. #else /* CONFIG_FLASHCARD */
  195. #define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */
  196. #define CONFIG_ENV_IS_IN_NAND
  197. #define CONFIG_EXTRA_ENV_SETTINGS \
  198. CONFIG_COMMON_ENV_SETTINGS \
  199. "mmcargs=" \
  200. "run commonargs; " \
  201. "setenv bootargs ${bootargs} " \
  202. "root=/dev/mmcblk0p2 " \
  203. "rootwait " \
  204. "rw\0" \
  205. "nandargs=" \
  206. "run commonargs; " \
  207. "setenv bootargs ${bootargs} " \
  208. "root=ubi0:root " \
  209. "ubi.mtd=7 " \
  210. "rootfstype=ubifs " \
  211. "ro\0" \
  212. "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
  213. "bootscript=echo Running bootscript from mmc ...; " \
  214. "source ${loadaddr}\0" \
  215. "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
  216. "mmcboot=echo Booting from mmc ...; " \
  217. "run mmcargs; " \
  218. "bootm ${loadaddr}\0" \
  219. "loaduimage_ubi=ubi part ubi; " \
  220. "ubifsmount ubi:root; " \
  221. "ubifsload ${loadaddr} /boot/uImage\0" \
  222. "loaduimage_nand=nand read ${loadaddr} kernel 0x500000\0" \
  223. "nandboot=echo Booting from nand ...; " \
  224. "run nandargs; " \
  225. "run loaduimage_nand; " \
  226. "bootm ${loadaddr}\0" \
  227. "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
  228. "if run loadbootscript; then " \
  229. "run bootscript; " \
  230. "else " \
  231. "if run loaduimage; then " \
  232. "run mmcboot; " \
  233. "else run nandboot; " \
  234. "fi; " \
  235. "fi; " \
  236. "else run nandboot; fi\0"
  237. #endif /* CONFIG_FLASHCARD */
  238. /* Miscellaneous configurable options */
  239. #define CONFIG_SYS_LONGHELP /* undef to save memory */
  240. #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
  241. #define CONFIG_CMDLINE_EDITING /* enable cmdline history */
  242. #define CONFIG_AUTO_COMPLETE
  243. #define CONFIG_SYS_PROMPT "OMAP3 Tricorder # "
  244. #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
  245. /* Print Buffer Size */
  246. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
  247. sizeof(CONFIG_SYS_PROMPT) + 16)
  248. #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
  249. /* Boot Argument Buffer Size */
  250. #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
  251. #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x00000000)
  252. #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
  253. 0x07000000) /* 112 MB */
  254. #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000)
  255. /*
  256. * OMAP3 has 12 GP timers, they can be driven by the system clock
  257. * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
  258. * This rate is divided by a local divisor.
  259. */
  260. #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
  261. #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
  262. /* Physical Memory Map */
  263. #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
  264. #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
  265. #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
  266. /* NAND and environment organization */
  267. #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
  268. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
  269. #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
  270. #define CONFIG_SYS_INIT_RAM_SIZE 0x800
  271. #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
  272. CONFIG_SYS_INIT_RAM_SIZE - \
  273. GENERATED_GBL_DATA_SIZE)
  274. /* SRAM config */
  275. #define CONFIG_SYS_SRAM_START 0x40200000
  276. #define CONFIG_SYS_SRAM_SIZE 0x10000
  277. /* Defines for SPL */
  278. #define CONFIG_SPL 1
  279. #define CONFIG_SPL_FRAMEWORK
  280. #define CONFIG_SPL_NAND_SIMPLE
  281. #define CONFIG_SPL_BOARD_INIT
  282. #define CONFIG_SPL_GPIO_SUPPORT
  283. #define CONFIG_SPL_LIBCOMMON_SUPPORT
  284. #define CONFIG_SPL_LIBDISK_SUPPORT
  285. #define CONFIG_SPL_I2C_SUPPORT
  286. #define CONFIG_SPL_LIBGENERIC_SUPPORT
  287. #define CONFIG_SPL_SERIAL_SUPPORT
  288. #define CONFIG_SPL_POWER_SUPPORT
  289. #define CONFIG_SPL_NAND_SUPPORT
  290. #define CONFIG_SPL_NAND_BASE
  291. #define CONFIG_SPL_NAND_DRIVERS
  292. #define CONFIG_SPL_NAND_ECC
  293. #define CONFIG_SPL_MMC_SUPPORT
  294. #define CONFIG_SPL_FAT_SUPPORT
  295. #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
  296. #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
  297. #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
  298. #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
  299. #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
  300. #define CONFIG_SPL_MAX_SIZE (57 * 1024) /* 7 KB for stack */
  301. #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
  302. #define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
  303. #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
  304. /* NAND boot config */
  305. #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  306. #define CONFIG_SYS_NAND_PAGE_COUNT 64
  307. #define CONFIG_SYS_NAND_PAGE_SIZE 2048
  308. #define CONFIG_SYS_NAND_OOBSIZE 64
  309. #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
  310. #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
  311. #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
  312. 13, 14, 16, 17, 18, 19, 20, 21, 22, \
  313. 23, 24, 25, 26, 27, 28, 30, 31, 32, \
  314. 33, 34, 35, 36, 37, 38, 39, 40, 41, \
  315. 42, 44, 45, 46, 47, 48, 49, 50, 51, \
  316. 52, 53, 54, 55, 56}
  317. #define CONFIG_SYS_NAND_ECCSIZE 512
  318. #define CONFIG_SYS_NAND_ECCBYTES 13
  319. #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
  320. #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
  321. #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
  322. #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x100000
  323. #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
  324. #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
  325. #define CONFIG_SYS_ALT_MEMTEST
  326. #define CONFIG_SYS_MEMTEST_SCRATCH 0x81000000
  327. #endif /* __CONFIG_H */