sama5d3xek.h 7.7 KB

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  1. /*
  2. * Configuation settings for the SAMA5D3xEK board.
  3. *
  4. * Copyright (C) 2012 - 2013 Atmel
  5. *
  6. * based on at91sam9m10g45ek.h by:
  7. * Stelian Pop <stelian@popies.net>
  8. * Lead Tech Design <www.leadtechdesign.com>
  9. *
  10. * SPDX-License-Identifier: GPL-2.0+
  11. */
  12. #ifndef __CONFIG_H
  13. #define __CONFIG_H
  14. #include <asm/hardware.h>
  15. #define CONFIG_SYS_TEXT_BASE 0x26f00000
  16. /* ARM asynchronous clock */
  17. #define CONFIG_SYS_AT91_SLOW_CLOCK 32768
  18. #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
  19. #define CONFIG_ARCH_CPU_INIT
  20. #ifndef CONFIG_SPL_BUILD
  21. #define CONFIG_SKIP_LOWLEVEL_INIT
  22. #endif
  23. #define CONFIG_BOARD_EARLY_INIT_F
  24. #define CONFIG_DISPLAY_CPUINFO
  25. #define CONFIG_CMD_BOOTZ
  26. #define CONFIG_OF_LIBFDT /* Device Tree support */
  27. #define CONFIG_SYS_GENERIC_BOARD
  28. /* general purpose I/O */
  29. #define CONFIG_AT91_GPIO
  30. /* serial console */
  31. #define CONFIG_ATMEL_USART
  32. #define CONFIG_USART_BASE ATMEL_BASE_DBGU
  33. #define CONFIG_USART_ID ATMEL_ID_DBGU
  34. /*
  35. * This needs to be defined for the OHCI code to work but it is defined as
  36. * ATMEL_ID_UHPHS in the CPU specific header files.
  37. */
  38. #define ATMEL_ID_UHP ATMEL_ID_UHPHS
  39. /*
  40. * Specify the clock enable bit in the PMC_SCER register.
  41. */
  42. #define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
  43. /* LCD */
  44. #define CONFIG_LCD
  45. #define LCD_BPP LCD_COLOR16
  46. #define LCD_OUTPUT_BPP 24
  47. #define CONFIG_LCD_LOGO
  48. #define CONFIG_LCD_INFO
  49. #define CONFIG_LCD_INFO_BELOW_LOGO
  50. #define CONFIG_SYS_WHITE_ON_BLACK
  51. #define CONFIG_ATMEL_HLCD
  52. #define CONFIG_ATMEL_LCD_RGB565
  53. #define CONFIG_SYS_CONSOLE_IS_IN_ENV
  54. /* board specific (not enough SRAM) */
  55. #define CONFIG_SAMA5D3_LCD_BASE 0x23E00000
  56. #define CONFIG_BOOTDELAY 3
  57. /*
  58. * BOOTP options
  59. */
  60. #define CONFIG_BOOTP_BOOTFILESIZE
  61. #define CONFIG_BOOTP_BOOTPATH
  62. #define CONFIG_BOOTP_GATEWAY
  63. #define CONFIG_BOOTP_HOSTNAME
  64. /* No NOR flash */
  65. #define CONFIG_SYS_NO_FLASH
  66. /*
  67. * Command line configuration.
  68. */
  69. #include <config_cmd_default.h>
  70. #undef CONFIG_CMD_FPGA
  71. #undef CONFIG_CMD_IMI
  72. #undef CONFIG_CMD_LOADS
  73. #define CONFIG_CMD_PING
  74. #define CONFIG_CMD_DHCP
  75. /* SDRAM */
  76. #define CONFIG_NR_DRAM_BANKS 1
  77. #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
  78. #define CONFIG_SYS_SDRAM_SIZE 0x20000000
  79. #ifdef CONFIG_SPL_BUILD
  80. #define CONFIG_SYS_INIT_SP_ADDR 0x310000
  81. #else
  82. #define CONFIG_SYS_INIT_SP_ADDR \
  83. (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
  84. #endif
  85. /* SerialFlash */
  86. #define CONFIG_CMD_SF
  87. #ifdef CONFIG_CMD_SF
  88. #define CONFIG_ATMEL_SPI
  89. #define CONFIG_SPI_FLASH
  90. #define CONFIG_SPI_FLASH_ATMEL
  91. #define CONFIG_SF_DEFAULT_SPEED 30000000
  92. #endif
  93. /* NAND flash */
  94. #define CONFIG_CMD_NAND
  95. #ifdef CONFIG_CMD_NAND
  96. #define CONFIG_NAND_ATMEL
  97. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  98. #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
  99. /* our ALE is AD21 */
  100. #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
  101. /* our CLE is AD22 */
  102. #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
  103. #define CONFIG_SYS_NAND_ONFI_DETECTION
  104. /* PMECC & PMERRLOC */
  105. #define CONFIG_ATMEL_NAND_HWECC
  106. #define CONFIG_ATMEL_NAND_HW_PMECC
  107. #define CONFIG_PMECC_CAP 4
  108. #define CONFIG_PMECC_SECTOR_SIZE 512
  109. #define CONFIG_CMD_NAND_TRIMFFS
  110. #endif
  111. /* Ethernet Hardware */
  112. #define CONFIG_MACB
  113. #define CONFIG_RMII
  114. #define CONFIG_NET_RETRY_COUNT 20
  115. #define CONFIG_MACB_SEARCH_PHY
  116. #define CONFIG_RGMII
  117. #define CONFIG_CMD_MII
  118. #define CONFIG_PHYLIB
  119. #define CONFIG_PHY_MICREL
  120. #define CONFIG_PHY_MICREL_KSZ9021
  121. /* MMC */
  122. #define CONFIG_CMD_MMC
  123. #ifdef CONFIG_CMD_MMC
  124. #define CONFIG_MMC
  125. #define CONFIG_GENERIC_MMC
  126. #define CONFIG_GENERIC_ATMEL_MCI
  127. #define ATMEL_BASE_MMCI ATMEL_BASE_MCI0
  128. #endif
  129. /* USB */
  130. #define CONFIG_CMD_USB
  131. #ifdef CONFIG_CMD_USB
  132. #define CONFIG_USB_ATMEL
  133. #define CONFIG_USB_ATMEL_CLK_SEL_UPLL
  134. #define CONFIG_USB_OHCI_NEW
  135. #define CONFIG_SYS_USB_OHCI_CPU_INIT
  136. #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
  137. #define CONFIG_SYS_USB_OHCI_SLOT_NAME "sama5d3"
  138. #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
  139. #define CONFIG_DOS_PARTITION
  140. #define CONFIG_USB_STORAGE
  141. #endif
  142. /* USB device */
  143. #define CONFIG_USB_GADGET
  144. #define CONFIG_USB_GADGET_DUALSPEED
  145. #define CONFIG_USB_GADGET_ATMEL_USBA
  146. #define CONFIG_USB_ETHER
  147. #define CONFIG_USB_ETH_RNDIS
  148. #define CONFIG_USBNET_MANUFACTURER "Atmel SAMA5D3xEK"
  149. #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
  150. #define CONFIG_CMD_FAT
  151. #endif
  152. #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
  153. #ifdef CONFIG_SYS_USE_SERIALFLASH
  154. /* bootstrap + u-boot + env + linux in serial flash */
  155. #define CONFIG_ENV_IS_IN_SPI_FLASH
  156. #define CONFIG_ENV_OFFSET 0x5000
  157. #define CONFIG_ENV_SIZE 0x3000
  158. #define CONFIG_ENV_SECT_SIZE 0x1000
  159. #define CONFIG_BOOTCOMMAND "sf probe 0; " \
  160. "sf read 0x22000000 0x42000 0x300000; " \
  161. "bootm 0x22000000"
  162. #elif CONFIG_SYS_USE_NANDFLASH
  163. /* bootstrap + u-boot + env in nandflash */
  164. #define CONFIG_ENV_IS_IN_NAND
  165. #define CONFIG_ENV_OFFSET 0xc0000
  166. #define CONFIG_ENV_OFFSET_REDUND 0x100000
  167. #define CONFIG_ENV_SIZE 0x20000
  168. #define CONFIG_BOOTCOMMAND "nand read 0x21000000 0x180000 0x80000;" \
  169. "nand read 0x22000000 0x200000 0x600000;" \
  170. "bootm 0x22000000 - 0x21000000"
  171. #elif CONFIG_SYS_USE_MMC
  172. /* bootstrap + u-boot + env in sd card */
  173. #define CONFIG_ENV_IS_IN_MMC
  174. #define CONFIG_ENV_OFFSET 0x2000
  175. #define CONFIG_ENV_SIZE 0x1000
  176. #define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 dtb; " \
  177. "fatload mmc 0:1 0x22000000 uImage; " \
  178. "bootm 0x22000000 - 0x21000000"
  179. #define CONFIG_SYS_MMC_ENV_DEV 0
  180. #else
  181. #define CONFIG_ENV_IS_NOWHERE
  182. #endif
  183. #ifdef CONFIG_SYS_USE_MMC
  184. #define CONFIG_BOOTARGS \
  185. "console=ttyS0,115200 earlyprintk " \
  186. "root=/dev/mmcblk0p2 rw rootwait"
  187. #else
  188. #define CONFIG_BOOTARGS \
  189. "console=ttyS0,115200 earlyprintk " \
  190. "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
  191. "256K(env),256k(evn_redundent),256k(spare)," \
  192. "512k(dtb),6M(kernel)ro,-(rootfs) " \
  193. "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
  194. #endif
  195. #define CONFIG_BAUDRATE 115200
  196. #define CONFIG_SYS_PROMPT "U-Boot> "
  197. #define CONFIG_SYS_CBSIZE 256
  198. #define CONFIG_SYS_MAXARGS 16
  199. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
  200. sizeof(CONFIG_SYS_PROMPT) + 16)
  201. #define CONFIG_SYS_LONGHELP
  202. #define CONFIG_CMDLINE_EDITING
  203. #define CONFIG_AUTO_COMPLETE
  204. #define CONFIG_SYS_HUSH_PARSER
  205. /* Size of malloc() pool */
  206. #define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
  207. /* SPL */
  208. #define CONFIG_SPL 1
  209. #define CONFIG_SPL_FRAMEWORK
  210. #define CONFIG_SPL_TEXT_BASE 0x300000
  211. #define CONFIG_SPL_MAX_SIZE 0x10000
  212. #define CONFIG_SPL_BSS_START_ADDR 0x20000000
  213. #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
  214. #define CONFIG_SYS_SPL_MALLOC_START 0x20080000
  215. #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
  216. #define CONFIG_SPL_LIBCOMMON_SUPPORT
  217. #define CONFIG_SPL_LIBGENERIC_SUPPORT
  218. #define CONFIG_SPL_GPIO_SUPPORT
  219. #define CONFIG_SPL_SERIAL_SUPPORT
  220. #define CONFIG_SPL_BOARD_INIT
  221. #define CONFIG_SYS_MONITOR_LEN (512 << 10)
  222. #ifdef CONFIG_SYS_USE_MMC
  223. #define CONFIG_SPL_LDSCRIPT arch/arm/cpu/at91-common/u-boot-spl.lds
  224. #define CONFIG_SPL_MMC_SUPPORT
  225. #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
  226. #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
  227. #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
  228. #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
  229. #define CONFIG_SPL_FAT_SUPPORT
  230. #define CONFIG_SPL_LIBDISK_SUPPORT
  231. #elif CONFIG_SYS_USE_NANDFLASH
  232. #define CONFIG_SPL_NAND_SUPPORT
  233. #define CONFIG_SPL_NAND_DRIVERS
  234. #define CONFIG_SPL_NAND_BASE
  235. #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
  236. #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  237. #define CONFIG_SYS_NAND_PAGE_SIZE 0x800
  238. #define CONFIG_SYS_NAND_PAGE_COUNT 64
  239. #define CONFIG_SYS_NAND_OOBSIZE 64
  240. #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
  241. #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
  242. #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
  243. #elif CONFIG_SYS_USE_SERIALFLASH
  244. #define CONFIG_SPL_SPI_SUPPORT
  245. #define CONFIG_SPL_SPI_FLASH_SUPPORT
  246. #define CONFIG_SPL_SPI_LOAD
  247. #define CONFIG_SPL_SPI_BUS 0
  248. #define CONFIG_SPL_SPI_CS 0
  249. #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
  250. #endif
  251. #endif