omap3_evm_common.h 7.8 KB

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  1. /*
  2. * Common configuration settings for the TI OMAP3 EVM board.
  3. *
  4. * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * SPDX-License-Identifier: GPL-2.0+
  7. */
  8. #ifndef __OMAP3_EVM_COMMON_H
  9. #define __OMAP3_EVM_COMMON_H
  10. /*
  11. * High level configuration options
  12. */
  13. #define CONFIG_OMAP /* This is TI OMAP core */
  14. #define CONFIG_OMAP34XX /* belonging to 34XX family */
  15. #define CONFIG_OMAP_GPIO
  16. #define CONFIG_OMAP_COMMON
  17. #define CONFIG_SDRC /* The chip has SDRC controller */
  18. #define CONFIG_OMAP3_EVM /* This is a OMAP3 EVM */
  19. #define CONFIG_TWL4030_POWER /* with TWL4030 PMIC */
  20. /*
  21. * Clock related definitions
  22. */
  23. #define V_OSCK 26000000 /* Clock output from T2 */
  24. #define V_SCLK (V_OSCK >> 1)
  25. /*
  26. * OMAP3 has 12 GP timers, they can be driven by the system clock
  27. * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
  28. * This rate is divided by a local divisor.
  29. */
  30. #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
  31. #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
  32. /* Size of environment - 128KB */
  33. #define CONFIG_ENV_SIZE (128 << 10)
  34. /* Size of malloc pool */
  35. #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
  36. /*
  37. * Physical Memory Map
  38. * Note 1: CS1 may or may not be populated
  39. * Note 2: SDRAM size is expected to be at least 32MB
  40. */
  41. #define CONFIG_NR_DRAM_BANKS 2
  42. #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
  43. #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
  44. /* Limits for memtest */
  45. #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
  46. #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
  47. 0x01F00000) /* 31MB */
  48. /* Default load address */
  49. #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
  50. /* -----------------------------------------------------------------------------
  51. * Hardware drivers
  52. * -----------------------------------------------------------------------------
  53. */
  54. /*
  55. * NS16550 Configuration
  56. */
  57. #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
  58. #define CONFIG_SYS_NS16550
  59. #define CONFIG_SYS_NS16550_SERIAL
  60. #define CONFIG_SYS_NS16550_REG_SIZE (-4)
  61. #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
  62. /*
  63. * select serial console configuration
  64. */
  65. #define CONFIG_CONS_INDEX 1
  66. #define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */
  67. #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
  68. #define CONFIG_BAUDRATE 115200
  69. #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
  70. 115200}
  71. /*
  72. * I2C
  73. */
  74. #define CONFIG_SYS_I2C
  75. #define CONFIG_SYS_OMAP24_I2C_SPEED 100000
  76. #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
  77. #define CONFIG_SYS_I2C_OMAP34XX
  78. /*
  79. * PISMO support
  80. */
  81. /* Monitor at start of flash - Reserve 2 sectors */
  82. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
  83. #define CONFIG_SYS_MONITOR_LEN (256 << 10)
  84. /* Start location & size of environment */
  85. #define ONENAND_ENV_OFFSET 0x260000
  86. #define SMNAND_ENV_OFFSET 0x260000
  87. #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
  88. /*
  89. * NAND
  90. */
  91. /* Physical address to access NAND */
  92. #define CONFIG_SYS_NAND_ADDR NAND_BASE
  93. /* Physical address to access NAND at CS0 */
  94. #define CONFIG_SYS_NAND_BASE NAND_BASE
  95. /* Max number of NAND devices */
  96. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  97. #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
  98. /* Timeout values (in ticks) */
  99. #define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
  100. #define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
  101. /* Flash banks JFFS2 should use */
  102. #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
  103. CONFIG_SYS_MAX_NAND_DEVICE)
  104. #define CONFIG_SYS_JFFS2_MEM_NAND
  105. #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
  106. #define CONFIG_SYS_JFFS2_NUM_BANKS 1
  107. #define CONFIG_JFFS2_NAND
  108. /* nand device jffs2 lives on */
  109. #define CONFIG_JFFS2_DEV "nand0"
  110. /* Start of jffs2 partition */
  111. #define CONFIG_JFFS2_PART_OFFSET 0x680000
  112. /* Size of jffs2 partition */
  113. #define CONFIG_JFFS2_PART_SIZE 0xf980000
  114. /*
  115. * USB
  116. */
  117. #ifdef CONFIG_USB_OMAP3
  118. #ifdef CONFIG_MUSB_HCD
  119. #define CONFIG_CMD_USB
  120. #define CONFIG_USB_STORAGE
  121. #define CONGIG_CMD_STORAGE
  122. #define CONFIG_CMD_FAT
  123. #ifdef CONFIG_USB_KEYBOARD
  124. #define CONFIG_SYS_USB_EVENT_POLL
  125. #define CONFIG_PREBOOT "usb start"
  126. #endif /* CONFIG_USB_KEYBOARD */
  127. #endif /* CONFIG_MUSB_HCD */
  128. #ifdef CONFIG_MUSB_UDC
  129. /* USB device configuration */
  130. #define CONFIG_USB_DEVICE
  131. #define CONFIG_USB_TTY
  132. #define CONFIG_SYS_CONSOLE_IS_IN_ENV
  133. /* Change these to suit your needs */
  134. #define CONFIG_USBD_VENDORID 0x0451
  135. #define CONFIG_USBD_PRODUCTID 0x5678
  136. #define CONFIG_USBD_MANUFACTURER "Texas Instruments"
  137. #define CONFIG_USBD_PRODUCT_NAME "EVM"
  138. #endif /* CONFIG_MUSB_UDC */
  139. #endif /* CONFIG_USB_OMAP3 */
  140. /* ----------------------------------------------------------------------------
  141. * U-boot features
  142. * ----------------------------------------------------------------------------
  143. */
  144. #define CONFIG_SYS_PROMPT "OMAP3_EVM # "
  145. #define CONFIG_SYS_MAXARGS 16 /* max args for a command */
  146. #define CONFIG_MISC_INIT_R
  147. #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
  148. #define CONFIG_SETUP_MEMORY_TAGS
  149. #define CONFIG_INITRD_TAG
  150. #define CONFIG_REVISION_TAG
  151. /* Size of Console IO buffer */
  152. #define CONFIG_SYS_CBSIZE 512
  153. /* Size of print buffer */
  154. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
  155. sizeof(CONFIG_SYS_PROMPT) + 16)
  156. /* Size of bootarg buffer */
  157. #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
  158. #define CONFIG_BOOTFILE "uImage"
  159. /*
  160. * NAND / OneNAND
  161. */
  162. #if defined(CONFIG_CMD_NAND)
  163. #define CONFIG_SYS_FLASH_BASE NAND_BASE
  164. #define CONFIG_NAND_OMAP_GPMC
  165. #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
  166. #elif defined(CONFIG_CMD_ONENAND)
  167. #define CONFIG_SYS_FLASH_BASE ONENAND_MAP
  168. #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
  169. #endif
  170. #if !defined(CONFIG_ENV_IS_NOWHERE)
  171. #if defined(CONFIG_CMD_NAND)
  172. #define CONFIG_ENV_IS_IN_NAND
  173. #elif defined(CONFIG_CMD_ONENAND)
  174. #define CONFIG_ENV_IS_IN_ONENAND
  175. #define CONFIG_ENV_OFFSET ONENAND_ENV_OFFSET
  176. #endif
  177. #endif /* CONFIG_ENV_IS_NOWHERE */
  178. #define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
  179. #if defined(CONFIG_CMD_NET)
  180. /* Ethernet (SMSC9115 from SMSC9118 family) */
  181. #define CONFIG_SMC911X
  182. #define CONFIG_SMC911X_32_BIT
  183. #define CONFIG_SMC911X_BASE 0x2C000000
  184. /* BOOTP fields */
  185. #define CONFIG_BOOTP_SUBNETMASK 0x00000001
  186. #define CONFIG_BOOTP_GATEWAY 0x00000002
  187. #define CONFIG_BOOTP_HOSTNAME 0x00000004
  188. #define CONFIG_BOOTP_BOOTPATH 0x00000010
  189. #endif /* CONFIG_CMD_NET */
  190. /* Support for relocation */
  191. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
  192. #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
  193. #define CONFIG_SYS_INIT_RAM_SIZE 0x800
  194. #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
  195. CONFIG_SYS_INIT_RAM_SIZE - \
  196. GENERATED_GBL_DATA_SIZE)
  197. /* -----------------------------------------------------------------------------
  198. * Board specific
  199. * -----------------------------------------------------------------------------
  200. */
  201. #define CONFIG_SYS_NO_FLASH
  202. /* Uncomment to define the board revision statically */
  203. /* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */
  204. #define CONFIG_SYS_CACHELINE_SIZE 64
  205. /* Defines for SPL */
  206. #define CONFIG_SPL 1
  207. #define CONFIG_SPL_FRAMEWORK
  208. #define CONFIG_SPL_TEXT_BASE 0x40200800
  209. #define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */
  210. #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
  211. #define CONFIG_SPL_BSS_START_ADDR 0x80000000
  212. #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
  213. #define CONFIG_SPL_BOARD_INIT
  214. #define CONFIG_SPL_LIBCOMMON_SUPPORT
  215. #define CONFIG_SPL_LIBDISK_SUPPORT
  216. #define CONFIG_SPL_I2C_SUPPORT
  217. #define CONFIG_SPL_LIBGENERIC_SUPPORT
  218. #define CONFIG_SPL_SERIAL_SUPPORT
  219. #define CONFIG_SPL_POWER_SUPPORT
  220. #define CONFIG_SPL_OMAP3_ID_NAND
  221. #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
  222. /*
  223. * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
  224. * 64 bytes before this address should be set aside for u-boot.img's
  225. * header. That is 0x800FFFC0--0x80100000 should not be used for any
  226. * other needs.
  227. */
  228. #define CONFIG_SYS_TEXT_BASE 0x80100000
  229. #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
  230. #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
  231. #endif /* __OMAP3_EVM_COMMON_H */