comphy_core.c 5.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2015-2016 Marvell International Ltd.
  4. *
  5. * Copyright (C) 2016 Stefan Roese <sr@denx.de>
  6. */
  7. #include <common.h>
  8. #include <dm.h>
  9. #include <fdtdec.h>
  10. #include <linux/errno.h>
  11. #include <asm/io.h>
  12. #include "comphy_core.h"
  13. #define COMPHY_MAX_CHIP 4
  14. DECLARE_GLOBAL_DATA_PTR;
  15. static const char *get_speed_string(u32 speed)
  16. {
  17. static const char * const speed_strings[] = {
  18. "1.25 Gbps", "1.5 Gbps", "2.5 Gbps",
  19. "3.0 Gbps", "3.125 Gbps", "5 Gbps", "6 Gbps",
  20. "6.25 Gbps", "10.31 Gbps"
  21. };
  22. if (speed < 0 || speed > PHY_SPEED_MAX)
  23. return "invalid";
  24. return speed_strings[speed];
  25. }
  26. static const char *get_type_string(u32 type)
  27. {
  28. static const char * const type_strings[] = {
  29. "UNCONNECTED", "PEX0", "PEX1", "PEX2", "PEX3",
  30. "SATA0", "SATA1", "SATA2", "SATA3", "SGMII0",
  31. "SGMII1", "SGMII2", "SGMII3", "QSGMII",
  32. "USB3_HOST0", "USB3_HOST1", "USB3_DEVICE",
  33. "XAUI0", "XAUI1", "XAUI2", "XAUI3",
  34. "RXAUI0", "RXAUI1", "SFI", "IGNORE"
  35. };
  36. if (type < 0 || type > PHY_TYPE_MAX)
  37. return "invalid";
  38. return type_strings[type];
  39. }
  40. void comphy_print(struct chip_serdes_phy_config *chip_cfg,
  41. struct comphy_map *comphy_map_data)
  42. {
  43. u32 lane;
  44. for (lane = 0; lane < chip_cfg->comphy_lanes_count;
  45. lane++, comphy_map_data++) {
  46. if (comphy_map_data->speed == PHY_SPEED_INVALID) {
  47. printf("Comphy-%d: %-13s\n", lane,
  48. get_type_string(comphy_map_data->type));
  49. } else {
  50. printf("Comphy-%d: %-13s %-10s\n", lane,
  51. get_type_string(comphy_map_data->type),
  52. get_speed_string(comphy_map_data->speed));
  53. }
  54. }
  55. }
  56. __weak int comphy_update_map(struct comphy_map *serdes_map, int count)
  57. {
  58. return 0;
  59. }
  60. static int comphy_probe(struct udevice *dev)
  61. {
  62. const void *blob = gd->fdt_blob;
  63. int node = dev_of_offset(dev);
  64. struct chip_serdes_phy_config *chip_cfg = dev_get_priv(dev);
  65. struct comphy_map comphy_map_data[MAX_LANE_OPTIONS];
  66. int subnode;
  67. int lane;
  68. int last_idx = 0;
  69. static int current_idx;
  70. int res;
  71. /* Save base addresses for later use */
  72. chip_cfg->comphy_base_addr = (void *)devfdt_get_addr_index(dev, 0);
  73. if (IS_ERR(chip_cfg->comphy_base_addr))
  74. return PTR_ERR(chip_cfg->comphy_base_addr);
  75. chip_cfg->hpipe3_base_addr = (void *)devfdt_get_addr_index(dev, 1);
  76. if (IS_ERR(chip_cfg->hpipe3_base_addr))
  77. return PTR_ERR(chip_cfg->hpipe3_base_addr);
  78. chip_cfg->comphy_lanes_count = fdtdec_get_int(blob, node,
  79. "max-lanes", 0);
  80. if (chip_cfg->comphy_lanes_count <= 0) {
  81. dev_err(&dev->dev, "comphy max lanes is wrong\n");
  82. return -EINVAL;
  83. }
  84. chip_cfg->comphy_mux_bitcount = fdtdec_get_int(blob, node,
  85. "mux-bitcount", 0);
  86. if (chip_cfg->comphy_mux_bitcount <= 0) {
  87. dev_err(&dev->dev, "comphy mux bit count is wrong\n");
  88. return -EINVAL;
  89. }
  90. chip_cfg->comphy_mux_lane_order =
  91. fdtdec_locate_array(blob, node, "mux-lane-order",
  92. chip_cfg->comphy_lanes_count);
  93. if (device_is_compatible(dev, "marvell,comphy-armada-3700"))
  94. chip_cfg->ptr_comphy_chip_init = comphy_a3700_init;
  95. if (device_is_compatible(dev, "marvell,comphy-cp110"))
  96. chip_cfg->ptr_comphy_chip_init = comphy_cp110_init;
  97. /*
  98. * Bail out if no chip_init function is defined, e.g. no
  99. * compatible node is found
  100. */
  101. if (!chip_cfg->ptr_comphy_chip_init) {
  102. dev_err(&dev->dev, "comphy: No compatible DT node found\n");
  103. return -ENODEV;
  104. }
  105. lane = 0;
  106. fdt_for_each_subnode(subnode, blob, node) {
  107. /* Skip disabled ports */
  108. if (!fdtdec_get_is_enabled(blob, subnode))
  109. continue;
  110. comphy_map_data[lane].speed = fdtdec_get_int(
  111. blob, subnode, "phy-speed", PHY_TYPE_INVALID);
  112. comphy_map_data[lane].type = fdtdec_get_int(
  113. blob, subnode, "phy-type", PHY_SPEED_INVALID);
  114. comphy_map_data[lane].invert = fdtdec_get_int(
  115. blob, subnode, "phy-invert", PHY_POLARITY_NO_INVERT);
  116. comphy_map_data[lane].clk_src = fdtdec_get_bool(blob, subnode,
  117. "clk-src");
  118. comphy_map_data[lane].end_point = fdtdec_get_bool(blob, subnode,
  119. "end_point");
  120. if (comphy_map_data[lane].type == PHY_TYPE_INVALID) {
  121. printf("no phy type for lane %d, setting lane as unconnected\n",
  122. lane + 1);
  123. }
  124. lane++;
  125. }
  126. res = comphy_update_map(comphy_map_data, chip_cfg->comphy_lanes_count);
  127. if (res < 0)
  128. return res;
  129. /* Save CP index for MultiCP devices (A8K) */
  130. chip_cfg->cp_index = current_idx++;
  131. /* PHY power UP sequence */
  132. chip_cfg->ptr_comphy_chip_init(chip_cfg, comphy_map_data);
  133. /* PHY print SerDes status */
  134. if (of_machine_is_compatible("marvell,armada8040"))
  135. printf("Comphy chip #%d:\n", chip_cfg->cp_index);
  136. comphy_print(chip_cfg, comphy_map_data);
  137. /*
  138. * Only run the dedicated PHY init code once, in the last PHY init call
  139. */
  140. if (of_machine_is_compatible("marvell,armada8040"))
  141. last_idx = 1;
  142. if (chip_cfg->cp_index == last_idx) {
  143. /* Initialize dedicated PHYs (not muxed SerDes lanes) */
  144. comphy_dedicated_phys_init();
  145. }
  146. return 0;
  147. }
  148. static const struct udevice_id comphy_ids[] = {
  149. { .compatible = "marvell,mvebu-comphy" },
  150. { }
  151. };
  152. U_BOOT_DRIVER(mvebu_comphy) = {
  153. .name = "mvebu_comphy",
  154. .id = UCLASS_MISC,
  155. .of_match = comphy_ids,
  156. .probe = comphy_probe,
  157. .priv_auto_alloc_size = sizeof(struct chip_serdes_phy_config),
  158. };