Kconfig 9.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353
  1. menuconfig NAND
  2. bool "Raw NAND Device Support"
  3. if NAND
  4. config SYS_NAND_SELF_INIT
  5. bool
  6. help
  7. This option, if enabled, provides more flexible and linux-like
  8. NAND initialization process.
  9. config SYS_NAND_DRIVER_ECC_LAYOUT
  10. bool
  11. help
  12. Omit standard ECC layouts to safe space. Select this if your driver
  13. is known to provide its own ECC layout.
  14. config NAND_ATMEL
  15. bool "Support Atmel NAND controller"
  16. imply SYS_NAND_USE_FLASH_BBT
  17. help
  18. Enable this driver for NAND flash platforms using an Atmel NAND
  19. controller.
  20. if NAND_ATMEL
  21. config ATMEL_NAND_HWECC
  22. bool "Atmel Hardware ECC"
  23. default n
  24. config ATMEL_NAND_HW_PMECC
  25. bool "Atmel Programmable Multibit ECC (PMECC)"
  26. select ATMEL_NAND_HWECC
  27. default n
  28. help
  29. The Programmable Multibit ECC (PMECC) controller is a programmable
  30. binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder.
  31. config PMECC_CAP
  32. int "PMECC Correctable ECC Bits"
  33. depends on ATMEL_NAND_HW_PMECC
  34. default 2
  35. help
  36. Correctable ECC bits, can be 2, 4, 8, 12, and 24.
  37. config PMECC_SECTOR_SIZE
  38. int "PMECC Sector Size"
  39. depends on ATMEL_NAND_HW_PMECC
  40. default 512
  41. help
  42. Sector size, in bytes, can be 512 or 1024.
  43. config SPL_GENERATE_ATMEL_PMECC_HEADER
  44. bool "Atmel PMECC Header Generation"
  45. select ATMEL_NAND_HWECC
  46. select ATMEL_NAND_HW_PMECC
  47. default n
  48. help
  49. Generate Programmable Multibit ECC (PMECC) header for SPL image.
  50. endif
  51. config NAND_DAVINCI
  52. bool "Support TI Davinci NAND controller"
  53. help
  54. Enable this driver for NAND flash controllers available in TI Davinci
  55. and Keystone2 platforms
  56. config NAND_DENALI
  57. bool
  58. select SYS_NAND_SELF_INIT
  59. imply CMD_NAND
  60. config NAND_DENALI_DT
  61. bool "Support Denali NAND controller as a DT device"
  62. select NAND_DENALI
  63. depends on OF_CONTROL && DM
  64. help
  65. Enable the driver for NAND flash on platforms using a Denali NAND
  66. controller as a DT device.
  67. config NAND_DENALI_SPARE_AREA_SKIP_BYTES
  68. int "Number of bytes skipped in OOB area"
  69. depends on NAND_DENALI
  70. range 0 63
  71. help
  72. This option specifies the number of bytes to skip from the beginning
  73. of OOB area before last ECC sector data starts. This is potentially
  74. used to preserve the bad block marker in the OOB area.
  75. config NAND_LPC32XX_SLC
  76. bool "Support LPC32XX_SLC controller"
  77. help
  78. Enable the LPC32XX SLC NAND controller.
  79. config NAND_OMAP_GPMC
  80. bool "Support OMAP GPMC NAND controller"
  81. depends on ARCH_OMAP2PLUS
  82. help
  83. Enables omap_gpmc.c driver for OMAPx and AMxxxx platforms.
  84. GPMC controller is used for parallel NAND flash devices, and can
  85. do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8
  86. and BCH16 ECC algorithms.
  87. config NAND_OMAP_GPMC_PREFETCH
  88. bool "Enable GPMC Prefetch"
  89. depends on NAND_OMAP_GPMC
  90. default y
  91. help
  92. On OMAP platforms that use the GPMC controller
  93. (CONFIG_NAND_OMAP_GPMC_PREFETCH), this options enables the code that
  94. uses the prefetch mode to speed up read operations.
  95. config NAND_OMAP_ELM
  96. bool "Enable ELM driver for OMAPxx and AMxx platforms."
  97. depends on NAND_OMAP_GPMC && !OMAP34XX
  98. help
  99. ELM controller is used for ECC error detection (not ECC calculation)
  100. of BCH4, BCH8 and BCH16 ECC algorithms.
  101. Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
  102. thus such SoC platforms need to depend on software library for ECC error
  103. detection. However ECC calculation on such plaforms would still be
  104. done by GPMC controller.
  105. config NAND_VF610_NFC
  106. bool "Support for Freescale NFC for VF610"
  107. select SYS_NAND_SELF_INIT
  108. select SYS_NAND_DRIVER_ECC_LAYOUT
  109. imply CMD_NAND
  110. help
  111. Enables support for NAND Flash Controller on some Freescale
  112. processors like the VF610, MCF54418 or Kinetis K70.
  113. The driver supports a maximum 2k page size. The driver
  114. currently does not support hardware ECC.
  115. if NAND_VF610_NFC
  116. config NAND_VF610_NFC_DT
  117. bool "Support Vybrid's vf610 NAND controller as a DT device"
  118. depends on OF_CONTROL && MTD
  119. help
  120. Enable the driver for Vybrid's vf610 NAND flash on platforms
  121. using device tree.
  122. choice
  123. prompt "Hardware ECC strength"
  124. depends on NAND_VF610_NFC
  125. default SYS_NAND_VF610_NFC_45_ECC_BYTES
  126. help
  127. Select the ECC strength used in the hardware BCH ECC block.
  128. config SYS_NAND_VF610_NFC_45_ECC_BYTES
  129. bool "24-error correction (45 ECC bytes)"
  130. config SYS_NAND_VF610_NFC_60_ECC_BYTES
  131. bool "32-error correction (60 ECC bytes)"
  132. endchoice
  133. endif
  134. config NAND_PXA3XX
  135. bool "Support for NAND on PXA3xx and Armada 370/XP/38x"
  136. select SYS_NAND_SELF_INIT
  137. imply CMD_NAND
  138. help
  139. This enables the driver for the NAND flash device found on
  140. PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
  141. config NAND_SUNXI
  142. bool "Support for NAND on Allwinner SoCs"
  143. default ARCH_SUNXI
  144. depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I
  145. select SYS_NAND_SELF_INIT
  146. select SYS_NAND_U_BOOT_LOCATIONS
  147. select SPL_NAND_SUPPORT
  148. imply CMD_NAND
  149. ---help---
  150. Enable support for NAND. This option enables the standard and
  151. SPL drivers.
  152. The SPL driver only supports reading from the NAND using DMA
  153. transfers.
  154. if NAND_SUNXI
  155. config NAND_SUNXI_SPL_ECC_STRENGTH
  156. int "Allwinner NAND SPL ECC Strength"
  157. default 64
  158. config NAND_SUNXI_SPL_ECC_SIZE
  159. int "Allwinner NAND SPL ECC Step Size"
  160. default 1024
  161. config NAND_SUNXI_SPL_USABLE_PAGE_SIZE
  162. int "Allwinner NAND SPL Usable Page Size"
  163. default 1024
  164. endif
  165. config NAND_ARASAN
  166. bool "Configure Arasan Nand"
  167. select SYS_NAND_SELF_INIT
  168. imply CMD_NAND
  169. help
  170. This enables Nand driver support for Arasan nand flash
  171. controller. This uses the hardware ECC for read and
  172. write operations.
  173. config NAND_MXC
  174. bool "MXC NAND support"
  175. depends on CPU_ARM926EJS || CPU_ARM1136 || MX5
  176. imply CMD_NAND
  177. help
  178. This enables the NAND driver for the NAND flash controller on the
  179. i.MX27 / i.MX31 / i.MX5 rocessors.
  180. config NAND_MXS
  181. bool "MXS NAND support"
  182. depends on MX23 || MX28 || MX6 || MX7
  183. select SYS_NAND_SELF_INIT
  184. imply CMD_NAND
  185. select APBH_DMA
  186. select APBH_DMA_BURST if ARCH_MX6 || ARCH_MX7
  187. select APBH_DMA_BURST8 if ARCH_MX6 || ARCH_MX7
  188. help
  189. This enables NAND driver for the NAND flash controller on the
  190. MXS processors.
  191. if NAND_MXS
  192. config NAND_MXS_DT
  193. bool "Support MXS NAND controller as a DT device"
  194. depends on OF_CONTROL && MTD
  195. help
  196. Enable the driver for MXS NAND flash on platforms using
  197. device tree.
  198. config NAND_MXS_USE_MINIMUM_ECC
  199. bool "Use minimum ECC strength supported by the controller"
  200. default false
  201. endif
  202. config NAND_ZYNQ
  203. bool "Support for Zynq Nand controller"
  204. select SYS_NAND_SELF_INIT
  205. imply CMD_NAND
  206. help
  207. This enables Nand driver support for Nand flash controller
  208. found on Zynq SoC.
  209. config NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS
  210. bool "Enable use of 1st stage bootloader timing for NAND"
  211. depends on NAND_ZYNQ
  212. help
  213. This flag prevent U-boot reconfigure NAND flash controller and reuse
  214. the NAND timing from 1st stage bootloader.
  215. comment "Generic NAND options"
  216. config SYS_NAND_BLOCK_SIZE
  217. hex "NAND chip eraseblock size"
  218. depends on ARCH_SUNXI
  219. help
  220. Number of data bytes in one eraseblock for the NAND chip on the
  221. board. This is the multiple of NAND_PAGE_SIZE and the number of
  222. pages.
  223. config SYS_NAND_PAGE_SIZE
  224. hex "NAND chip page size"
  225. depends on ARCH_SUNXI
  226. help
  227. Number of data bytes in one page for the NAND chip on the
  228. board, not including the OOB area.
  229. config SYS_NAND_OOBSIZE
  230. hex "NAND chip OOB size"
  231. depends on ARCH_SUNXI
  232. help
  233. Number of bytes in the Out-Of-Band area for the NAND chip on
  234. the board.
  235. # Enhance depends when converting drivers to Kconfig which use this config
  236. # option (mxc_nand, ndfc, omap_gpmc).
  237. config SYS_NAND_BUSWIDTH_16BIT
  238. bool "Use 16-bit NAND interface"
  239. depends on NAND_VF610_NFC || NAND_OMAP_GPMC || NAND_MXC || ARCH_DAVINCI
  240. help
  241. Indicates that NAND device has 16-bit wide data-bus. In absence of this
  242. config, bus-width of NAND device is assumed to be either 8-bit and later
  243. determined by reading ONFI params.
  244. Above config is useful when NAND device's bus-width information cannot
  245. be determined from on-chip ONFI params, like in following scenarios:
  246. - SPL boot does not support reading of ONFI parameters. This is done to
  247. keep SPL code foot-print small.
  248. - In current U-Boot flow using nand_init(), driver initialization
  249. happens in board_nand_init() which is called before any device probe
  250. (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are
  251. not available while configuring controller. So a static CONFIG_NAND_xx
  252. is needed to know the device's bus-width in advance.
  253. if SPL
  254. config SYS_NAND_U_BOOT_LOCATIONS
  255. bool "Define U-boot binaries locations in NAND"
  256. help
  257. Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig.
  258. This option should not be enabled when compiling U-boot for boards
  259. defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h
  260. file.
  261. config SYS_NAND_U_BOOT_OFFS
  262. hex "Location in NAND to read U-Boot from"
  263. default 0x800000 if NAND_SUNXI
  264. depends on SYS_NAND_U_BOOT_LOCATIONS
  265. help
  266. Set the offset from the start of the nand where u-boot should be
  267. loaded from.
  268. config SYS_NAND_U_BOOT_OFFS_REDUND
  269. hex "Location in NAND to read U-Boot from"
  270. default SYS_NAND_U_BOOT_OFFS
  271. depends on SYS_NAND_U_BOOT_LOCATIONS
  272. help
  273. Set the offset from the start of the nand where the redundant u-boot
  274. should be loaded from.
  275. config SPL_NAND_AM33XX_BCH
  276. bool "Enables SPL-NAND driver which supports ELM based"
  277. depends on NAND_OMAP_GPMC && !OMAP34XX
  278. default y
  279. help
  280. Hardware ECC correction. This is useful for platforms which have ELM
  281. hardware engine and use NAND boot mode.
  282. Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
  283. so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling
  284. SPL-NAND driver with software ECC correction support.
  285. config SPL_NAND_DENALI
  286. bool "Support Denali NAND controller for SPL"
  287. help
  288. This is a small implementation of the Denali NAND controller
  289. for use on SPL.
  290. config SPL_NAND_SIMPLE
  291. bool "Use simple SPL NAND driver"
  292. depends on !SPL_NAND_AM33XX_BCH
  293. help
  294. Support for NAND boot using simple NAND drivers that
  295. expose the cmd_ctrl() interface.
  296. endif
  297. endif # if NAND