cyclon2.c 5.8 KB

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  1. /*
  2. * (C) Copyright 2006
  3. * Heiko Schocher, hs@denx.de
  4. * Based on ACE1XK.c
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. *
  24. */
  25. #include <common.h> /* core U-Boot definitions */
  26. #include <altera.h>
  27. #include <ACEX1K.h> /* ACEX device family */
  28. /* Define FPGA_DEBUG to get debug printf's */
  29. #ifdef FPGA_DEBUG
  30. #define PRINTF(fmt,args...) printf (fmt ,##args)
  31. #else
  32. #define PRINTF(fmt,args...)
  33. #endif
  34. /* Note: The assumption is that we cannot possibly run fast enough to
  35. * overrun the device (the Slave Parallel mode can free run at 50MHz).
  36. * If there is a need to operate slower, define CONFIG_FPGA_DELAY in
  37. * the board config file to slow things down.
  38. */
  39. #ifndef CONFIG_FPGA_DELAY
  40. #define CONFIG_FPGA_DELAY()
  41. #endif
  42. #ifndef CONFIG_SYS_FPGA_WAIT
  43. #define CONFIG_SYS_FPGA_WAIT CONFIG_SYS_HZ/10 /* 100 ms */
  44. #endif
  45. static int CYC2_ps_load(Altera_desc *desc, const void *buf, size_t bsize);
  46. static int CYC2_ps_dump(Altera_desc *desc, const void *buf, size_t bsize);
  47. /* static int CYC2_ps_info( Altera_desc *desc ); */
  48. /* ------------------------------------------------------------------------- */
  49. /* CYCLON2 Generic Implementation */
  50. int CYC2_load(Altera_desc *desc, const void *buf, size_t bsize)
  51. {
  52. int ret_val = FPGA_FAIL;
  53. switch (desc->iface) {
  54. case passive_serial:
  55. PRINTF ("%s: Launching Passive Serial Loader\n", __FUNCTION__);
  56. ret_val = CYC2_ps_load (desc, buf, bsize);
  57. break;
  58. case fast_passive_parallel:
  59. /* Fast Passive Parallel (FPP) and PS only differ in what is
  60. * done in the write() callback. Use the existing PS load
  61. * function for FPP, too.
  62. */
  63. PRINTF ("%s: Launching Fast Passive Parallel Loader\n",
  64. __FUNCTION__);
  65. ret_val = CYC2_ps_load(desc, buf, bsize);
  66. break;
  67. /* Add new interface types here */
  68. default:
  69. printf ("%s: Unsupported interface type, %d\n",
  70. __FUNCTION__, desc->iface);
  71. }
  72. return ret_val;
  73. }
  74. int CYC2_dump(Altera_desc *desc, const void *buf, size_t bsize)
  75. {
  76. int ret_val = FPGA_FAIL;
  77. switch (desc->iface) {
  78. case passive_serial:
  79. PRINTF ("%s: Launching Passive Serial Dump\n", __FUNCTION__);
  80. ret_val = CYC2_ps_dump (desc, buf, bsize);
  81. break;
  82. /* Add new interface types here */
  83. default:
  84. printf ("%s: Unsupported interface type, %d\n",
  85. __FUNCTION__, desc->iface);
  86. }
  87. return ret_val;
  88. }
  89. int CYC2_info( Altera_desc *desc )
  90. {
  91. return FPGA_SUCCESS;
  92. }
  93. /* ------------------------------------------------------------------------- */
  94. /* CYCLON2 Passive Serial Generic Implementation */
  95. static int CYC2_ps_load(Altera_desc *desc, const void *buf, size_t bsize)
  96. {
  97. int ret_val = FPGA_FAIL; /* assume the worst */
  98. Altera_CYC2_Passive_Serial_fns *fn = desc->iface_fns;
  99. int ret = 0;
  100. PRINTF ("%s: start with interface functions @ 0x%p\n",
  101. __FUNCTION__, fn);
  102. if (fn) {
  103. int cookie = desc->cookie; /* make a local copy */
  104. unsigned long ts; /* timestamp */
  105. PRINTF ("%s: Function Table:\n"
  106. "ptr:\t0x%p\n"
  107. "struct: 0x%p\n"
  108. "config:\t0x%p\n"
  109. "status:\t0x%p\n"
  110. "write:\t0x%p\n"
  111. "done:\t0x%p\n\n",
  112. __FUNCTION__, &fn, fn, fn->config, fn->status,
  113. fn->write, fn->done);
  114. #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
  115. printf ("Loading FPGA Device %d...", cookie);
  116. #endif
  117. /*
  118. * Run the pre configuration function if there is one.
  119. */
  120. if (*fn->pre) {
  121. (*fn->pre) (cookie);
  122. }
  123. /* Establish the initial state */
  124. (*fn->config) (false, true, cookie); /* De-assert nCONFIG */
  125. udelay(100);
  126. (*fn->config) (true, true, cookie); /* Assert nCONFIG */
  127. udelay(2); /* T_cfg > 2us */
  128. /* Wait for nSTATUS to be asserted */
  129. ts = get_timer (0); /* get current time */
  130. do {
  131. CONFIG_FPGA_DELAY ();
  132. if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
  133. puts ("** Timeout waiting for STATUS to go high.\n");
  134. (*fn->abort) (cookie);
  135. return FPGA_FAIL;
  136. }
  137. } while (!(*fn->status) (cookie));
  138. /* Get ready for the burn */
  139. CONFIG_FPGA_DELAY ();
  140. ret = (*fn->write) (buf, bsize, true, cookie);
  141. if (ret) {
  142. puts ("** Write failed.\n");
  143. (*fn->abort) (cookie);
  144. return FPGA_FAIL;
  145. }
  146. #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
  147. puts(" OK? ...");
  148. #endif
  149. CONFIG_FPGA_DELAY ();
  150. #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
  151. putc (' '); /* terminate the dotted line */
  152. #endif
  153. /*
  154. * Checking FPGA's CONF_DONE signal - correctly booted ?
  155. */
  156. if ( ! (*fn->done) (cookie) ) {
  157. puts ("** Booting failed! CONF_DONE is still deasserted.\n");
  158. (*fn->abort) (cookie);
  159. return (FPGA_FAIL);
  160. }
  161. #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
  162. puts(" OK\n");
  163. #endif
  164. ret_val = FPGA_SUCCESS;
  165. #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
  166. if (ret_val == FPGA_SUCCESS) {
  167. puts ("Done.\n");
  168. }
  169. else {
  170. puts ("Fail.\n");
  171. }
  172. #endif
  173. (*fn->post) (cookie);
  174. } else {
  175. printf ("%s: NULL Interface function table!\n", __FUNCTION__);
  176. }
  177. return ret_val;
  178. }
  179. static int CYC2_ps_dump(Altera_desc *desc, const void *buf, size_t bsize)
  180. {
  181. /* Readback is only available through the Slave Parallel and */
  182. /* boundary-scan interfaces. */
  183. printf ("%s: Passive Serial Dumping is unavailable\n",
  184. __FUNCTION__);
  185. return FPGA_FAIL;
  186. }