clkinit.h 4.3 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Custom IDEAS, Inc. <www.cideas.com>
  4. * Jon Diekema <diekema@cideas.com>
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. */
  24. #define SLRCLK_EN_MASK 0x00040000 /* PA13 - SLRCLK_EN* */
  25. #define MIN_SAMPLE_RATE 4000 /* Minimum sample rate */
  26. #define MAX_128x_SAMPLE_RATE 43402 /* Maximum 128x sample rate */
  27. #define MAX_64x_SAMPLE_RATE 86805 /* Maximum 64x sample rate */
  28. #define KHZ ((uint)1000)
  29. #define MHZ ((uint)(1000 * KHZ))
  30. #define MCLK_BRG 3 /* MCLK, Master CLocK for the A/D & D/A */
  31. #define SCLK_BRG 7 /* SCLK, Sample CLocK for the A/D & D/A */
  32. #define LRCLK_BRG 5 /* LRCLK, L/R CLocK for the A/D & D/A */
  33. /* 0 == BRG1 (used for SMC1) */
  34. /* 1 == BRG2 (used for SMC2) */
  35. /* 2 == BRG3 (used for SCC1) */
  36. /* 3 == BRG4 (MCLK) */
  37. /* 4 == BRG5 */
  38. /* 5 == BRG6 (LRCLK) */
  39. /* 6 == BRG7 */
  40. /* 7 == BRG8 (SCLK) */
  41. #define MCLK_DIVISOR 4 /* SCLK = MCLK / MCLK_DIVISOR */
  42. #define SCLK_DIVISOR (Daq64xSampling ? 64 : 128)
  43. /* LRCLK = SCLK / SCLK_DIVISOR */
  44. #define TIGHTEN_UP_BRG_EN_TIMING /* Tighten up the BRG enable timing */
  45. #define RUN_SCLK_ON_BRG_INT /* Run SCLK on BRG_INT instead of MCLK */
  46. /* The 8260 (Mask B.3) seems to have */
  47. /* problems generating SCLK from MCLK */
  48. /* via CLK9. */
  49. #define RUN_LRCLK_ON_BRG_INT /* Run LRCLK on BRG_INT instead of SCLK */
  50. /* The 8260 (Mask B.3) seems to have */
  51. /* problems generating LRCLK from SCLK */
  52. #define NUM_LRCLKS_TO_STABILIZE 1 /* Number of LRCLK period (sample) */
  53. /* to wait for the clock to stabilize */
  54. #define CPM_CLK (gd->bd->bi_cpmfreq)
  55. #define DFBRG 4
  56. #define BRG_INT_CLK (CPM_CLK * 2 / DFBRG)
  57. /* BRG = CPM * 2 / DFBRG (Sect 9.8) */
  58. /* BRG = CPM * 2 / 4 */
  59. /* BRG = CPM / 2 */
  60. #define CPM_BRG_EXTC_MASK ((uint)0x0000C000)
  61. #define CPM_BRG_EXTC_SHIFT 14
  62. #define CPM_BRG_DIV16_MASK ((uint)0x00000001)
  63. #define CPM_BRG_DIV16_SHIFT 1
  64. #define CPM_BRG_EXTC_BRGCLK 0
  65. #define CPM_BRG_EXTC_CLK3 1
  66. #define CPM_BRG_EXTC_CLK9 CPM_BRG_EXTC_CLK3
  67. #define CPM_BRG_EXTC_CLK5 2
  68. #define CPM_BRG_EXTC_CLK15 CPM_BRG_EXTC_CLK5
  69. #define IM_BRGC1 ((uint *)0xf00119f0)
  70. #define IM_BRGC2 ((uint *)0xf00119f4)
  71. #define IM_BRGC3 ((uint *)0xf00119f8)
  72. #define IM_BRGC4 ((uint *)0xf00119fc)
  73. #define IM_BRGC5 ((uint *)0xf00115f0)
  74. #define IM_BRGC6 ((uint *)0xf00115f4)
  75. #define IM_BRGC7 ((uint *)0xf00115f8)
  76. #define IM_BRGC8 ((uint *)0xf00115fc)
  77. /*
  78. * External declarations
  79. */
  80. extern int Daq64xSampling;
  81. extern void Daq_BRG_Reset(uint brg);
  82. extern void Daq_BRG_Run(uint brg);
  83. extern void Daq_BRG_Disable(uint brg);
  84. extern void Daq_BRG_Enable(uint brg);
  85. extern uint Daq_BRG_Get_Div16(uint brg);
  86. extern void Daq_BRG_Set_Div16(uint brg, uint div16);
  87. extern uint Daq_BRG_Get_Count(uint brg);
  88. extern void Daq_BRG_Set_Count(uint brg, uint brg_cnt);
  89. extern uint Daq_BRG_Get_ExtClk(uint brg);
  90. extern char* Daq_BRG_Get_ExtClk_Description(uint brg);
  91. extern void Daq_BRG_Set_ExtClk(uint brg, uint extc);
  92. extern uint Daq_BRG_Rate(uint brg);
  93. extern uint Daq_Get_SampleRate(void);
  94. extern void Daq_Init_Clocks(int sample_rate, int sample_64x);
  95. extern void Daq_Stop_Clocks(void);
  96. extern void Daq_Start_Clocks(int sample_rate);
  97. extern void Daq_Display_Clocks(void);