m41t62.c 3.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2008
  4. * Stefan Roese, DENX Software Engineering, sr@denx.de.
  5. *
  6. * based on a the Linux rtc-m41t80.c driver which is:
  7. * Alexander Bigga <ab@mycable.de>, 2006 (c) mycable GmbH
  8. */
  9. /*
  10. * Date & Time support for STMicroelectronics M41T62
  11. */
  12. /* #define DEBUG */
  13. #include <common.h>
  14. #include <command.h>
  15. #include <rtc.h>
  16. #include <i2c.h>
  17. #define M41T62_REG_SSEC 0
  18. #define M41T62_REG_SEC 1
  19. #define M41T62_REG_MIN 2
  20. #define M41T62_REG_HOUR 3
  21. #define M41T62_REG_WDAY 4
  22. #define M41T62_REG_DAY 5
  23. #define M41T62_REG_MON 6
  24. #define M41T62_REG_YEAR 7
  25. #define M41T62_REG_ALARM_MON 0xa
  26. #define M41T62_REG_ALARM_DAY 0xb
  27. #define M41T62_REG_ALARM_HOUR 0xc
  28. #define M41T62_REG_ALARM_MIN 0xd
  29. #define M41T62_REG_ALARM_SEC 0xe
  30. #define M41T62_REG_FLAGS 0xf
  31. #define M41T62_DATETIME_REG_SIZE (M41T62_REG_YEAR + 1)
  32. #define M41T62_ALARM_REG_SIZE \
  33. (M41T62_REG_ALARM_SEC + 1 - M41T62_REG_ALARM_MON)
  34. #define M41T62_SEC_ST (1 << 7) /* ST: Stop Bit */
  35. #define M41T62_ALMON_AFE (1 << 7) /* AFE: AF Enable Bit */
  36. #define M41T62_ALMON_SQWE (1 << 6) /* SQWE: SQW Enable Bit */
  37. #define M41T62_ALHOUR_HT (1 << 6) /* HT: Halt Update Bit */
  38. #define M41T62_FLAGS_AF (1 << 6) /* AF: Alarm Flag Bit */
  39. #define M41T62_FLAGS_BATT_LOW (1 << 4) /* BL: Battery Low Bit */
  40. #define M41T62_FEATURE_HT (1 << 0)
  41. #define M41T62_FEATURE_BL (1 << 1)
  42. #define M41T80_ALHOUR_HT (1 << 6) /* HT: Halt Update Bit */
  43. int rtc_get(struct rtc_time *tm)
  44. {
  45. u8 buf[M41T62_DATETIME_REG_SIZE];
  46. i2c_read(CONFIG_SYS_I2C_RTC_ADDR, 0, 1, buf, M41T62_DATETIME_REG_SIZE);
  47. debug("%s: raw read data - sec=%02x, min=%02x, hr=%02x, "
  48. "mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n",
  49. __FUNCTION__,
  50. buf[0], buf[1], buf[2], buf[3],
  51. buf[4], buf[5], buf[6], buf[7]);
  52. tm->tm_sec = bcd2bin(buf[M41T62_REG_SEC] & 0x7f);
  53. tm->tm_min = bcd2bin(buf[M41T62_REG_MIN] & 0x7f);
  54. tm->tm_hour = bcd2bin(buf[M41T62_REG_HOUR] & 0x3f);
  55. tm->tm_mday = bcd2bin(buf[M41T62_REG_DAY] & 0x3f);
  56. tm->tm_wday = buf[M41T62_REG_WDAY] & 0x07;
  57. tm->tm_mon = bcd2bin(buf[M41T62_REG_MON] & 0x1f);
  58. /* assume 20YY not 19YY, and ignore the Century Bit */
  59. /* U-Boot needs to add 1900 here */
  60. tm->tm_year = bcd2bin(buf[M41T62_REG_YEAR]) + 100 + 1900;
  61. debug("%s: tm is secs=%d, mins=%d, hours=%d, "
  62. "mday=%d, mon=%d, year=%d, wday=%d\n",
  63. __FUNCTION__,
  64. tm->tm_sec, tm->tm_min, tm->tm_hour,
  65. tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
  66. return 0;
  67. }
  68. int rtc_set(struct rtc_time *tm)
  69. {
  70. u8 buf[M41T62_DATETIME_REG_SIZE];
  71. debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
  72. tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
  73. tm->tm_hour, tm->tm_min, tm->tm_sec);
  74. i2c_read(CONFIG_SYS_I2C_RTC_ADDR, 0, 1, buf, M41T62_DATETIME_REG_SIZE);
  75. /* Merge time-data and register flags into buf[0..7] */
  76. buf[M41T62_REG_SSEC] = 0;
  77. buf[M41T62_REG_SEC] =
  78. bin2bcd(tm->tm_sec) | (buf[M41T62_REG_SEC] & ~0x7f);
  79. buf[M41T62_REG_MIN] =
  80. bin2bcd(tm->tm_min) | (buf[M41T62_REG_MIN] & ~0x7f);
  81. buf[M41T62_REG_HOUR] =
  82. bin2bcd(tm->tm_hour) | (buf[M41T62_REG_HOUR] & ~0x3f) ;
  83. buf[M41T62_REG_WDAY] =
  84. (tm->tm_wday & 0x07) | (buf[M41T62_REG_WDAY] & ~0x07);
  85. buf[M41T62_REG_DAY] =
  86. bin2bcd(tm->tm_mday) | (buf[M41T62_REG_DAY] & ~0x3f);
  87. buf[M41T62_REG_MON] =
  88. bin2bcd(tm->tm_mon) | (buf[M41T62_REG_MON] & ~0x1f);
  89. /* assume 20YY not 19YY */
  90. buf[M41T62_REG_YEAR] = bin2bcd(tm->tm_year % 100);
  91. if (i2c_write(CONFIG_SYS_I2C_RTC_ADDR, 0, 1, buf, M41T62_DATETIME_REG_SIZE)) {
  92. printf("I2C write failed in %s()\n", __func__);
  93. return -1;
  94. }
  95. return 0;
  96. }
  97. void rtc_reset(void)
  98. {
  99. u8 val;
  100. /*
  101. * M41T82: Make sure HT (Halt Update) bit is cleared.
  102. * This bit is 0 in M41T62 so its save to clear it always.
  103. */
  104. i2c_read(CONFIG_SYS_I2C_RTC_ADDR, M41T62_REG_ALARM_HOUR, 1, &val, 1);
  105. val &= ~M41T80_ALHOUR_HT;
  106. i2c_write(CONFIG_SYS_I2C_RTC_ADDR, M41T62_REG_ALARM_HOUR, 1, &val, 1);
  107. }