Kconfig 34 KB

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  1. menu "ARM architecture"
  2. depends on ARM
  3. config SYS_ARCH
  4. default "arm"
  5. config ARM64
  6. bool
  7. select PHYS_64BIT
  8. select SYS_CACHE_SHIFT_6
  9. if ARM64
  10. config POSITION_INDEPENDENT
  11. bool "Generate position-independent pre-relocation code"
  12. help
  13. U-Boot expects to be linked to a specific hard-coded address, and to
  14. be loaded to and run from that address. This option lifts that
  15. restriction, thus allowing the code to be loaded to and executed
  16. from almost any address. This logic relies on the relocation
  17. information that is embedded into the binary to support U-Boot
  18. relocating itself to the top-of-RAM later during execution.
  19. config SYS_INIT_SP_BSS_OFFSET
  20. int
  21. help
  22. U-Boot typically uses a hard-coded value for the stack pointer
  23. before relocation. Define this option to instead calculate the
  24. initial SP at run-time. This is useful to avoid hard-coding addresses
  25. into U-Boot, so that can be loaded and executed at arbitrary
  26. addresses and thus avoid using arbitrary addresses at runtime. This
  27. option's value is the offset added to &_bss_start in order to
  28. calculate the stack pointer. This offset should be large enough so
  29. that the early malloc region, global data (gd), and early stack usage
  30. do not overlap any appended DTB.
  31. config LINUX_KERNEL_IMAGE_HEADER
  32. bool
  33. help
  34. Place a Linux kernel image header at the start of the U-Boot binary.
  35. The format of the header is described in the Linux kernel source at
  36. Documentation/arm64/booting.txt. This feature is useful since the
  37. image header reports the amount of memory (BSS and similar) that
  38. U-Boot needs to use, but which isn't part of the binary.
  39. if LINUX_KERNEL_IMAGE_HEADER
  40. config LNX_KRNL_IMG_TEXT_OFFSET_BASE
  41. hex
  42. help
  43. The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
  44. TEXT_OFFSET value written in to the Linux kernel image header.
  45. endif
  46. endif
  47. config STATIC_RELA
  48. bool
  49. default y if ARM64 && !POSITION_INDEPENDENT
  50. config DMA_ADDR_T_64BIT
  51. bool
  52. default y if ARM64
  53. config HAS_VBAR
  54. bool
  55. config HAS_THUMB2
  56. bool
  57. # Used for compatibility with asm files copied from the kernel
  58. config ARM_ASM_UNIFIED
  59. bool
  60. default y
  61. # Used for compatibility with asm files copied from the kernel
  62. config THUMB2_KERNEL
  63. bool
  64. config SYS_ARM_CACHE_CP15
  65. bool "CP15 based cache enabling support"
  66. help
  67. Select this if your processor suports enabling caches by using
  68. CP15 registers.
  69. config SYS_ARM_MMU
  70. bool "MMU-based Paged Memory Management Support"
  71. select SYS_ARM_CACHE_CP15
  72. help
  73. Select if you want MMU-based virtualised addressing space
  74. support by paged memory management.
  75. config SYS_ARM_MPU
  76. bool 'Use the ARM v7 PMSA Compliant MPU'
  77. help
  78. Some ARM systems without an MMU have instead a Memory Protection
  79. Unit (MPU) that defines the type and permissions for regions of
  80. memory.
  81. If your CPU has an MPU then you should choose 'y' here unless you
  82. know that you do not want to use the MPU.
  83. # If set, the workarounds for these ARM errata are applied early during U-Boot
  84. # startup. Note that in general these options force the workarounds to be
  85. # applied; no CPU-type/version detection exists, unlike the similar options in
  86. # the Linux kernel. Do not set these options unless they apply! Also note that
  87. # the following can be machine specific errata. These do have ability to
  88. # provide rudimentary version and machine specific checks, but expect no
  89. # product checks:
  90. # CONFIG_ARM_ERRATA_430973
  91. # CONFIG_ARM_ERRATA_454179
  92. # CONFIG_ARM_ERRATA_621766
  93. # CONFIG_ARM_ERRATA_798870
  94. # CONFIG_ARM_ERRATA_801819
  95. # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
  96. # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
  97. config ARM_ERRATA_430973
  98. bool
  99. config ARM_ERRATA_454179
  100. bool
  101. config ARM_ERRATA_621766
  102. bool
  103. config ARM_ERRATA_716044
  104. bool
  105. config ARM_ERRATA_725233
  106. bool
  107. config ARM_ERRATA_742230
  108. bool
  109. config ARM_ERRATA_743622
  110. bool
  111. config ARM_ERRATA_751472
  112. bool
  113. config ARM_ERRATA_761320
  114. bool
  115. config ARM_ERRATA_773022
  116. bool
  117. config ARM_ERRATA_774769
  118. bool
  119. config ARM_ERRATA_794072
  120. bool
  121. config ARM_ERRATA_798870
  122. bool
  123. config ARM_ERRATA_801819
  124. bool
  125. config ARM_ERRATA_826974
  126. bool
  127. config ARM_ERRATA_828024
  128. bool
  129. config ARM_ERRATA_829520
  130. bool
  131. config ARM_ERRATA_833069
  132. bool
  133. config ARM_ERRATA_833471
  134. bool
  135. config ARM_ERRATA_845369
  136. bool
  137. config ARM_ERRATA_852421
  138. bool
  139. config ARM_ERRATA_852423
  140. bool
  141. config ARM_ERRATA_855873
  142. bool
  143. config ARM_CORTEX_A8_CVE_2017_5715
  144. bool
  145. config ARM_CORTEX_A15_CVE_2017_5715
  146. bool
  147. config CPU_ARM720T
  148. bool
  149. select SYS_CACHE_SHIFT_5
  150. imply SYS_ARM_MMU
  151. config CPU_ARM920T
  152. bool
  153. select SYS_CACHE_SHIFT_5
  154. imply SYS_ARM_MMU
  155. config CPU_ARM926EJS
  156. bool
  157. select SYS_CACHE_SHIFT_5
  158. imply SYS_ARM_MMU
  159. config CPU_ARM946ES
  160. bool
  161. select SYS_CACHE_SHIFT_5
  162. imply SYS_ARM_MMU
  163. config CPU_ARM1136
  164. bool
  165. select SYS_CACHE_SHIFT_5
  166. imply SYS_ARM_MMU
  167. config CPU_ARM1176
  168. bool
  169. select HAS_VBAR
  170. select SYS_CACHE_SHIFT_5
  171. imply SYS_ARM_MMU
  172. config CPU_V7A
  173. bool
  174. select HAS_VBAR
  175. select HAS_THUMB2
  176. select SYS_CACHE_SHIFT_6
  177. imply SYS_ARM_MMU
  178. config CPU_V7M
  179. bool
  180. select HAS_THUMB2
  181. select THUMB2_KERNEL
  182. select SYS_CACHE_SHIFT_5
  183. select SYS_ARM_MPU
  184. select SYS_THUMB_BUILD
  185. config CPU_V7R
  186. bool
  187. select HAS_THUMB2
  188. select SYS_CACHE_SHIFT_6
  189. select SYS_ARM_MPU
  190. select SYS_ARM_CACHE_CP15
  191. config CPU_PXA
  192. bool
  193. select SYS_CACHE_SHIFT_5
  194. imply SYS_ARM_MMU
  195. config CPU_SA1100
  196. bool
  197. select SYS_CACHE_SHIFT_5
  198. imply SYS_ARM_MMU
  199. config SYS_CPU
  200. default "arm720t" if CPU_ARM720T
  201. default "arm920t" if CPU_ARM920T
  202. default "arm926ejs" if CPU_ARM926EJS
  203. default "arm946es" if CPU_ARM946ES
  204. default "arm1136" if CPU_ARM1136
  205. default "arm1176" if CPU_ARM1176
  206. default "armv7" if CPU_V7A
  207. default "armv7" if CPU_V7R
  208. default "armv7m" if CPU_V7M
  209. default "pxa" if CPU_PXA
  210. default "sa1100" if CPU_SA1100
  211. default "armv8" if ARM64
  212. config SYS_ARM_ARCH
  213. int
  214. default 4 if CPU_ARM720T
  215. default 4 if CPU_ARM920T
  216. default 5 if CPU_ARM926EJS
  217. default 5 if CPU_ARM946ES
  218. default 6 if CPU_ARM1136
  219. default 6 if CPU_ARM1176
  220. default 7 if CPU_V7A
  221. default 7 if CPU_V7M
  222. default 7 if CPU_V7R
  223. default 5 if CPU_PXA
  224. default 4 if CPU_SA1100
  225. default 8 if ARM64
  226. config SYS_CACHE_SHIFT_5
  227. bool
  228. config SYS_CACHE_SHIFT_6
  229. bool
  230. config SYS_CACHE_SHIFT_7
  231. bool
  232. config SYS_CACHELINE_SIZE
  233. int
  234. default 128 if SYS_CACHE_SHIFT_7
  235. default 64 if SYS_CACHE_SHIFT_6
  236. default 32 if SYS_CACHE_SHIFT_5
  237. config SYS_ARCH_TIMER
  238. bool "ARM Generic Timer support"
  239. depends on CPU_V7A || ARM64
  240. default y if ARM64
  241. help
  242. The ARM Generic Timer (aka arch-timer) provides an architected
  243. interface to a timer source on an SoC.
  244. It is mandantory for ARMv8 implementation and widely available
  245. on ARMv7 systems.
  246. config ARM_SMCCC
  247. bool "Support for ARM SMC Calling Convention (SMCCC)"
  248. depends on CPU_V7A || ARM64
  249. select ARM_PSCI_FW
  250. help
  251. Say Y here if you want to enable ARM SMC Calling Convention.
  252. This should be enabled if U-Boot needs to communicate with system
  253. firmware (for example, PSCI) according to SMCCC.
  254. config SEMIHOSTING
  255. bool "support boot from semihosting"
  256. help
  257. In emulated environments, semihosting is a way for
  258. the hosted environment to call out to the emulator to
  259. retrieve files from the host machine.
  260. config SYS_THUMB_BUILD
  261. bool "Build U-Boot using the Thumb instruction set"
  262. depends on !ARM64
  263. help
  264. Use this flag to build U-Boot using the Thumb instruction set for
  265. ARM architectures. Thumb instruction set provides better code
  266. density. For ARM architectures that support Thumb2 this flag will
  267. result in Thumb2 code generated by GCC.
  268. config SPL_SYS_THUMB_BUILD
  269. bool "Build SPL using the Thumb instruction set"
  270. default y if SYS_THUMB_BUILD
  271. depends on !ARM64
  272. help
  273. Use this flag to build SPL using the Thumb instruction set for
  274. ARM architectures. Thumb instruction set provides better code
  275. density. For ARM architectures that support Thumb2 this flag will
  276. result in Thumb2 code generated by GCC.
  277. config SYS_L2CACHE_OFF
  278. bool "L2cache off"
  279. help
  280. If SoC does not support L2CACHE or one do not want to enable
  281. L2CACHE, choose this option.
  282. config ENABLE_ARM_SOC_BOOT0_HOOK
  283. bool "prepare BOOT0 header"
  284. help
  285. If the SoC's BOOT0 requires a header area filled with (magic)
  286. values, then choose this option, and create a file included as
  287. <asm/arch/boot0.h> which contains the required assembler code.
  288. config ARM_CORTEX_CPU_IS_UP
  289. bool
  290. default n
  291. config USE_ARCH_MEMCPY
  292. bool "Use an assembly optimized implementation of memcpy"
  293. default y
  294. depends on !ARM64
  295. help
  296. Enable the generation of an optimized version of memcpy.
  297. Such implementation may be faster under some conditions
  298. but may increase the binary size.
  299. config SPL_USE_ARCH_MEMCPY
  300. bool "Use an assembly optimized implementation of memcpy for SPL"
  301. default y if USE_ARCH_MEMCPY
  302. depends on !ARM64
  303. help
  304. Enable the generation of an optimized version of memcpy.
  305. Such implementation may be faster under some conditions
  306. but may increase the binary size.
  307. config USE_ARCH_MEMSET
  308. bool "Use an assembly optimized implementation of memset"
  309. default y
  310. depends on !ARM64
  311. help
  312. Enable the generation of an optimized version of memset.
  313. Such implementation may be faster under some conditions
  314. but may increase the binary size.
  315. config SPL_USE_ARCH_MEMSET
  316. bool "Use an assembly optimized implementation of memset for SPL"
  317. default y if USE_ARCH_MEMSET
  318. depends on !ARM64
  319. help
  320. Enable the generation of an optimized version of memset.
  321. Such implementation may be faster under some conditions
  322. but may increase the binary size.
  323. config ARM64_SUPPORT_AARCH32
  324. bool "ARM64 system support AArch32 execution state"
  325. default y if ARM64 && !TARGET_THUNDERX_88XX
  326. help
  327. This ARM64 system supports AArch32 execution state.
  328. choice
  329. prompt "Target select"
  330. default TARGET_HIKEY
  331. config ARCH_AT91
  332. bool "Atmel AT91"
  333. select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
  334. config TARGET_EDB93XX
  335. bool "Support edb93xx"
  336. select CPU_ARM920T
  337. select PL010_SERIAL
  338. config TARGET_ASPENITE
  339. bool "Support aspenite"
  340. select CPU_ARM926EJS
  341. config TARGET_GPLUGD
  342. bool "Support gplugd"
  343. select CPU_ARM926EJS
  344. config ARCH_DAVINCI
  345. bool "TI DaVinci"
  346. select CPU_ARM926EJS
  347. imply CMD_SAVES
  348. help
  349. Support for TI's DaVinci platform.
  350. config KIRKWOOD
  351. bool "Marvell Kirkwood"
  352. select CPU_ARM926EJS
  353. select BOARD_EARLY_INIT_F
  354. select ARCH_MISC_INIT
  355. config ARCH_MVEBU
  356. bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
  357. select OF_CONTROL
  358. select OF_SEPARATE
  359. select DM
  360. select DM_ETH
  361. select DM_SERIAL
  362. select DM_SPI
  363. select DM_SPI_FLASH
  364. select SPI
  365. config TARGET_DEVKIT3250
  366. bool "Support devkit3250"
  367. select CPU_ARM926EJS
  368. select SUPPORT_SPL
  369. config TARGET_WORK_92105
  370. bool "Support work_92105"
  371. select CPU_ARM926EJS
  372. select SUPPORT_SPL
  373. config TARGET_APF27
  374. bool "Support apf27"
  375. select CPU_ARM926EJS
  376. select SUPPORT_SPL
  377. config ORION5X
  378. bool "Marvell Orion"
  379. select CPU_ARM926EJS
  380. config TARGET_SPEAR300
  381. bool "Support spear300"
  382. select CPU_ARM926EJS
  383. select BOARD_EARLY_INIT_F
  384. imply CMD_SAVES
  385. select PL011_SERIAL
  386. config TARGET_SPEAR310
  387. bool "Support spear310"
  388. select CPU_ARM926EJS
  389. select BOARD_EARLY_INIT_F
  390. imply CMD_SAVES
  391. select PL011_SERIAL
  392. config TARGET_SPEAR320
  393. bool "Support spear320"
  394. select CPU_ARM926EJS
  395. select BOARD_EARLY_INIT_F
  396. imply CMD_SAVES
  397. select PL011_SERIAL
  398. config TARGET_SPEAR600
  399. bool "Support spear600"
  400. select CPU_ARM926EJS
  401. select BOARD_EARLY_INIT_F
  402. imply CMD_SAVES
  403. select PL011_SERIAL
  404. config TARGET_STV0991
  405. bool "Support stv0991"
  406. select CPU_V7A
  407. select DM
  408. select DM_SERIAL
  409. select DM_SPI
  410. select DM_SPI_FLASH
  411. select SPI
  412. select SPI_FLASH
  413. select PL01X_SERIAL
  414. config TARGET_X600
  415. bool "Support x600"
  416. select BOARD_LATE_INIT
  417. select CPU_ARM926EJS
  418. select SUPPORT_SPL
  419. select PL011_SERIAL
  420. config TARGET_WOODBURN
  421. bool "Support woodburn"
  422. select CPU_ARM1136
  423. config TARGET_WOODBURN_SD
  424. bool "Support woodburn_sd"
  425. select CPU_ARM1136
  426. select SUPPORT_SPL
  427. config TARGET_FLEA3
  428. bool "Support flea3"
  429. select CPU_ARM1136
  430. config TARGET_MX35PDK
  431. bool "Support mx35pdk"
  432. select BOARD_LATE_INIT
  433. select CPU_ARM1136
  434. config ARCH_BCM283X
  435. bool "Broadcom BCM283X family"
  436. select DM
  437. select DM_SERIAL
  438. select DM_GPIO
  439. select OF_CONTROL
  440. select PL01X_SERIAL
  441. select SERIAL_SEARCH_ALL
  442. imply FAT_WRITE
  443. config TARGET_VEXPRESS_CA15_TC2
  444. bool "Support vexpress_ca15_tc2"
  445. select CPU_V7A
  446. select CPU_V7_HAS_NONSEC
  447. select CPU_V7_HAS_VIRT
  448. select PL011_SERIAL
  449. config ARCH_BCMSTB
  450. bool "Broadcom BCM7XXX family"
  451. select CPU_V7A
  452. select DM
  453. select OF_CONTROL
  454. select OF_PRIOR_STAGE
  455. help
  456. This enables support for Broadcom ARM-based set-top box
  457. chipsets, including the 7445 family of chips.
  458. config TARGET_VEXPRESS_CA5X2
  459. bool "Support vexpress_ca5x2"
  460. select CPU_V7A
  461. select PL011_SERIAL
  462. config TARGET_VEXPRESS_CA9X4
  463. bool "Support vexpress_ca9x4"
  464. select CPU_V7A
  465. select PL011_SERIAL
  466. config TARGET_BCM23550_W1D
  467. bool "Support bcm23550_w1d"
  468. select CPU_V7A
  469. imply CRC32_VERIFY
  470. imply FAT_WRITE
  471. config TARGET_BCM28155_AP
  472. bool "Support bcm28155_ap"
  473. select CPU_V7A
  474. imply CRC32_VERIFY
  475. imply FAT_WRITE
  476. config TARGET_BCMCYGNUS
  477. bool "Support bcmcygnus"
  478. select CPU_V7A
  479. imply CRC32_VERIFY
  480. imply CMD_HASH
  481. imply FAT_WRITE
  482. imply HASH_VERIFY
  483. imply NETDEVICES
  484. imply BCM_SF2_ETH
  485. imply BCM_SF2_ETH_GMAC
  486. config TARGET_BCMNSP
  487. bool "Support bcmnsp"
  488. select CPU_V7A
  489. config TARGET_BCMNS2
  490. bool "Support Broadcom Northstar2"
  491. select ARM64
  492. help
  493. Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
  494. ARMv8 Cortex-A57 processors targeting a broad range of networking
  495. applications
  496. config ARCH_EXYNOS
  497. bool "Samsung EXYNOS"
  498. select DM
  499. select DM_I2C
  500. select DM_SPI_FLASH
  501. select DM_SERIAL
  502. select DM_SPI
  503. select DM_GPIO
  504. select DM_KEYBOARD
  505. select SPI
  506. imply FAT_WRITE
  507. config ARCH_S5PC1XX
  508. bool "Samsung S5PC1XX"
  509. select CPU_V7A
  510. select DM
  511. select DM_SERIAL
  512. select DM_GPIO
  513. select DM_I2C
  514. config ARCH_HIGHBANK
  515. bool "Calxeda Highbank"
  516. select CPU_V7A
  517. select PL011_SERIAL
  518. config ARCH_INTEGRATOR
  519. bool "ARM Ltd. Integrator family"
  520. select DM
  521. select DM_SERIAL
  522. select PL01X_SERIAL
  523. config ARCH_KEYSTONE
  524. bool "TI Keystone"
  525. select CPU_V7A
  526. select SUPPORT_SPL
  527. select SYS_THUMB_BUILD
  528. select CMD_POWEROFF
  529. select SYS_ARCH_TIMER
  530. imply CMD_MTDPARTS
  531. imply FIT
  532. imply CMD_SAVES
  533. config ARCH_OMAP2PLUS
  534. bool "TI OMAP2+"
  535. select CPU_V7A
  536. select SPL_BOARD_INIT if SPL
  537. select SPL_STACK_R if SPL
  538. select SUPPORT_SPL
  539. imply FIT
  540. config ARCH_MESON
  541. bool "Amlogic Meson"
  542. imply DISTRO_DEFAULTS
  543. help
  544. Support for the Meson SoC family developed by Amlogic Inc.,
  545. targeted at media players and tablet computers. We currently
  546. support the S905 (GXBaby) 64-bit SoC.
  547. config ARCH_MX8M
  548. bool "NXP i.MX8M platform"
  549. select ARM64
  550. select DM
  551. select SUPPORT_SPL
  552. config ARCH_MX23
  553. bool "NXP i.MX23 family"
  554. select CPU_ARM926EJS
  555. select PL011_SERIAL
  556. select SUPPORT_SPL
  557. config ARCH_MX25
  558. bool "NXP MX25"
  559. select CPU_ARM926EJS
  560. imply MXC_GPIO
  561. config ARCH_MX28
  562. bool "NXP i.MX28 family"
  563. select CPU_ARM926EJS
  564. select PL011_SERIAL
  565. select SUPPORT_SPL
  566. config ARCH_MX31
  567. bool "NXP i.MX31 family"
  568. select CPU_ARM1136
  569. config ARCH_MX7ULP
  570. bool "NXP MX7ULP"
  571. select CPU_V7A
  572. select ROM_UNIFIED_SECTIONS
  573. imply MXC_GPIO
  574. config ARCH_MX7
  575. bool "Freescale MX7"
  576. select CPU_V7A
  577. select SYS_FSL_HAS_SEC if SECURE_BOOT
  578. select SYS_FSL_SEC_COMPAT_4
  579. select SYS_FSL_SEC_LE
  580. select BOARD_EARLY_INIT_F
  581. select ARCH_MISC_INIT
  582. imply MXC_GPIO
  583. config ARCH_MX6
  584. bool "Freescale MX6"
  585. select CPU_V7A
  586. select SYS_FSL_HAS_SEC if SECURE_BOOT
  587. select SYS_FSL_SEC_COMPAT_4
  588. select SYS_FSL_SEC_LE
  589. select SYS_THUMB_BUILD if SPL
  590. imply MXC_GPIO
  591. if ARCH_MX6
  592. config SPL_LDSCRIPT
  593. default "arch/arm/mach-omap2/u-boot-spl.lds"
  594. endif
  595. config ARCH_MX5
  596. bool "Freescale MX5"
  597. select CPU_V7A
  598. select BOARD_EARLY_INIT_F
  599. imply MXC_GPIO
  600. config ARCH_OWL
  601. bool "Actions Semi OWL SoCs"
  602. select ARM64
  603. select DM
  604. select DM_SERIAL
  605. select OF_CONTROL
  606. config ARCH_QEMU
  607. bool "QEMU Virtual Platform"
  608. select DM
  609. select DM_SERIAL
  610. select OF_CONTROL
  611. select PL01X_SERIAL
  612. config ARCH_RMOBILE
  613. bool "Renesas ARM SoCs"
  614. select DM
  615. select DM_SERIAL
  616. select BOARD_EARLY_INIT_F
  617. imply FAT_WRITE
  618. imply SYS_THUMB_BUILD
  619. config TARGET_S32V234EVB
  620. bool "Support s32v234evb"
  621. select ARM64
  622. select SYS_FSL_ERRATUM_ESDHC111
  623. config ARCH_SNAPDRAGON
  624. bool "Qualcomm Snapdragon SoCs"
  625. select ARM64
  626. select DM
  627. select DM_GPIO
  628. select DM_SERIAL
  629. select SPMI
  630. select OF_CONTROL
  631. select OF_SEPARATE
  632. config ARCH_SOCFPGA
  633. bool "Altera SOCFPGA family"
  634. select ARCH_EARLY_INIT_R
  635. select ARCH_MISC_INIT
  636. select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  637. select DM
  638. select DM_SERIAL
  639. select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  640. select OF_CONTROL
  641. select SPL_LIBCOMMON_SUPPORT
  642. select SPL_LIBDISK_SUPPORT
  643. select SPL_LIBGENERIC_SUPPORT
  644. select SPL_MMC_SUPPORT if DM_MMC
  645. select SPL_NAND_SUPPORT if SPL_NAND_DENALI
  646. select SPL_OF_CONTROL
  647. select SPL_SERIAL_SUPPORT
  648. select SPL_DM_SERIAL
  649. select SPL_RESET_SUPPORT
  650. select SPL_SPI_FLASH_SUPPORT if SPL_SPI_SUPPORT
  651. select SPL_SPI_SUPPORT if DM_SPI
  652. select SPL_WATCHDOG_SUPPORT
  653. select SUPPORT_SPL
  654. select SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
  655. select SYS_NS16550
  656. select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  657. select ARM64 if TARGET_SOCFPGA_STRATIX10
  658. imply CMD_MTDPARTS
  659. imply CRC32_VERIFY
  660. imply DM_SPI
  661. imply DM_SPI_FLASH
  662. imply FAT_WRITE
  663. imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
  664. select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10
  665. config ARCH_SUNXI
  666. bool "Support sunxi (Allwinner) SoCs"
  667. select BINMAN
  668. select CMD_GPIO
  669. select CMD_MMC if MMC
  670. select CMD_USB if DISTRO_DEFAULTS
  671. select DM
  672. select DM_ETH
  673. select DM_GPIO
  674. select DM_KEYBOARD
  675. select DM_SERIAL
  676. select DM_USB if DISTRO_DEFAULTS
  677. select OF_BOARD_SETUP
  678. select OF_CONTROL
  679. select OF_SEPARATE
  680. select SPECIFY_CONSOLE_INDEX
  681. select SPL_STACK_R if SPL
  682. select SPL_SYS_MALLOC_SIMPLE if SPL
  683. select SYS_NS16550
  684. select SPL_SYS_THUMB_BUILD if !ARM64
  685. select SYS_THUMB_BUILD if !ARM64
  686. select USB if DISTRO_DEFAULTS
  687. select USB_STORAGE if DISTRO_DEFAULTS
  688. select USB_KEYBOARD if DISTRO_DEFAULTS
  689. select USE_TINY_PRINTF
  690. imply CMD_GPT
  691. imply DISTRO_DEFAULTS
  692. imply FAT_WRITE
  693. imply OF_LIBFDT_OVERLAY
  694. imply PRE_CONSOLE_BUFFER
  695. imply SPL_GPIO_SUPPORT
  696. imply SPL_LIBCOMMON_SUPPORT
  697. imply SPL_LIBDISK_SUPPORT
  698. imply SPL_LIBGENERIC_SUPPORT
  699. imply SPL_MMC_SUPPORT if MMC
  700. imply SPL_POWER_SUPPORT
  701. imply SPL_SERIAL_SUPPORT
  702. imply USB_GADGET
  703. config ARCH_VF610
  704. bool "Freescale Vybrid"
  705. select CPU_V7A
  706. select SYS_FSL_ERRATUM_ESDHC111
  707. imply CMD_MTDPARTS
  708. imply NAND
  709. config ARCH_ZYNQ
  710. bool "Xilinx Zynq based platform"
  711. select BOARD_LATE_INIT
  712. select CPU_V7A
  713. select SUPPORT_SPL
  714. select OF_CONTROL
  715. select SPL_BOARD_INIT if SPL
  716. select BOARD_EARLY_INIT_F if WDT
  717. select SPL_OF_CONTROL if SPL
  718. select DM
  719. select DM_ETH if NET
  720. select SPL_DM if SPL
  721. select DM_MMC if MMC
  722. select DM_SPI
  723. select DM_SERIAL
  724. select DM_SPI_FLASH
  725. select SPL_SEPARATE_BSS if SPL
  726. select DM_USB if USB
  727. select CLK
  728. select SPL_CLK if SPL
  729. select CLK_ZYNQ
  730. select SPI
  731. imply CMD_CLK
  732. imply FAT_WRITE
  733. imply CMD_SPL
  734. imply ARCH_EARLY_INIT_R
  735. config ARCH_ZYNQMP_R5
  736. bool "Xilinx ZynqMP R5 based platform"
  737. select CPU_V7R
  738. select OF_CONTROL
  739. select DM
  740. select DM_SERIAL
  741. select CLK
  742. config ARCH_ZYNQMP
  743. bool "Xilinx ZynqMP based platform"
  744. select ARM64
  745. select BOARD_LATE_INIT
  746. select DM
  747. select OF_CONTROL
  748. select DM_SERIAL
  749. select SUPPORT_SPL
  750. select CLK
  751. select SPL_BOARD_INIT if SPL
  752. select SPL_CLK if SPL
  753. select DM_USB if USB
  754. imply FAT_WRITE
  755. config TEGRA
  756. bool "NVIDIA Tegra"
  757. imply DISTRO_DEFAULTS
  758. imply FAT_WRITE
  759. config TARGET_VEXPRESS64_AEMV8A
  760. bool "Support vexpress_aemv8a"
  761. select ARM64
  762. select PL01X_SERIAL
  763. config TARGET_VEXPRESS64_BASE_FVP
  764. bool "Support Versatile Express ARMv8a FVP BASE model"
  765. select ARM64
  766. select SEMIHOSTING
  767. select PL01X_SERIAL
  768. config TARGET_VEXPRESS64_BASE_FVP_DRAM
  769. bool "Support Versatile Express ARMv8a FVP BASE model booting from DRAM"
  770. select ARM64
  771. select PL01X_SERIAL
  772. help
  773. This target is derived from TARGET_VEXPRESS64_BASE_FVP and over-rides
  774. the default config to allow the user to load the images directly into
  775. DRAM using model parameters rather than by using semi-hosting to load
  776. the files from the host filesystem.
  777. config TARGET_VEXPRESS64_JUNO
  778. bool "Support Versatile Express Juno Development Platform"
  779. select ARM64
  780. select PL01X_SERIAL
  781. config TARGET_LS2080A_EMU
  782. bool "Support ls2080a_emu"
  783. select ARCH_LS2080A
  784. select ARM64
  785. select ARMV8_MULTIENTRY
  786. select ARCH_MISC_INIT
  787. help
  788. Support for Freescale LS2080A_EMU platform
  789. The LS2080A Development System (EMULATOR) is a pre silicon
  790. development platform that supports the QorIQ LS2080A
  791. Layerscape Architecture processor.
  792. config TARGET_LS2080A_SIMU
  793. bool "Support ls2080a_simu"
  794. select ARCH_LS2080A
  795. select ARM64
  796. select ARMV8_MULTIENTRY
  797. select ARCH_MISC_INIT
  798. help
  799. Support for Freescale LS2080A_SIMU platform
  800. The LS2080A Development System (QDS) is a pre silicon
  801. development platform that supports the QorIQ LS2080A
  802. Layerscape Architecture processor.
  803. config TARGET_LS1088AQDS
  804. bool "Support ls1088aqds"
  805. select ARCH_LS1088A
  806. select ARM64
  807. select ARMV8_MULTIENTRY
  808. select ARCH_MISC_INIT
  809. select BOARD_LATE_INIT
  810. select SUPPORT_SPL
  811. help
  812. Support for NXP LS1088AQDS platform
  813. The LS1088A Development System (QDS) is a high-performance
  814. development platform that supports the QorIQ LS1088A
  815. Layerscape Architecture processor.
  816. config TARGET_LS2080AQDS
  817. bool "Support ls2080aqds"
  818. select ARCH_LS2080A
  819. select ARM64
  820. select ARMV8_MULTIENTRY
  821. select BOARD_LATE_INIT
  822. select SUPPORT_SPL
  823. select ARCH_MISC_INIT
  824. imply SCSI
  825. imply SCSI_AHCI
  826. help
  827. Support for Freescale LS2080AQDS platform
  828. The LS2080A Development System (QDS) is a high-performance
  829. development platform that supports the QorIQ LS2080A
  830. Layerscape Architecture processor.
  831. config TARGET_LS2080ARDB
  832. bool "Support ls2080ardb"
  833. select ARCH_LS2080A
  834. select ARM64
  835. select ARMV8_MULTIENTRY
  836. select BOARD_LATE_INIT
  837. select SUPPORT_SPL
  838. select ARCH_MISC_INIT
  839. imply SCSI
  840. imply SCSI_AHCI
  841. help
  842. Support for Freescale LS2080ARDB platform.
  843. The LS2080A Reference design board (RDB) is a high-performance
  844. development platform that supports the QorIQ LS2080A
  845. Layerscape Architecture processor.
  846. config TARGET_LS2081ARDB
  847. bool "Support ls2081ardb"
  848. select ARCH_LS2080A
  849. select ARM64
  850. select ARMV8_MULTIENTRY
  851. select BOARD_LATE_INIT
  852. select SUPPORT_SPL
  853. select ARCH_MISC_INIT
  854. help
  855. Support for Freescale LS2081ARDB platform.
  856. The LS2081A Reference design board (RDB) is a high-performance
  857. development platform that supports the QorIQ LS2081A/LS2041A
  858. Layerscape Architecture processor.
  859. config TARGET_HIKEY
  860. bool "Support HiKey 96boards Consumer Edition Platform"
  861. select ARM64
  862. select DM
  863. select DM_GPIO
  864. select DM_SERIAL
  865. select OF_CONTROL
  866. select PL01X_SERIAL
  867. select SPECIFY_CONSOLE_INDEX
  868. help
  869. Support for HiKey 96boards platform. It features a HI6220
  870. SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
  871. config TARGET_POPLAR
  872. bool "Support Poplar 96boards Enterprise Edition Platform"
  873. select ARM64
  874. select DM
  875. select OF_CONTROL
  876. select DM_SERIAL
  877. select DM_USB
  878. select PL01X_SERIAL
  879. help
  880. Support for Poplar 96boards EE platform. It features a HI3798cv200
  881. SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
  882. making it capable of running any commercial set-top solution based on
  883. Linux or Android.
  884. config TARGET_LS1012AQDS
  885. bool "Support ls1012aqds"
  886. select ARCH_LS1012A
  887. select ARM64
  888. select BOARD_LATE_INIT
  889. help
  890. Support for Freescale LS1012AQDS platform.
  891. The LS1012A Development System (QDS) is a high-performance
  892. development platform that supports the QorIQ LS1012A
  893. Layerscape Architecture processor.
  894. config TARGET_LS1012ARDB
  895. bool "Support ls1012ardb"
  896. select ARCH_LS1012A
  897. select ARM64
  898. select BOARD_LATE_INIT
  899. imply SCSI
  900. imply SCSI_AHCI
  901. help
  902. Support for Freescale LS1012ARDB platform.
  903. The LS1012A Reference design board (RDB) is a high-performance
  904. development platform that supports the QorIQ LS1012A
  905. Layerscape Architecture processor.
  906. config TARGET_LS1012A2G5RDB
  907. bool "Support ls1012a2g5rdb"
  908. select ARCH_LS1012A
  909. select ARM64
  910. select BOARD_LATE_INIT
  911. imply SCSI
  912. help
  913. Support for Freescale LS1012A2G5RDB platform.
  914. The LS1012A 2G5 Reference design board (RDB) is a high-performance
  915. development platform that supports the QorIQ LS1012A
  916. Layerscape Architecture processor.
  917. config TARGET_LS1012AFRWY
  918. bool "Support ls1012afrwy"
  919. select ARCH_LS1012A
  920. select BOARD_LATE_INIT
  921. select ARM64
  922. imply SCSI
  923. imply SCSI_AHCI
  924. help
  925. Support for Freescale LS1012AFRWY platform.
  926. The LS1012A FRWY board (FRWY) is a high-performance
  927. development platform that supports the QorIQ LS1012A
  928. Layerscape Architecture processor.
  929. config TARGET_LS1012AFRDM
  930. bool "Support ls1012afrdm"
  931. select ARCH_LS1012A
  932. select ARM64
  933. help
  934. Support for Freescale LS1012AFRDM platform.
  935. The LS1012A Freedom board (FRDM) is a high-performance
  936. development platform that supports the QorIQ LS1012A
  937. Layerscape Architecture processor.
  938. config TARGET_LS1088ARDB
  939. bool "Support ls1088ardb"
  940. select ARCH_LS1088A
  941. select ARM64
  942. select ARMV8_MULTIENTRY
  943. select ARCH_MISC_INIT
  944. select BOARD_LATE_INIT
  945. select SUPPORT_SPL
  946. help
  947. Support for NXP LS1088ARDB platform.
  948. The LS1088A Reference design board (RDB) is a high-performance
  949. development platform that supports the QorIQ LS1088A
  950. Layerscape Architecture processor.
  951. config TARGET_LS1021AQDS
  952. bool "Support ls1021aqds"
  953. select BOARD_LATE_INIT
  954. select CPU_V7A
  955. select CPU_V7_HAS_NONSEC
  956. select CPU_V7_HAS_VIRT
  957. select SUPPORT_SPL
  958. select ARCH_LS1021A
  959. select ARCH_SUPPORT_PSCI
  960. select LS1_DEEP_SLEEP
  961. select SYS_FSL_DDR
  962. select BOARD_EARLY_INIT_F
  963. imply SCSI
  964. config TARGET_LS1021ATWR
  965. bool "Support ls1021atwr"
  966. select BOARD_LATE_INIT
  967. select CPU_V7A
  968. select CPU_V7_HAS_NONSEC
  969. select CPU_V7_HAS_VIRT
  970. select SUPPORT_SPL
  971. select ARCH_LS1021A
  972. select ARCH_SUPPORT_PSCI
  973. select LS1_DEEP_SLEEP
  974. select BOARD_EARLY_INIT_F
  975. imply SCSI
  976. config TARGET_LS1021AIOT
  977. bool "Support ls1021aiot"
  978. select BOARD_LATE_INIT
  979. select CPU_V7A
  980. select CPU_V7_HAS_NONSEC
  981. select CPU_V7_HAS_VIRT
  982. select SUPPORT_SPL
  983. select ARCH_LS1021A
  984. select ARCH_SUPPORT_PSCI
  985. imply SCSI
  986. help
  987. Support for Freescale LS1021AIOT platform.
  988. The LS1021A Freescale board (IOT) is a high-performance
  989. development platform that supports the QorIQ LS1021A
  990. Layerscape Architecture processor.
  991. config TARGET_LS1043AQDS
  992. bool "Support ls1043aqds"
  993. select ARCH_LS1043A
  994. select ARM64
  995. select ARMV8_MULTIENTRY
  996. select BOARD_LATE_INIT
  997. select SUPPORT_SPL
  998. select BOARD_EARLY_INIT_F
  999. imply SCSI
  1000. help
  1001. Support for Freescale LS1043AQDS platform.
  1002. config TARGET_LS1043ARDB
  1003. bool "Support ls1043ardb"
  1004. select ARCH_LS1043A
  1005. select ARM64
  1006. select ARMV8_MULTIENTRY
  1007. select BOARD_LATE_INIT
  1008. select SUPPORT_SPL
  1009. select BOARD_EARLY_INIT_F
  1010. imply SCSI
  1011. help
  1012. Support for Freescale LS1043ARDB platform.
  1013. config TARGET_LS1046AQDS
  1014. bool "Support ls1046aqds"
  1015. select ARCH_LS1046A
  1016. select ARM64
  1017. select ARMV8_MULTIENTRY
  1018. select BOARD_LATE_INIT
  1019. select SUPPORT_SPL
  1020. select DM_SPI_FLASH if DM_SPI
  1021. select BOARD_EARLY_INIT_F
  1022. imply SCSI
  1023. help
  1024. Support for Freescale LS1046AQDS platform.
  1025. The LS1046A Development System (QDS) is a high-performance
  1026. development platform that supports the QorIQ LS1046A
  1027. Layerscape Architecture processor.
  1028. config TARGET_LS1046ARDB
  1029. bool "Support ls1046ardb"
  1030. select ARCH_LS1046A
  1031. select ARM64
  1032. select ARMV8_MULTIENTRY
  1033. select BOARD_LATE_INIT
  1034. select SUPPORT_SPL
  1035. select DM_SPI_FLASH if DM_SPI
  1036. select POWER_MC34VR500
  1037. select BOARD_EARLY_INIT_F
  1038. imply SCSI
  1039. help
  1040. Support for Freescale LS1046ARDB platform.
  1041. The LS1046A Reference Design Board (RDB) is a high-performance
  1042. development platform that supports the QorIQ LS1046A
  1043. Layerscape Architecture processor.
  1044. config TARGET_H2200
  1045. bool "Support h2200"
  1046. select CPU_PXA
  1047. config TARGET_ZIPITZ2
  1048. bool "Support zipitz2"
  1049. select CPU_PXA
  1050. config TARGET_COLIBRI_PXA270
  1051. bool "Support colibri_pxa270"
  1052. select CPU_PXA
  1053. config ARCH_UNIPHIER
  1054. bool "Socionext UniPhier SoCs"
  1055. select BOARD_LATE_INIT
  1056. select DM
  1057. select DM_GPIO
  1058. select DM_I2C
  1059. select DM_MMC
  1060. select DM_RESET
  1061. select DM_SERIAL
  1062. select DM_USB
  1063. select OF_CONTROL
  1064. select OF_LIBFDT
  1065. select PINCTRL
  1066. select SPL_BOARD_INIT if SPL
  1067. select SPL_DM if SPL
  1068. select SPL_LIBCOMMON_SUPPORT if SPL
  1069. select SPL_LIBGENERIC_SUPPORT if SPL
  1070. select SPL_OF_CONTROL if SPL
  1071. select SPL_PINCTRL if SPL
  1072. select SUPPORT_SPL
  1073. imply FAT_WRITE
  1074. help
  1075. Support for UniPhier SoC family developed by Socionext Inc.
  1076. (formerly, System LSI Business Division of Panasonic Corporation)
  1077. config STM32
  1078. bool "Support STMicroelectronics STM32 MCU with cortex M"
  1079. select CPU_V7M
  1080. select DM
  1081. select DM_SERIAL
  1082. select SYS_THUMB_BUILD
  1083. config ARCH_STI
  1084. bool "Support STMicrolectronics SoCs"
  1085. select CPU_V7A
  1086. select DM
  1087. select DM_SERIAL
  1088. select BLK
  1089. select DM_MMC
  1090. select DM_RESET
  1091. help
  1092. Support for STMicroelectronics STiH407/10 SoC family.
  1093. This SoC is used on Linaro 96Board STiH410-B2260
  1094. config ARCH_STM32MP
  1095. bool "Support STMicroelectronics STM32MP Socs with cortex A"
  1096. select ARCH_MISC_INIT
  1097. select BOARD_LATE_INIT
  1098. select CLK
  1099. select DM
  1100. select DM_GPIO
  1101. select DM_RESET
  1102. select DM_SERIAL
  1103. select OF_CONTROL
  1104. select OF_LIBFDT
  1105. select MISC
  1106. select PINCTRL
  1107. select REGMAP
  1108. select SUPPORT_SPL
  1109. select SYSCON
  1110. select SYSRESET
  1111. select SYS_THUMB_BUILD
  1112. help
  1113. Support for STM32MP SoC family developed by STMicroelectronics,
  1114. MPUs based on ARM cortex A core
  1115. U-BOOT is running in DDR and SPL support is the unsecure First Stage
  1116. BootLoader (FSBL)
  1117. config ARCH_ROCKCHIP
  1118. bool "Support Rockchip SoCs"
  1119. select OF_CONTROL
  1120. select BLK
  1121. select DM
  1122. select SPL_DM if SPL
  1123. select SYS_MALLOC_F
  1124. select SYS_THUMB_BUILD if !ARM64
  1125. select SPL_SYS_MALLOC_SIMPLE if SPL
  1126. select DM_GPIO
  1127. select DM_I2C
  1128. select DM_MMC
  1129. select DM_SERIAL
  1130. select DM_SPI
  1131. select DM_SPI_FLASH
  1132. select DM_USB if USB
  1133. select DM_PWM
  1134. select DM_REGULATOR
  1135. select ENABLE_ARM_SOC_BOOT0_HOOK
  1136. select SPI
  1137. imply DISTRO_DEFAULTS
  1138. imply FAT_WRITE
  1139. imply USB_FUNCTION_FASTBOOT
  1140. imply SPL_SYSRESET
  1141. imply TPL_SYSRESET
  1142. imply ADC
  1143. imply SARADC_ROCKCHIP
  1144. imply SYS_NS16550
  1145. config TARGET_THUNDERX_88XX
  1146. bool "Support ThunderX 88xx"
  1147. select ARM64
  1148. select OF_CONTROL
  1149. select SYS_CACHE_SHIFT_7
  1150. select PL01X_SERIAL
  1151. config ARCH_ASPEED
  1152. bool "Support Aspeed SoCs"
  1153. select OF_CONTROL
  1154. select DM
  1155. endchoice
  1156. config TI_SECURE_DEVICE
  1157. bool "HS Device Type Support"
  1158. depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS
  1159. help
  1160. If a high secure (HS) device type is being used, this config
  1161. must be set. This option impacts various aspects of the
  1162. build system (to create signed boot images that can be
  1163. authenticated) and the code. See the doc/README.ti-secure
  1164. file for further details.
  1165. source "arch/arm/mach-aspeed/Kconfig"
  1166. source "arch/arm/mach-at91/Kconfig"
  1167. source "arch/arm/mach-bcm283x/Kconfig"
  1168. source "arch/arm/mach-bcmstb/Kconfig"
  1169. source "arch/arm/mach-davinci/Kconfig"
  1170. source "arch/arm/mach-exynos/Kconfig"
  1171. source "arch/arm/mach-highbank/Kconfig"
  1172. source "arch/arm/mach-integrator/Kconfig"
  1173. source "arch/arm/mach-keystone/Kconfig"
  1174. source "arch/arm/mach-kirkwood/Kconfig"
  1175. source "arch/arm/mach-mvebu/Kconfig"
  1176. source "arch/arm/cpu/armv7/ls102xa/Kconfig"
  1177. source "arch/arm/mach-imx/mx2/Kconfig"
  1178. source "arch/arm/mach-imx/mx3/Kconfig"
  1179. source "arch/arm/mach-imx/mx5/Kconfig"
  1180. source "arch/arm/mach-imx/mx6/Kconfig"
  1181. source "arch/arm/mach-imx/mx7/Kconfig"
  1182. source "arch/arm/mach-imx/mx7ulp/Kconfig"
  1183. source "arch/arm/mach-imx/mx8m/Kconfig"
  1184. source "arch/arm/mach-imx/mxs/Kconfig"
  1185. source "arch/arm/mach-omap2/Kconfig"
  1186. source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
  1187. source "arch/arm/mach-orion5x/Kconfig"
  1188. source "arch/arm/mach-owl/Kconfig"
  1189. source "arch/arm/mach-rmobile/Kconfig"
  1190. source "arch/arm/mach-meson/Kconfig"
  1191. source "arch/arm/mach-qemu/Kconfig"
  1192. source "arch/arm/mach-rockchip/Kconfig"
  1193. source "arch/arm/mach-s5pc1xx/Kconfig"
  1194. source "arch/arm/mach-snapdragon/Kconfig"
  1195. source "arch/arm/mach-socfpga/Kconfig"
  1196. source "arch/arm/mach-sti/Kconfig"
  1197. source "arch/arm/mach-stm32/Kconfig"
  1198. source "arch/arm/mach-stm32mp/Kconfig"
  1199. source "arch/arm/mach-sunxi/Kconfig"
  1200. source "arch/arm/mach-tegra/Kconfig"
  1201. source "arch/arm/mach-uniphier/Kconfig"
  1202. source "arch/arm/cpu/armv7/vf610/Kconfig"
  1203. source "arch/arm/mach-zynq/Kconfig"
  1204. source "arch/arm/mach-zynqmp-r5/Kconfig"
  1205. source "arch/arm/cpu/armv7/Kconfig"
  1206. source "arch/arm/cpu/armv8/zynqmp/Kconfig"
  1207. source "arch/arm/cpu/armv8/Kconfig"
  1208. source "arch/arm/mach-imx/Kconfig"
  1209. source "board/bosch/shc/Kconfig"
  1210. source "board/CarMediaLab/flea3/Kconfig"
  1211. source "board/Marvell/aspenite/Kconfig"
  1212. source "board/Marvell/gplugd/Kconfig"
  1213. source "board/armadeus/apf27/Kconfig"
  1214. source "board/armltd/vexpress/Kconfig"
  1215. source "board/armltd/vexpress64/Kconfig"
  1216. source "board/broadcom/bcm23550_w1d/Kconfig"
  1217. source "board/broadcom/bcm28155_ap/Kconfig"
  1218. source "board/broadcom/bcmcygnus/Kconfig"
  1219. source "board/broadcom/bcmnsp/Kconfig"
  1220. source "board/broadcom/bcmns2/Kconfig"
  1221. source "board/cavium/thunderx/Kconfig"
  1222. source "board/cirrus/edb93xx/Kconfig"
  1223. source "board/eets/pdu001/Kconfig"
  1224. source "board/freescale/ls2080a/Kconfig"
  1225. source "board/freescale/ls2080aqds/Kconfig"
  1226. source "board/freescale/ls2080ardb/Kconfig"
  1227. source "board/freescale/ls1088a/Kconfig"
  1228. source "board/freescale/ls1021aqds/Kconfig"
  1229. source "board/freescale/ls1043aqds/Kconfig"
  1230. source "board/freescale/ls1021atwr/Kconfig"
  1231. source "board/freescale/ls1021aiot/Kconfig"
  1232. source "board/freescale/ls1046aqds/Kconfig"
  1233. source "board/freescale/ls1043ardb/Kconfig"
  1234. source "board/freescale/ls1046ardb/Kconfig"
  1235. source "board/freescale/ls1012aqds/Kconfig"
  1236. source "board/freescale/ls1012ardb/Kconfig"
  1237. source "board/freescale/ls1012afrdm/Kconfig"
  1238. source "board/freescale/mx35pdk/Kconfig"
  1239. source "board/freescale/s32v234evb/Kconfig"
  1240. source "board/gdsys/a38x/Kconfig"
  1241. source "board/grinn/chiliboard/Kconfig"
  1242. source "board/gumstix/pepper/Kconfig"
  1243. source "board/h2200/Kconfig"
  1244. source "board/hisilicon/hikey/Kconfig"
  1245. source "board/hisilicon/poplar/Kconfig"
  1246. source "board/isee/igep003x/Kconfig"
  1247. source "board/phytec/pcm051/Kconfig"
  1248. source "board/silica/pengwyn/Kconfig"
  1249. source "board/spear/spear300/Kconfig"
  1250. source "board/spear/spear310/Kconfig"
  1251. source "board/spear/spear320/Kconfig"
  1252. source "board/spear/spear600/Kconfig"
  1253. source "board/spear/x600/Kconfig"
  1254. source "board/st/stv0991/Kconfig"
  1255. source "board/tcl/sl50/Kconfig"
  1256. source "board/ucRobotics/bubblegum_96/Kconfig"
  1257. source "board/birdland/bav335x/Kconfig"
  1258. source "board/timll/devkit3250/Kconfig"
  1259. source "board/toradex/colibri_pxa270/Kconfig"
  1260. source "board/vscom/baltos/Kconfig"
  1261. source "board/woodburn/Kconfig"
  1262. source "board/work-microwave/work_92105/Kconfig"
  1263. source "board/xilinx/Kconfig"
  1264. source "board/xilinx/zynq/Kconfig"
  1265. source "board/xilinx/zynqmp/Kconfig"
  1266. source "board/zipitz2/Kconfig"
  1267. source "arch/arm/Kconfig.debug"
  1268. endmenu
  1269. config SPL_LDSCRIPT
  1270. default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
  1271. default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
  1272. default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64