mt76xx.h 853 B

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2018 Stefan Roese <sr@denx.de>
  4. */
  5. #ifndef __MT76XX_H
  6. #define __MT76XX_H
  7. #define MT76XX_SYSCTL_BASE 0x10000000
  8. #define MT76XX_CHIPID_OFFS 0x00
  9. #define MT76XX_CHIP_REV_ID_OFFS 0x0c
  10. #define MT76XX_SYSCFG0_OFFS 0x10
  11. #define MT76XX_MEMCTRL_BASE (MT76XX_SYSCTL_BASE + 0x0300)
  12. #define MT76XX_RGCTRL_BASE (MT76XX_SYSCTL_BASE + 0x1000)
  13. #define MT76XX_ROM_STATUS_REG (MT76XX_SYSCTL_BASE + 0x0028)
  14. #define MT76XX_CLKCFG0_REG (MT76XX_SYSCTL_BASE + 0x002c)
  15. #define MT76XX_DYN_CFG0_REG (MT76XX_SYSCTL_BASE + 0x0440)
  16. #define DDR_CFG1_REG (MT76XX_MEMCTRL_BASE + 0x44)
  17. #define DDR_CFG2_REG (MT76XX_MEMCTRL_BASE + 0x48)
  18. #define DDR_CFG3_REG (MT76XX_MEMCTRL_BASE + 0x4c)
  19. #define DDR_CFG4_REG (MT76XX_MEMCTRL_BASE + 0x50)
  20. #ifndef __ASSEMBLY__
  21. /* Prototypes */
  22. void ddr_calibrate(void);
  23. #endif
  24. #endif