axs101.h 4.4 KB

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  1. /*
  2. * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #ifndef _CONFIG_AXS101_H_
  7. #define _CONFIG_AXS101_H_
  8. /*
  9. * CPU configuration
  10. */
  11. #define CONFIG_ARC700
  12. #define CONFIG_ARC_MMU_VER 3
  13. #define CONFIG_SYS_CACHELINE_SIZE 32
  14. #define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ
  15. /* NAND controller DMA doesn't work correctly with D$ enabled */
  16. #define CONFIG_SYS_DCACHE_OFF
  17. /*
  18. * Board configuration
  19. */
  20. #define CONFIG_SYS_GENERIC_BOARD
  21. #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is in RAM already */
  22. #define CONFIG_ARCH_EARLY_INIT_R
  23. #define ARC_FPGA_PERIPHERAL_BASE 0xE0000000
  24. #define ARC_APB_PERIPHERAL_BASE 0xF0000000
  25. #define ARC_DWMMC_BASE (ARC_FPGA_PERIPHERAL_BASE + 0x15000)
  26. #define ARC_DWGMAC_BASE (ARC_FPGA_PERIPHERAL_BASE + 0x18000)
  27. /*
  28. * Memory configuration
  29. */
  30. #define CONFIG_SYS_TEXT_BASE 0x81000000
  31. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
  32. #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
  33. #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
  34. #define CONFIG_SYS_SDRAM_SIZE 0x20000000 /* 512 Mb */
  35. #define CONFIG_SYS_INIT_SP_ADDR \
  36. (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
  37. #define CONFIG_SYS_MALLOC_LEN 0x200000 /* 2 MB */
  38. #define CONFIG_SYS_BOOTM_LEN 0x2000000 /* 32 MB */
  39. #define CONFIG_SYS_LOAD_ADDR 0x82000000
  40. /*
  41. * NAND Flash configuration
  42. */
  43. #define CONFIG_SYS_NO_FLASH
  44. #define CONFIG_SYS_NAND_BASE (ARC_FPGA_PERIPHERAL_BASE + 0x16000)
  45. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  46. /*
  47. * UART configuration
  48. *
  49. * CONFIG_CONS_INDEX = 1 - Debug UART
  50. * CONFIG_CONS_INDEX = 4 - FPGA UART connected to FTDI/USB
  51. */
  52. #define CONFIG_CONS_INDEX 4
  53. #define CONFIG_SYS_NS16550
  54. #define CONFIG_SYS_NS16550_SERIAL
  55. #define CONFIG_SYS_NS16550_REG_SIZE -4
  56. #if (CONFIG_CONS_INDEX == 1)
  57. /* Debug UART */
  58. # define CONFIG_SYS_NS16550_CLK 33333000
  59. #else
  60. /* FPGA UARTs use different clock */
  61. # define CONFIG_SYS_NS16550_CLK 33333333
  62. #endif
  63. #define CONFIG_SYS_NS16550_COM1 (ARC_APB_PERIPHERAL_BASE + 0x5000)
  64. #define CONFIG_SYS_NS16550_COM2 (ARC_FPGA_PERIPHERAL_BASE + 0x20000)
  65. #define CONFIG_SYS_NS16550_COM3 (ARC_FPGA_PERIPHERAL_BASE + 0x21000)
  66. #define CONFIG_SYS_NS16550_COM4 (ARC_FPGA_PERIPHERAL_BASE + 0x22000)
  67. #define CONFIG_SYS_NS16550_MEM32
  68. #define CONFIG_BAUDRATE 115200
  69. /*
  70. * I2C configuration
  71. */
  72. #define CONFIG_SYS_I2C
  73. #define CONFIG_SYS_I2C_DW
  74. #define CONFIG_I2C_ENV_EEPROM_BUS 2
  75. #define CONFIG_SYS_I2C_SPEED 100000
  76. #define CONFIG_SYS_I2C_SPEED1 100000
  77. #define CONFIG_SYS_I2C_SPEED2 100000
  78. #define CONFIG_SYS_I2C_SLAVE 0
  79. #define CONFIG_SYS_I2C_SLAVE1 0
  80. #define CONFIG_SYS_I2C_SLAVE2 0
  81. #define CONFIG_SYS_I2C_BASE 0xE001D000
  82. #define CONFIG_SYS_I2C_BASE1 0xE001E000
  83. #define CONFIG_SYS_I2C_BASE2 0xE001F000
  84. #define CONFIG_SYS_I2C_BUS_MAX 3
  85. #define IC_CLK 50
  86. /*
  87. * EEPROM configuration
  88. */
  89. #define CONFIG_SYS_I2C_MULTI_EEPROMS
  90. #define CONFIG_SYS_I2C_EEPROM_ADDR (0xA8 >> 1)
  91. #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
  92. #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 1
  93. #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
  94. #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 64
  95. /*
  96. * SD/MMC configuration
  97. */
  98. #define CONFIG_MMC
  99. #define CONFIG_GENERIC_MMC
  100. #define CONFIG_DWMMC
  101. #define CONFIG_DOS_PARTITION
  102. /*
  103. * Ethernet PHY configuration
  104. */
  105. #define CONFIG_PHYLIB
  106. #define CONFIG_MII
  107. #define CONFIG_PHY_GIGE
  108. /*
  109. * Ethernet configuration
  110. */
  111. #define CONFIG_DESIGNWARE_ETH
  112. #define CONFIG_DW_AUTONEG
  113. #define CONFIG_NET_MULTI
  114. /*
  115. * Command line configuration
  116. */
  117. #include <config_cmd_default.h>
  118. #define CONFIG_CMD_DHCP
  119. #define CONFIG_CMD_EEPROM
  120. #define CONFIG_CMD_ELF
  121. #define CONFIG_CMD_FAT
  122. #define CONFIG_CMD_I2C
  123. #define CONFIG_CMD_MMC
  124. #define CONFIG_CMD_NAND
  125. #define CONFIG_CMD_PING
  126. #define CONFIG_CMD_RARP
  127. #define CONFIG_OF_LIBFDT
  128. #define CONFIG_AUTO_COMPLETE
  129. #define CONFIG_SYS_MAXARGS 16
  130. /*
  131. * Environment settings
  132. */
  133. #define CONFIG_ENV_IS_IN_EEPROM
  134. #define CONFIG_ENV_SIZE 0x00200 /* 512 bytes */
  135. #define CONFIG_ENV_OFFSET 0
  136. /*
  137. * Environment configuration
  138. */
  139. #define CONFIG_BOOTDELAY 3
  140. #define CONFIG_BOOTFILE "uImage"
  141. #define CONFIG_BOOTARGS "console=ttyS3,115200n8"
  142. #define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
  143. /*
  144. * Console configuration
  145. */
  146. #define CONFIG_SYS_LONGHELP
  147. #define CONFIG_SYS_PROMPT "AXS# "
  148. #define CONFIG_SYS_CBSIZE 256
  149. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
  150. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
  151. sizeof(CONFIG_SYS_PROMPT) + 16)
  152. /*
  153. * Misc utility configuration
  154. */
  155. #define CONFIG_BOUNCE_BUFFER
  156. #endif /* _CONFIG_AXS101_H_ */