edison.dts 2.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2017 Intel Corporation
  4. */
  5. /dts-v1/;
  6. #include <dt-bindings/gpio/x86-gpio.h>
  7. #include <dt-bindings/interrupt-router/intel-irq.h>
  8. /include/ "skeleton.dtsi"
  9. /include/ "rtc.dtsi"
  10. /include/ "tsc_timer.dtsi"
  11. / {
  12. model = "Intel Edison";
  13. compatible = "intel,edison";
  14. aliases {
  15. serial0 = &serial0;
  16. serial1 = &serial1;
  17. serial2 = &serial2;
  18. };
  19. binman: binman {
  20. multiple-images;
  21. };
  22. chosen {
  23. stdout-path = &serial2;
  24. };
  25. cpus {
  26. #address-cells = <1>;
  27. #size-cells = <0>;
  28. cpu@0 {
  29. device_type = "cpu";
  30. compatible = "cpu-x86";
  31. reg = <0>;
  32. intel,apic-id = <0>;
  33. };
  34. cpu@1 {
  35. device_type = "cpu";
  36. compatible = "cpu-x86";
  37. reg = <1>;
  38. intel,apic-id = <2>;
  39. };
  40. };
  41. pci {
  42. compatible = "pci-x86";
  43. #address-cells = <3>;
  44. #size-cells = <2>;
  45. u-boot,dm-pre-reloc;
  46. ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000
  47. 0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000
  48. 0x01000000 0x0 0x2000 0x2000 0 0xe000>;
  49. };
  50. serial0: serial@ff010080 {
  51. compatible = "intel,mid-uart";
  52. reg = <0xff010080 0x100>;
  53. reg-shift = <0>;
  54. clock-frequency = <29491200>;
  55. current-speed = <115200>;
  56. };
  57. serial1: serial@ff010100 {
  58. compatible = "intel,mid-uart";
  59. reg = <0xff010100 0x100>;
  60. reg-shift = <0>;
  61. clock-frequency = <29491200>;
  62. current-speed = <115200>;
  63. };
  64. serial2: serial@ff010180 {
  65. compatible = "intel,mid-uart";
  66. reg = <0xff010180 0x100>;
  67. reg-shift = <0>;
  68. clock-frequency = <29491200>;
  69. current-speed = <115200>;
  70. };
  71. emmc: mmc@ff3fc000 {
  72. compatible = "intel,sdhci-tangier";
  73. reg = <0xff3fc000 0x1000>;
  74. };
  75. sdcard: mmc@ff3fa000 {
  76. compatible = "intel,sdhci-tangier";
  77. reg = <0xff3fa000 0x1000>;
  78. };
  79. pmu: power@ff00b000 {
  80. compatible = "intel,pmu-mid";
  81. reg = <0xff00b000 0x1000>;
  82. };
  83. scu: ipc@ff009000 {
  84. compatible = "intel,scu-ipc";
  85. reg = <0xff009000 0x1000>;
  86. };
  87. watchdog: wdt@0 {
  88. compatible = "intel,tangier-wdt";
  89. };
  90. reset {
  91. compatible = "intel,reset-tangier";
  92. u-boot,dm-pre-reloc;
  93. };
  94. pinctrl {
  95. compatible = "intel,pinctrl-tangier";
  96. reg = <0xff0c0000 0x8000>;
  97. /*
  98. * Initial configuration came from the firmware.
  99. * Which quite likely has been used in the phones, where I2C #8,
  100. * that is not part of Atom peripheral, is in use.
  101. * Thus we need to override the leftover.
  102. */
  103. i2c6_scl@0 {
  104. pad-offset = <111>;
  105. mode-func = <1>;
  106. protected;
  107. };
  108. i2c6_sda@0 {
  109. pad-offset = <112>;
  110. mode-func = <1>;
  111. protected;
  112. };
  113. };
  114. };
  115. &binman {
  116. u-boot-edison {
  117. filename = "u-boot-edison.img";
  118. /* This is the OSIP */
  119. blob {
  120. filename = "edison-osip.dat";
  121. };
  122. u-boot {
  123. offset = <0x200>;
  124. };
  125. u-boot-env {
  126. offset = <0x200200>;
  127. filename = "edison-environment.txt";
  128. size = <0x10000>;
  129. fill-byte = [ff];
  130. };
  131. u-boot-env2 {
  132. type = "u-boot-env";
  133. offset = <0x500200>;
  134. filename = "edison-environment.txt";
  135. size = <0x10000>;
  136. fill-byte = [ff];
  137. };
  138. };
  139. };