acpi_table.c 22 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Based on acpi.c from coreboot
  4. *
  5. * Copyright (C) 2015, Saket Sinha <saket.sinha89@gmail.com>
  6. * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
  7. */
  8. #define LOG_CATEGORY LOGC_ACPI
  9. #include <common.h>
  10. #include <bloblist.h>
  11. #include <cpu.h>
  12. #include <dm.h>
  13. #include <log.h>
  14. #include <dm/uclass-internal.h>
  15. #include <mapmem.h>
  16. #include <serial.h>
  17. #include <version.h>
  18. #include <acpi/acpigen.h>
  19. #include <acpi/acpi_device.h>
  20. #include <acpi/acpi_table.h>
  21. #include <asm/acpi/global_nvs.h>
  22. #include <asm/ioapic.h>
  23. #include <asm/lapic.h>
  24. #include <asm/mpspec.h>
  25. #include <asm/tables.h>
  26. #include <asm/arch/global_nvs.h>
  27. #include <dm/acpi.h>
  28. #include <linux/err.h>
  29. /*
  30. * IASL compiles the dsdt entries and writes the hex values
  31. * to a C array AmlCode[] (see dsdt.c).
  32. */
  33. extern const unsigned char AmlCode[];
  34. /* ACPI RSDP address to be used in boot parameters */
  35. static ulong acpi_rsdp_addr;
  36. static void acpi_create_facs(struct acpi_facs *facs)
  37. {
  38. memset((void *)facs, 0, sizeof(struct acpi_facs));
  39. memcpy(facs->signature, "FACS", 4);
  40. facs->length = sizeof(struct acpi_facs);
  41. facs->hardware_signature = 0;
  42. facs->firmware_waking_vector = 0;
  43. facs->global_lock = 0;
  44. facs->flags = 0;
  45. facs->x_firmware_waking_vector_l = 0;
  46. facs->x_firmware_waking_vector_h = 0;
  47. facs->version = 1;
  48. }
  49. static int acpi_create_madt_lapic(struct acpi_madt_lapic *lapic,
  50. u8 cpu, u8 apic)
  51. {
  52. lapic->type = ACPI_APIC_LAPIC;
  53. lapic->length = sizeof(struct acpi_madt_lapic);
  54. lapic->flags = LOCAL_APIC_FLAG_ENABLED;
  55. lapic->processor_id = cpu;
  56. lapic->apic_id = apic;
  57. return lapic->length;
  58. }
  59. int acpi_create_madt_lapics(u32 current)
  60. {
  61. struct udevice *dev;
  62. int total_length = 0;
  63. int cpu_num = 0;
  64. for (uclass_find_first_device(UCLASS_CPU, &dev);
  65. dev;
  66. uclass_find_next_device(&dev)) {
  67. struct cpu_platdata *plat = dev_get_parent_platdata(dev);
  68. int length;
  69. length = acpi_create_madt_lapic(
  70. (struct acpi_madt_lapic *)current, cpu_num++,
  71. plat->cpu_id);
  72. current += length;
  73. total_length += length;
  74. }
  75. return total_length;
  76. }
  77. int acpi_create_madt_ioapic(struct acpi_madt_ioapic *ioapic, u8 id,
  78. u32 addr, u32 gsi_base)
  79. {
  80. ioapic->type = ACPI_APIC_IOAPIC;
  81. ioapic->length = sizeof(struct acpi_madt_ioapic);
  82. ioapic->reserved = 0x00;
  83. ioapic->gsi_base = gsi_base;
  84. ioapic->ioapic_id = id;
  85. ioapic->ioapic_addr = addr;
  86. return ioapic->length;
  87. }
  88. int acpi_create_madt_irqoverride(struct acpi_madt_irqoverride *irqoverride,
  89. u8 bus, u8 source, u32 gsirq, u16 flags)
  90. {
  91. irqoverride->type = ACPI_APIC_IRQ_SRC_OVERRIDE;
  92. irqoverride->length = sizeof(struct acpi_madt_irqoverride);
  93. irqoverride->bus = bus;
  94. irqoverride->source = source;
  95. irqoverride->gsirq = gsirq;
  96. irqoverride->flags = flags;
  97. return irqoverride->length;
  98. }
  99. int acpi_create_madt_lapic_nmi(struct acpi_madt_lapic_nmi *lapic_nmi,
  100. u8 cpu, u16 flags, u8 lint)
  101. {
  102. lapic_nmi->type = ACPI_APIC_LAPIC_NMI;
  103. lapic_nmi->length = sizeof(struct acpi_madt_lapic_nmi);
  104. lapic_nmi->flags = flags;
  105. lapic_nmi->processor_id = cpu;
  106. lapic_nmi->lint = lint;
  107. return lapic_nmi->length;
  108. }
  109. static int acpi_create_madt_irq_overrides(u32 current)
  110. {
  111. struct acpi_madt_irqoverride *irqovr;
  112. u16 sci_flags = MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_HIGH;
  113. int length = 0;
  114. irqovr = (void *)current;
  115. length += acpi_create_madt_irqoverride(irqovr, 0, 0, 2, 0);
  116. irqovr = (void *)(current + length);
  117. length += acpi_create_madt_irqoverride(irqovr, 0, 9, 9, sci_flags);
  118. return length;
  119. }
  120. __weak u32 acpi_fill_madt(u32 current)
  121. {
  122. current += acpi_create_madt_lapics(current);
  123. current += acpi_create_madt_ioapic((struct acpi_madt_ioapic *)current,
  124. io_apic_read(IO_APIC_ID) >> 24, IO_APIC_ADDR, 0);
  125. current += acpi_create_madt_irq_overrides(current);
  126. return current;
  127. }
  128. static void acpi_create_madt(struct acpi_madt *madt)
  129. {
  130. struct acpi_table_header *header = &(madt->header);
  131. u32 current = (u32)madt + sizeof(struct acpi_madt);
  132. memset((void *)madt, 0, sizeof(struct acpi_madt));
  133. /* Fill out header fields */
  134. acpi_fill_header(header, "APIC");
  135. header->length = sizeof(struct acpi_madt);
  136. header->revision = ACPI_MADT_REV_ACPI_3_0;
  137. madt->lapic_addr = LAPIC_DEFAULT_BASE;
  138. madt->flags = ACPI_MADT_PCAT_COMPAT;
  139. current = acpi_fill_madt(current);
  140. /* (Re)calculate length and checksum */
  141. header->length = current - (u32)madt;
  142. header->checksum = table_compute_checksum((void *)madt, header->length);
  143. }
  144. int acpi_create_mcfg_mmconfig(struct acpi_mcfg_mmconfig *mmconfig, u32 base,
  145. u16 seg_nr, u8 start, u8 end)
  146. {
  147. memset(mmconfig, 0, sizeof(*mmconfig));
  148. mmconfig->base_address_l = base;
  149. mmconfig->base_address_h = 0;
  150. mmconfig->pci_segment_group_number = seg_nr;
  151. mmconfig->start_bus_number = start;
  152. mmconfig->end_bus_number = end;
  153. return sizeof(struct acpi_mcfg_mmconfig);
  154. }
  155. __weak u32 acpi_fill_mcfg(u32 current)
  156. {
  157. current += acpi_create_mcfg_mmconfig
  158. ((struct acpi_mcfg_mmconfig *)current,
  159. CONFIG_PCIE_ECAM_BASE, 0x0, 0x0, 255);
  160. return current;
  161. }
  162. /* MCFG is defined in the PCI Firmware Specification 3.0 */
  163. static void acpi_create_mcfg(struct acpi_mcfg *mcfg)
  164. {
  165. struct acpi_table_header *header = &(mcfg->header);
  166. u32 current = (u32)mcfg + sizeof(struct acpi_mcfg);
  167. memset((void *)mcfg, 0, sizeof(struct acpi_mcfg));
  168. /* Fill out header fields */
  169. acpi_fill_header(header, "MCFG");
  170. header->length = sizeof(struct acpi_mcfg);
  171. header->revision = 1;
  172. current = acpi_fill_mcfg(current);
  173. /* (Re)calculate length and checksum */
  174. header->length = current - (u32)mcfg;
  175. header->checksum = table_compute_checksum((void *)mcfg, header->length);
  176. }
  177. /**
  178. * acpi_create_tcpa() - Create a TCPA table
  179. *
  180. * @tcpa: Pointer to place to put table
  181. *
  182. * Trusted Computing Platform Alliance Capabilities Table
  183. * TCPA PC Specific Implementation SpecificationTCPA is defined in the PCI
  184. * Firmware Specification 3.0
  185. */
  186. static int acpi_create_tcpa(struct acpi_tcpa *tcpa)
  187. {
  188. struct acpi_table_header *header = &tcpa->header;
  189. u32 current = (u32)tcpa + sizeof(struct acpi_tcpa);
  190. int size = 0x10000; /* Use this as the default size */
  191. void *log;
  192. int ret;
  193. if (!CONFIG_IS_ENABLED(BLOBLIST))
  194. return -ENXIO;
  195. memset(tcpa, '\0', sizeof(struct acpi_tcpa));
  196. /* Fill out header fields */
  197. acpi_fill_header(header, "TCPA");
  198. header->length = sizeof(struct acpi_tcpa);
  199. header->revision = 1;
  200. ret = bloblist_ensure_size_ret(BLOBLISTT_TCPA_LOG, &size, &log);
  201. if (ret)
  202. return log_msg_ret("blob", ret);
  203. tcpa->platform_class = 0;
  204. tcpa->laml = size;
  205. tcpa->lasa = (ulong)log;
  206. /* (Re)calculate length and checksum */
  207. header->length = current - (u32)tcpa;
  208. header->checksum = table_compute_checksum((void *)tcpa, header->length);
  209. return 0;
  210. }
  211. static int get_tpm2_log(void **ptrp, int *sizep)
  212. {
  213. const int tpm2_default_log_len = 0x10000;
  214. int size;
  215. int ret;
  216. *sizep = 0;
  217. size = tpm2_default_log_len;
  218. ret = bloblist_ensure_size_ret(BLOBLISTT_TPM2_TCG_LOG, &size, ptrp);
  219. if (ret)
  220. return log_msg_ret("blob", ret);
  221. *sizep = size;
  222. return 0;
  223. }
  224. static int acpi_create_tpm2(struct acpi_tpm2 *tpm2)
  225. {
  226. struct acpi_table_header *header = &tpm2->header;
  227. int tpm2_log_len;
  228. void *lasa;
  229. int ret;
  230. memset((void *)tpm2, 0, sizeof(struct acpi_tpm2));
  231. /*
  232. * Some payloads like SeaBIOS depend on log area to use TPM2.
  233. * Get the memory size and address of TPM2 log area or initialize it.
  234. */
  235. ret = get_tpm2_log(&lasa, &tpm2_log_len);
  236. if (ret)
  237. return ret;
  238. /* Fill out header fields. */
  239. acpi_fill_header(header, "TPM2");
  240. memcpy(header->aslc_id, ASLC_ID, 4);
  241. header->length = sizeof(struct acpi_tpm2);
  242. header->revision = acpi_get_table_revision(ACPITAB_TPM2);
  243. /* Hard to detect for coreboot. Just set it to 0 */
  244. tpm2->platform_class = 0;
  245. /* Must be set to 0 for FIFO-interface support */
  246. tpm2->control_area = 0;
  247. tpm2->start_method = 6;
  248. memset(tpm2->msp, 0, sizeof(tpm2->msp));
  249. /* Fill the log area size and start address fields. */
  250. tpm2->laml = tpm2_log_len;
  251. tpm2->lasa = (uintptr_t)lasa;
  252. /* Calculate checksum. */
  253. header->checksum = table_compute_checksum((void *)tpm2, header->length);
  254. return 0;
  255. }
  256. __weak u32 acpi_fill_csrt(u32 current)
  257. {
  258. return 0;
  259. }
  260. static int acpi_create_csrt(struct acpi_csrt *csrt)
  261. {
  262. struct acpi_table_header *header = &(csrt->header);
  263. u32 current = (u32)csrt + sizeof(struct acpi_csrt);
  264. uint ptr;
  265. memset((void *)csrt, 0, sizeof(struct acpi_csrt));
  266. /* Fill out header fields */
  267. acpi_fill_header(header, "CSRT");
  268. header->length = sizeof(struct acpi_csrt);
  269. header->revision = 0;
  270. ptr = acpi_fill_csrt(current);
  271. if (!ptr)
  272. return -ENOENT;
  273. current = ptr;
  274. /* (Re)calculate length and checksum */
  275. header->length = current - (u32)csrt;
  276. header->checksum = table_compute_checksum((void *)csrt, header->length);
  277. return 0;
  278. }
  279. static void acpi_create_spcr(struct acpi_spcr *spcr)
  280. {
  281. struct acpi_table_header *header = &(spcr->header);
  282. struct serial_device_info serial_info = {0};
  283. ulong serial_address, serial_offset;
  284. struct udevice *dev;
  285. uint serial_config;
  286. uint serial_width;
  287. int access_size;
  288. int space_id;
  289. int ret = -ENODEV;
  290. memset((void *)spcr, 0, sizeof(struct acpi_spcr));
  291. /* Fill out header fields */
  292. acpi_fill_header(header, "SPCR");
  293. header->length = sizeof(struct acpi_spcr);
  294. header->revision = 2;
  295. /* Read the device once, here. It is reused below */
  296. dev = gd->cur_serial_dev;
  297. if (dev)
  298. ret = serial_getinfo(dev, &serial_info);
  299. if (ret)
  300. serial_info.type = SERIAL_CHIP_UNKNOWN;
  301. /* Encode chip type */
  302. switch (serial_info.type) {
  303. case SERIAL_CHIP_16550_COMPATIBLE:
  304. spcr->interface_type = ACPI_DBG2_16550_COMPATIBLE;
  305. break;
  306. case SERIAL_CHIP_UNKNOWN:
  307. default:
  308. spcr->interface_type = ACPI_DBG2_UNKNOWN;
  309. break;
  310. }
  311. /* Encode address space */
  312. switch (serial_info.addr_space) {
  313. case SERIAL_ADDRESS_SPACE_MEMORY:
  314. space_id = ACPI_ADDRESS_SPACE_MEMORY;
  315. break;
  316. case SERIAL_ADDRESS_SPACE_IO:
  317. default:
  318. space_id = ACPI_ADDRESS_SPACE_IO;
  319. break;
  320. }
  321. serial_width = serial_info.reg_width * 8;
  322. serial_offset = serial_info.reg_offset << serial_info.reg_shift;
  323. serial_address = serial_info.addr + serial_offset;
  324. /* Encode register access size */
  325. switch (serial_info.reg_shift) {
  326. case 0:
  327. access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
  328. break;
  329. case 1:
  330. access_size = ACPI_ACCESS_SIZE_WORD_ACCESS;
  331. break;
  332. case 2:
  333. access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS;
  334. break;
  335. case 3:
  336. access_size = ACPI_ACCESS_SIZE_QWORD_ACCESS;
  337. break;
  338. default:
  339. access_size = ACPI_ACCESS_SIZE_UNDEFINED;
  340. break;
  341. }
  342. debug("UART type %u @ %lx\n", spcr->interface_type, serial_address);
  343. /* Fill GAS */
  344. spcr->serial_port.space_id = space_id;
  345. spcr->serial_port.bit_width = serial_width;
  346. spcr->serial_port.bit_offset = 0;
  347. spcr->serial_port.access_size = access_size;
  348. spcr->serial_port.addrl = lower_32_bits(serial_address);
  349. spcr->serial_port.addrh = upper_32_bits(serial_address);
  350. /* Encode baud rate */
  351. switch (serial_info.baudrate) {
  352. case 9600:
  353. spcr->baud_rate = 3;
  354. break;
  355. case 19200:
  356. spcr->baud_rate = 4;
  357. break;
  358. case 57600:
  359. spcr->baud_rate = 6;
  360. break;
  361. case 115200:
  362. spcr->baud_rate = 7;
  363. break;
  364. default:
  365. spcr->baud_rate = 0;
  366. break;
  367. }
  368. serial_config = SERIAL_DEFAULT_CONFIG;
  369. if (dev)
  370. ret = serial_getconfig(dev, &serial_config);
  371. spcr->parity = SERIAL_GET_PARITY(serial_config);
  372. spcr->stop_bits = SERIAL_GET_STOP(serial_config);
  373. /* No PCI devices for now */
  374. spcr->pci_device_id = 0xffff;
  375. spcr->pci_vendor_id = 0xffff;
  376. /*
  377. * SPCR has no clue if the UART base clock speed is different
  378. * to the default one. However, the SPCR 1.04 defines baud rate
  379. * 0 as a preconfigured state of UART and OS is supposed not
  380. * to touch the configuration of the serial device.
  381. */
  382. if (serial_info.clock != SERIAL_DEFAULT_CLOCK)
  383. spcr->baud_rate = 0;
  384. /* Fix checksum */
  385. header->checksum = table_compute_checksum((void *)spcr, header->length);
  386. }
  387. void acpi_create_ssdt(struct acpi_ctx *ctx, struct acpi_table_header *ssdt,
  388. const char *oem_table_id)
  389. {
  390. memset((void *)ssdt, '\0', sizeof(struct acpi_table_header));
  391. acpi_fill_header(ssdt, "SSDT");
  392. ssdt->revision = acpi_get_table_revision(ACPITAB_SSDT);
  393. ssdt->aslc_revision = 1;
  394. ssdt->length = sizeof(struct acpi_table_header);
  395. acpi_inc(ctx, sizeof(struct acpi_table_header));
  396. acpi_fill_ssdt(ctx);
  397. /* (Re)calculate length and checksum. */
  398. ssdt->length = ctx->current - (void *)ssdt;
  399. ssdt->checksum = table_compute_checksum((void *)ssdt, ssdt->length);
  400. }
  401. /*
  402. * QEMU's version of write_acpi_tables is defined in drivers/misc/qfw.c
  403. */
  404. ulong write_acpi_tables(ulong start_addr)
  405. {
  406. struct acpi_ctx sctx, *ctx = &sctx;
  407. struct acpi_facs *facs;
  408. struct acpi_table_header *dsdt;
  409. struct acpi_fadt *fadt;
  410. struct acpi_table_header *ssdt;
  411. struct acpi_mcfg *mcfg;
  412. struct acpi_tcpa *tcpa;
  413. struct acpi_madt *madt;
  414. struct acpi_csrt *csrt;
  415. struct acpi_spcr *spcr;
  416. void *start;
  417. ulong addr;
  418. int ret;
  419. int i;
  420. start = map_sysmem(start_addr, 0);
  421. debug("ACPI: Writing ACPI tables at %lx\n", start_addr);
  422. acpi_setup_base_tables(ctx, start);
  423. debug("ACPI: * FACS\n");
  424. facs = ctx->current;
  425. acpi_inc_align(ctx, sizeof(struct acpi_facs));
  426. acpi_create_facs(facs);
  427. debug("ACPI: * DSDT\n");
  428. dsdt = ctx->current;
  429. /* Put the table header first */
  430. memcpy(dsdt, &AmlCode, sizeof(struct acpi_table_header));
  431. acpi_inc(ctx, sizeof(struct acpi_table_header));
  432. /* If the table is not empty, allow devices to inject things */
  433. if (dsdt->length >= sizeof(struct acpi_table_header))
  434. acpi_inject_dsdt(ctx);
  435. /* Copy in the AML code itself if any (after the header) */
  436. memcpy(ctx->current,
  437. (char *)&AmlCode + sizeof(struct acpi_table_header),
  438. dsdt->length - sizeof(struct acpi_table_header));
  439. acpi_inc(ctx, dsdt->length - sizeof(struct acpi_table_header));
  440. dsdt->length = ctx->current - (void *)dsdt;
  441. acpi_align(ctx);
  442. if (!IS_ENABLED(CONFIG_ACPI_GNVS_EXTERNAL)) {
  443. /* Pack GNVS into the ACPI table area */
  444. for (i = 0; i < dsdt->length; i++) {
  445. u32 *gnvs = (u32 *)((u32)dsdt + i);
  446. if (*gnvs == ACPI_GNVS_ADDR) {
  447. *gnvs = map_to_sysmem(ctx->current);
  448. debug("Fix up global NVS in DSDT to %#08x\n",
  449. *gnvs);
  450. break;
  451. }
  452. }
  453. /*
  454. * Fill in platform-specific global NVS variables. If this fails
  455. * we cannot return the error but this should only happen while
  456. * debugging.
  457. */
  458. addr = acpi_create_gnvs(ctx->current);
  459. if (IS_ERR_VALUE(addr))
  460. printf("Error: Gailed to create GNVS\n");
  461. acpi_inc_align(ctx, sizeof(struct acpi_global_nvs));
  462. }
  463. /*
  464. * Recalculate the length and update the DSDT checksum since we patched
  465. * the GNVS address. Set the checksum to zero since it is part of the
  466. * region being checksummed.
  467. */
  468. dsdt->checksum = 0;
  469. dsdt->checksum = table_compute_checksum((void *)dsdt, dsdt->length);
  470. /*
  471. * Fill in platform-specific global NVS variables. If this fails we
  472. * cannot return the error but this should only happen while debugging.
  473. */
  474. addr = acpi_create_gnvs(ctx->current);
  475. if (IS_ERR_VALUE(addr))
  476. printf("Error: Failed to create GNVS\n");
  477. acpi_inc_align(ctx, sizeof(struct acpi_global_nvs));
  478. debug("ACPI: * FADT\n");
  479. fadt = ctx->current;
  480. acpi_inc_align(ctx, sizeof(struct acpi_fadt));
  481. acpi_create_fadt(fadt, facs, dsdt);
  482. acpi_add_table(ctx, fadt);
  483. debug("ACPI: * SSDT\n");
  484. ssdt = (struct acpi_table_header *)ctx->current;
  485. acpi_create_ssdt(ctx, ssdt, OEM_TABLE_ID);
  486. if (ssdt->length > sizeof(struct acpi_table_header)) {
  487. acpi_inc_align(ctx, ssdt->length);
  488. acpi_add_table(ctx, ssdt);
  489. }
  490. debug("ACPI: * MCFG\n");
  491. mcfg = ctx->current;
  492. acpi_create_mcfg(mcfg);
  493. acpi_inc_align(ctx, mcfg->header.length);
  494. acpi_add_table(ctx, mcfg);
  495. if (IS_ENABLED(CONFIG_TPM_V2)) {
  496. struct acpi_tpm2 *tpm2;
  497. debug("ACPI: * TPM2\n");
  498. tpm2 = (struct acpi_tpm2 *)ctx->current;
  499. ret = acpi_create_tpm2(tpm2);
  500. if (!ret) {
  501. acpi_inc_align(ctx, tpm2->header.length);
  502. acpi_add_table(ctx, tpm2);
  503. } else {
  504. log_warning("TPM2 table creation failed\n");
  505. }
  506. }
  507. debug("ACPI: * MADT\n");
  508. madt = ctx->current;
  509. acpi_create_madt(madt);
  510. acpi_inc_align(ctx, madt->header.length);
  511. acpi_add_table(ctx, madt);
  512. debug("ACPI: * TCPA\n");
  513. tcpa = (struct acpi_tcpa *)ctx->current;
  514. ret = acpi_create_tcpa(tcpa);
  515. if (ret) {
  516. log_warning("Failed to create TCPA table (err=%d)\n", ret);
  517. } else {
  518. acpi_inc_align(ctx, tcpa->header.length);
  519. acpi_add_table(ctx, tcpa);
  520. }
  521. debug("ACPI: * CSRT\n");
  522. csrt = ctx->current;
  523. if (!acpi_create_csrt(csrt)) {
  524. acpi_inc_align(ctx, csrt->header.length);
  525. acpi_add_table(ctx, csrt);
  526. }
  527. debug("ACPI: * SPCR\n");
  528. spcr = ctx->current;
  529. acpi_create_spcr(spcr);
  530. acpi_inc_align(ctx, spcr->header.length);
  531. acpi_add_table(ctx, spcr);
  532. acpi_write_dev_tables(ctx);
  533. addr = map_to_sysmem(ctx->current);
  534. debug("current = %lx\n", addr);
  535. acpi_rsdp_addr = (unsigned long)ctx->rsdp;
  536. debug("ACPI: done\n");
  537. return addr;
  538. }
  539. ulong acpi_get_rsdp_addr(void)
  540. {
  541. return acpi_rsdp_addr;
  542. }
  543. /**
  544. * acpi_write_hpet() - Write out a HPET table
  545. *
  546. * Write out the table for High-Precision Event Timers
  547. *
  548. * @hpet: Place to put HPET table
  549. */
  550. static int acpi_create_hpet(struct acpi_hpet *hpet)
  551. {
  552. struct acpi_table_header *header = &hpet->header;
  553. struct acpi_gen_regaddr *addr = &hpet->addr;
  554. /*
  555. * See IA-PC HPET (High Precision Event Timers) Specification v1.0a
  556. * https://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/software-developers-hpet-spec-1-0a.pdf
  557. */
  558. memset((void *)hpet, '\0', sizeof(struct acpi_hpet));
  559. /* Fill out header fields. */
  560. acpi_fill_header(header, "HPET");
  561. header->aslc_revision = ASL_REVISION;
  562. header->length = sizeof(struct acpi_hpet);
  563. header->revision = acpi_get_table_revision(ACPITAB_HPET);
  564. /* Fill out HPET address */
  565. addr->space_id = 0; /* Memory */
  566. addr->bit_width = 64;
  567. addr->bit_offset = 0;
  568. addr->addrl = CONFIG_HPET_ADDRESS & 0xffffffff;
  569. addr->addrh = ((unsigned long long)CONFIG_HPET_ADDRESS) >> 32;
  570. hpet->id = *(u32 *)CONFIG_HPET_ADDRESS;
  571. hpet->number = 0;
  572. hpet->min_tick = 0; /* HPET_MIN_TICKS */
  573. header->checksum = table_compute_checksum(hpet,
  574. sizeof(struct acpi_hpet));
  575. return 0;
  576. }
  577. int acpi_write_hpet(struct acpi_ctx *ctx)
  578. {
  579. struct acpi_hpet *hpet;
  580. int ret;
  581. log_debug("ACPI: * HPET\n");
  582. hpet = ctx->current;
  583. acpi_inc_align(ctx, sizeof(struct acpi_hpet));
  584. acpi_create_hpet(hpet);
  585. ret = acpi_add_table(ctx, hpet);
  586. if (ret)
  587. return log_msg_ret("add", ret);
  588. return 0;
  589. }
  590. int acpi_write_dbg2_pci_uart(struct acpi_ctx *ctx, struct udevice *dev,
  591. uint access_size)
  592. {
  593. struct acpi_dbg2_header *dbg2 = ctx->current;
  594. char path[ACPI_PATH_MAX];
  595. struct acpi_gen_regaddr address;
  596. phys_addr_t addr;
  597. int ret;
  598. if (!device_active(dev)) {
  599. log_info("Device not enabled\n");
  600. return -EACCES;
  601. }
  602. /*
  603. * PCI devices don't remember their resource allocation information in
  604. * U-Boot at present. We assume that MMIO is used for the UART and that
  605. * the address space is 32 bytes: ns16550 uses 8 registers of up to
  606. * 32-bits each. This is only for debugging so it is not a big deal.
  607. */
  608. addr = dm_pci_read_bar32(dev, 0);
  609. printf("UART addr %lx\n", (ulong)addr);
  610. memset(&address, '\0', sizeof(address));
  611. address.space_id = ACPI_ADDRESS_SPACE_MEMORY;
  612. address.addrl = (uint32_t)addr;
  613. address.addrh = (uint32_t)((addr >> 32) & 0xffffffff);
  614. address.access_size = access_size;
  615. ret = acpi_device_path(dev, path, sizeof(path));
  616. if (ret)
  617. return log_msg_ret("path", ret);
  618. acpi_create_dbg2(dbg2, ACPI_DBG2_SERIAL_PORT,
  619. ACPI_DBG2_16550_COMPATIBLE, &address, 0x1000, path);
  620. acpi_inc_align(ctx, dbg2->header.length);
  621. acpi_add_table(ctx, dbg2);
  622. return 0;
  623. }
  624. void acpi_fadt_common(struct acpi_fadt *fadt, struct acpi_facs *facs,
  625. void *dsdt)
  626. {
  627. struct acpi_table_header *header = &fadt->header;
  628. memset((void *)fadt, '\0', sizeof(struct acpi_fadt));
  629. acpi_fill_header(header, "FACP");
  630. header->length = sizeof(struct acpi_fadt);
  631. header->revision = 4;
  632. memcpy(header->oem_id, OEM_ID, 6);
  633. memcpy(header->oem_table_id, OEM_TABLE_ID, 8);
  634. memcpy(header->aslc_id, ASLC_ID, 4);
  635. header->aslc_revision = 1;
  636. fadt->firmware_ctrl = (unsigned long)facs;
  637. fadt->dsdt = (unsigned long)dsdt;
  638. fadt->x_firmware_ctl_l = (unsigned long)facs;
  639. fadt->x_firmware_ctl_h = 0;
  640. fadt->x_dsdt_l = (unsigned long)dsdt;
  641. fadt->x_dsdt_h = 0;
  642. fadt->preferred_pm_profile = ACPI_PM_MOBILE;
  643. /* Use ACPI 3.0 revision */
  644. fadt->header.revision = 4;
  645. }
  646. void acpi_create_dmar_drhd(struct acpi_ctx *ctx, uint flags, uint segment,
  647. u64 bar)
  648. {
  649. struct dmar_entry *drhd = ctx->current;
  650. memset(drhd, '\0', sizeof(*drhd));
  651. drhd->type = DMAR_DRHD;
  652. drhd->length = sizeof(*drhd); /* will be fixed up later */
  653. drhd->flags = flags;
  654. drhd->segment = segment;
  655. drhd->bar = bar;
  656. acpi_inc(ctx, drhd->length);
  657. }
  658. void acpi_create_dmar_rmrr(struct acpi_ctx *ctx, uint segment, u64 bar,
  659. u64 limit)
  660. {
  661. struct dmar_rmrr_entry *rmrr = ctx->current;
  662. memset(rmrr, '\0', sizeof(*rmrr));
  663. rmrr->type = DMAR_RMRR;
  664. rmrr->length = sizeof(*rmrr); /* will be fixed up later */
  665. rmrr->segment = segment;
  666. rmrr->bar = bar;
  667. rmrr->limit = limit;
  668. acpi_inc(ctx, rmrr->length);
  669. }
  670. void acpi_dmar_drhd_fixup(struct acpi_ctx *ctx, void *base)
  671. {
  672. struct dmar_entry *drhd = base;
  673. drhd->length = ctx->current - base;
  674. }
  675. void acpi_dmar_rmrr_fixup(struct acpi_ctx *ctx, void *base)
  676. {
  677. struct dmar_rmrr_entry *rmrr = base;
  678. rmrr->length = ctx->current - base;
  679. }
  680. static int acpi_create_dmar_ds(struct acpi_ctx *ctx, enum dev_scope_type type,
  681. uint enumeration_id, pci_dev_t bdf)
  682. {
  683. /* we don't support longer paths yet */
  684. const size_t dev_scope_length = sizeof(struct dev_scope) + 2;
  685. struct dev_scope *ds = ctx->current;
  686. memset(ds, '\0', dev_scope_length);
  687. ds->type = type;
  688. ds->length = dev_scope_length;
  689. ds->enumeration = enumeration_id;
  690. ds->start_bus = PCI_BUS(bdf);
  691. ds->path[0].dev = PCI_DEV(bdf);
  692. ds->path[0].fn = PCI_FUNC(bdf);
  693. return ds->length;
  694. }
  695. int acpi_create_dmar_ds_pci_br(struct acpi_ctx *ctx, pci_dev_t bdf)
  696. {
  697. return acpi_create_dmar_ds(ctx, SCOPE_PCI_SUB, 0, bdf);
  698. }
  699. int acpi_create_dmar_ds_pci(struct acpi_ctx *ctx, pci_dev_t bdf)
  700. {
  701. return acpi_create_dmar_ds(ctx, SCOPE_PCI_ENDPOINT, 0, bdf);
  702. }
  703. int acpi_create_dmar_ds_ioapic(struct acpi_ctx *ctx, uint enumeration_id,
  704. pci_dev_t bdf)
  705. {
  706. return acpi_create_dmar_ds(ctx, SCOPE_IOAPIC, enumeration_id, bdf);
  707. }
  708. int acpi_create_dmar_ds_msi_hpet(struct acpi_ctx *ctx, uint enumeration_id,
  709. pci_dev_t bdf)
  710. {
  711. return acpi_create_dmar_ds(ctx, SCOPE_MSI_HPET, enumeration_id, bdf);
  712. }