thunderx.c 2.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /**
  3. * (C) Copyright 2014, Cavium Inc.
  4. **/
  5. #include <common.h>
  6. #include <dm.h>
  7. #include <init.h>
  8. #include <malloc.h>
  9. #include <errno.h>
  10. #include <linux/compiler.h>
  11. #include <cavium/atf.h>
  12. #include <asm/armv8/mmu.h>
  13. #if !CONFIG_IS_ENABLED(OF_CONTROL)
  14. #include <dm/platform_data/serial_pl01x.h>
  15. static const struct pl01x_serial_platdata serial0 = {
  16. .base = CONFIG_SYS_SERIAL0,
  17. .type = TYPE_PL011,
  18. .clock = 0,
  19. .skip_init = true,
  20. };
  21. U_BOOT_DEVICE(thunderx_serial0) = {
  22. .name = "serial_pl01x",
  23. .platdata = &serial0,
  24. };
  25. static const struct pl01x_serial_platdata serial1 = {
  26. .base = CONFIG_SYS_SERIAL1,
  27. .type = TYPE_PL011,
  28. .clock = 0,
  29. .skip_init = true,
  30. };
  31. U_BOOT_DEVICE(thunderx_serial1) = {
  32. .name = "serial_pl01x",
  33. .platdata = &serial1,
  34. };
  35. #endif
  36. DECLARE_GLOBAL_DATA_PTR;
  37. static struct mm_region thunderx_mem_map[] = {
  38. {
  39. .virt = 0x000000000000UL,
  40. .phys = 0x000000000000UL,
  41. .size = 0x40000000000UL,
  42. .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_NON_SHARE,
  43. }, {
  44. .virt = 0x800000000000UL,
  45. .phys = 0x800000000000UL,
  46. .size = 0x40000000000UL,
  47. .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  48. PTE_BLOCK_NON_SHARE,
  49. }, {
  50. .virt = 0x840000000000UL,
  51. .phys = 0x840000000000UL,
  52. .size = 0x40000000000UL,
  53. .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  54. PTE_BLOCK_NON_SHARE,
  55. }, {
  56. /* List terminator */
  57. 0,
  58. }
  59. };
  60. struct mm_region *mem_map = thunderx_mem_map;
  61. int board_init(void)
  62. {
  63. return 0;
  64. }
  65. int timer_init(void)
  66. {
  67. return 0;
  68. }
  69. int dram_init(void)
  70. {
  71. ssize_t node_count = atf_node_count();
  72. ssize_t dram_size;
  73. int node;
  74. printf("Initializing\nNodes in system: %zd\n", node_count);
  75. gd->ram_size = 0;
  76. for (node = 0; node < node_count; node++) {
  77. dram_size = atf_dram_size(node);
  78. printf("Node %d: %zd MBytes of DRAM\n", node, dram_size >> 20);
  79. gd->ram_size += dram_size;
  80. }
  81. gd->ram_size -= MEM_BASE;
  82. *(unsigned long *)CPU_RELEASE_ADDR = 0;
  83. puts("DRAM size:");
  84. return 0;
  85. }
  86. /*
  87. * Board specific reset that is system reset.
  88. */
  89. void reset_cpu(ulong addr)
  90. {
  91. }
  92. /*
  93. * Board specific ethernet initialization routine.
  94. */
  95. int board_eth_init(bd_t *bis)
  96. {
  97. int rc = 0;
  98. return rc;
  99. }
  100. #ifdef CONFIG_PCI
  101. void pci_init_board(void)
  102. {
  103. printf("DEBUG: PCI Init TODO *****\n");
  104. }
  105. #endif