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  1. /*
  2. * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
  3. * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <asm-offsets.h>
  24. #include <config.h>
  25. #include <timestamp.h>
  26. #include "version.h"
  27. #include <asm/cache.h>
  28. #ifndef CONFIG_IDENT_STRING
  29. #define CONFIG_IDENT_STRING ""
  30. #endif
  31. #define _START _start
  32. #define _FAULT _fault
  33. #define SAVE_ALL \
  34. move.w #0x2700,%sr; /* disable intrs */ \
  35. subl #60,%sp; /* space for 15 regs */ \
  36. moveml %d0-%d7/%a0-%a6,%sp@;
  37. #define RESTORE_ALL \
  38. moveml %sp@,%d0-%d7/%a0-%a6; \
  39. addl #60,%sp; /* space for 15 regs */ \
  40. rte;
  41. #if defined(CONFIG_CF_SBF)
  42. #define ASM_DRAMINIT (asm_dram_init - CONFIG_SYS_TEXT_BASE + CONFIG_SYS_INIT_RAM_ADDR)
  43. #define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_SYS_TEXT_BASE + CONFIG_SYS_INIT_RAM_ADDR)
  44. #endif
  45. .text
  46. /*
  47. * Vector table. This is used for initial platform startup.
  48. * These vectors are to catch any un-intended traps.
  49. */
  50. _vectors:
  51. #if defined(CONFIG_CF_SBF)
  52. INITSP: .long 0 /* Initial SP */
  53. INITPC: .long ASM_DRAMINIT /* Initial PC */
  54. #else
  55. INITSP: .long 0 /* Initial SP */
  56. INITPC: .long _START /* Initial PC */
  57. #endif
  58. vector02: .long _FAULT /* Access Error */
  59. vector03: .long _FAULT /* Address Error */
  60. vector04: .long _FAULT /* Illegal Instruction */
  61. vector05: .long _FAULT /* Reserved */
  62. vector06: .long _FAULT /* Reserved */
  63. vector07: .long _FAULT /* Reserved */
  64. vector08: .long _FAULT /* Privilege Violation */
  65. vector09: .long _FAULT /* Trace */
  66. vector0A: .long _FAULT /* Unimplemented A-Line */
  67. vector0B: .long _FAULT /* Unimplemented F-Line */
  68. vector0C: .long _FAULT /* Debug Interrupt */
  69. vector0D: .long _FAULT /* Reserved */
  70. vector0E: .long _FAULT /* Format Error */
  71. vector0F: .long _FAULT /* Unitialized Int. */
  72. /* Reserved */
  73. vector10_17:
  74. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  75. vector18: .long _FAULT /* Spurious Interrupt */
  76. vector19: .long _FAULT /* Autovector Level 1 */
  77. vector1A: .long _FAULT /* Autovector Level 2 */
  78. vector1B: .long _FAULT /* Autovector Level 3 */
  79. vector1C: .long _FAULT /* Autovector Level 4 */
  80. vector1D: .long _FAULT /* Autovector Level 5 */
  81. vector1E: .long _FAULT /* Autovector Level 6 */
  82. vector1F: .long _FAULT /* Autovector Level 7 */
  83. #if !defined(CONFIG_CF_SBF)
  84. /* TRAP #0 - #15 */
  85. vector20_2F:
  86. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  87. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  88. /* Reserved */
  89. vector30_3F:
  90. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  91. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  92. vector64_127:
  93. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  94. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  95. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  96. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  97. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  98. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  99. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  100. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  101. vector128_191:
  102. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  103. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  104. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  105. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  106. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  107. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  108. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  109. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  110. vector192_255:
  111. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  112. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  113. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  114. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  115. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  116. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  117. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  118. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  119. #endif
  120. #if defined(CONFIG_CF_SBF)
  121. /* Image header: chksum 4 bytes, len 4 bytes, img dest 4 bytes */
  122. asm_sbf_img_hdr:
  123. .long 0x00000000 /* checksum, not yet implemented */
  124. .long 0x00020000 /* image length */
  125. .long CONFIG_SYS_TEXT_BASE /* image to be relocated at */
  126. asm_dram_init:
  127. move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
  128. movec %d0, %RAMBAR1 /* init Rambar */
  129. move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
  130. clr.l %sp@-
  131. /* Must disable global address */
  132. move.l #0xFC008000, %a1
  133. move.l #(CONFIG_SYS_CS0_BASE), (%a1)
  134. move.l #0xFC008008, %a1
  135. move.l #(CONFIG_SYS_CS0_CTRL), (%a1)
  136. move.l #0xFC008004, %a1
  137. move.l #(CONFIG_SYS_CS0_MASK), (%a1)
  138. /*
  139. * Dram Initialization
  140. * a1, a2, and d0
  141. */
  142. /* mscr sdram */
  143. move.l #0xFC0A4074, %a1
  144. move.b #(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1)
  145. nop
  146. /* SDRAM Chip 0 and 1 */
  147. move.l #0xFC0B8110, %a1
  148. move.l #0xFC0B8114, %a2
  149. /* calculate the size */
  150. move.l #0x13, %d1
  151. move.l #(CONFIG_SYS_SDRAM_SIZE), %d2
  152. #ifdef CONFIG_SYS_SDRAM_BASE1
  153. lsr.l #1, %d2
  154. #endif
  155. dramsz_loop:
  156. lsr.l #1, %d2
  157. add.l #1, %d1
  158. cmp.l #1, %d2
  159. bne dramsz_loop
  160. /* SDRAM Chip 0 and 1 */
  161. move.l #(CONFIG_SYS_SDRAM_BASE), (%a1)
  162. or.l %d1, (%a1)
  163. #ifdef CONFIG_SYS_SDRAM_BASE1
  164. move.l #(CONFIG_SYS_SDRAM_BASE1), (%a2)
  165. or.l %d1, (%a2)
  166. #endif
  167. nop
  168. /* dram cfg1 and cfg2 */
  169. move.l #0xFC0B8008, %a1
  170. move.l #(CONFIG_SYS_SDRAM_CFG1), (%a1)
  171. nop
  172. move.l #0xFC0B800C, %a2
  173. move.l #(CONFIG_SYS_SDRAM_CFG2), (%a2)
  174. nop
  175. move.l #0xFC0B8000, %a1 /* Mode */
  176. move.l #0xFC0B8004, %a2 /* Ctrl */
  177. /* Issue PALL */
  178. move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
  179. nop
  180. /* Issue LEMR */
  181. move.l #(CONFIG_SYS_SDRAM_MODE), (%a1)
  182. nop
  183. move.l #(CONFIG_SYS_SDRAM_EMOD), (%a1)
  184. nop
  185. move.l #1000, %d0
  186. wait1000:
  187. nop
  188. subq.l #1, %d0
  189. bne wait1000
  190. /* Issue PALL */
  191. move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
  192. nop
  193. /* Perform two refresh cycles */
  194. move.l #(CONFIG_SYS_SDRAM_CTRL + 4), %d0
  195. nop
  196. move.l %d0, (%a2)
  197. move.l %d0, (%a2)
  198. nop
  199. move.l #(CONFIG_SYS_SDRAM_CTRL), %d0
  200. and.l #0x7FFFFFFF, %d0
  201. or.l #0x10000c00, %d0
  202. move.l %d0, (%a2)
  203. nop
  204. /*
  205. * DSPI Initialization
  206. * a0 - general, sram - 0x80008000 - 32, see M52277EVB.h
  207. * a1 - dspi status
  208. * a2 - dtfr
  209. * a3 - drfr
  210. * a4 - Dst addr
  211. */
  212. /* Enable pins for DSPI mode - chip-selects are enabled later */
  213. move.l #0xFC0A4036, %a0
  214. move.b #0x3F, %d0
  215. move.b %d0, (%a0)
  216. /* DSPI CS */
  217. #ifdef CONFIG_SYS_DSPI_CS0
  218. move.b (%a0), %d0
  219. or.l #0xC0, %d0
  220. move.b %d0, (%a0)
  221. #endif
  222. #ifdef CONFIG_SYS_DSPI_CS2
  223. move.l #0xFC0A4037, %a0
  224. move.b (%a0), %d0
  225. or.l #0x10, %d0
  226. move.b %d0, (%a0)
  227. #endif
  228. nop
  229. /* Configure DSPI module */
  230. move.l #0xFC05C000, %a0
  231. move.l #0x80FF0C00, (%a0) /* Master, clear TX/RX FIFO */
  232. move.l #0xFC05C00C, %a0
  233. move.l #0x3E000011, (%a0)
  234. move.l #0xFC05C034, %a2 /* dtfr */
  235. move.l #0xFC05C03B, %a3 /* drfr */
  236. move.l #(ASM_SBF_IMG_HDR + 4), %a1
  237. move.l (%a1)+, %d5
  238. move.l (%a1), %a4
  239. move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_SBFHDR_DATA_OFFSET), %a0
  240. move.l #(CONFIG_SYS_SBFHDR_SIZE), %d4
  241. move.l #0xFC05C02C, %a1 /* dspi status */
  242. /* Issue commands and address */
  243. move.l #0x8004000B, %d2 /* Fast Read Cmd */
  244. jsr asm_dspi_wr_status
  245. jsr asm_dspi_rd_status
  246. move.l #0x80040000, %d2 /* Address byte 2 */
  247. jsr asm_dspi_wr_status
  248. jsr asm_dspi_rd_status
  249. move.l #0x80040000, %d2 /* Address byte 1 */
  250. jsr asm_dspi_wr_status
  251. jsr asm_dspi_rd_status
  252. move.l #0x80040000, %d2 /* Address byte 0 */
  253. jsr asm_dspi_wr_status
  254. jsr asm_dspi_rd_status
  255. move.l #0x80040000, %d2 /* Dummy Wr and Rd */
  256. jsr asm_dspi_wr_status
  257. jsr asm_dspi_rd_status
  258. /* Transfer serial boot header to sram */
  259. asm_dspi_rd_loop1:
  260. move.l #0x80040000, %d2
  261. jsr asm_dspi_wr_status
  262. jsr asm_dspi_rd_status
  263. move.b %d1, (%a0) /* read, copy to dst */
  264. add.l #1, %a0 /* inc dst by 1 */
  265. sub.l #1, %d4 /* dec cnt by 1 */
  266. bne asm_dspi_rd_loop1
  267. /* Transfer u-boot from serial flash to memory */
  268. asm_dspi_rd_loop2:
  269. move.l #0x80040000, %d2
  270. jsr asm_dspi_wr_status
  271. jsr asm_dspi_rd_status
  272. move.b %d1, (%a4) /* read, copy to dst */
  273. add.l #1, %a4 /* inc dst by 1 */
  274. sub.l #1, %d5 /* dec cnt by 1 */
  275. bne asm_dspi_rd_loop2
  276. move.l #0x00040000, %d2 /* Terminate */
  277. jsr asm_dspi_wr_status
  278. jsr asm_dspi_rd_status
  279. /* jump to memory and execute */
  280. move.l #(CONFIG_SYS_TEXT_BASE + 0x400), %a0
  281. move.l %a0, (%a1)
  282. jmp (%a0)
  283. asm_dspi_wr_status:
  284. move.l (%a1), %d0 /* status */
  285. and.l #0x0000F000, %d0
  286. cmp.l #0x00003000, %d0
  287. bgt asm_dspi_wr_status
  288. move.l %d2, (%a2)
  289. rts
  290. asm_dspi_rd_status:
  291. move.l (%a1), %d0 /* status */
  292. and.l #0x000000F0, %d0
  293. lsr.l #4, %d0
  294. cmp.l #0, %d0
  295. beq asm_dspi_rd_status
  296. move.b (%a3), %d1
  297. rts
  298. #endif /* CONFIG_CF_SBF */
  299. .text
  300. . = 0x400
  301. .globl _start
  302. _start:
  303. nop
  304. nop
  305. move.w #0x2700,%sr /* Mask off Interrupt */
  306. /* Set vector base register at the beginning of the Flash */
  307. #if defined(CONFIG_CF_SBF)
  308. move.l #CONFIG_SYS_TEXT_BASE, %d0
  309. movec %d0, %VBR
  310. #else
  311. move.l #CONFIG_SYS_FLASH_BASE, %d0
  312. movec %d0, %VBR
  313. move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
  314. movec %d0, %RAMBAR1
  315. #endif
  316. /* invalidate and disable cache */
  317. move.l #CF_CACR_CINV, %d0 /* Invalidate cache cmd */
  318. movec %d0, %CACR /* Invalidate cache */
  319. move.l #0, %d0
  320. movec %d0, %ACR0
  321. movec %d0, %ACR1
  322. /* initialize general use internal ram */
  323. move.l #0, %d0
  324. move.l #(ICACHE_STATUS), %a1 /* icache */
  325. move.l #(DCACHE_STATUS), %a2 /* icache */
  326. move.l %d0, (%a1)
  327. move.l %d0, (%a2)
  328. /* set stackpointer to end of internal ram to get some stackspace for
  329. the first c-code */
  330. move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
  331. clr.l %sp@-
  332. move.l #__got_start, %a5 /* put relocation table address to a5 */
  333. bsr cpu_init_f /* run low-level CPU init code (from flash) */
  334. bsr board_init_f /* run low-level board init code (from flash) */
  335. /* board_init_f() does not return */
  336. /*------------------------------------------------------------------------------*/
  337. /*
  338. * void relocate_code (addr_sp, gd, addr_moni)
  339. *
  340. * This "function" does not return, instead it continues in RAM
  341. * after relocating the monitor code.
  342. *
  343. * r3 = dest
  344. * r4 = src
  345. * r5 = length in bytes
  346. * r6 = cachelinesize
  347. */
  348. .globl relocate_code
  349. relocate_code:
  350. link.w %a6,#0
  351. move.l 8(%a6), %sp /* set new stack pointer */
  352. move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
  353. move.l 16(%a6), %a0 /* Save copy of Destination Address */
  354. move.l #CONFIG_SYS_MONITOR_BASE, %a1
  355. move.l #__init_end, %a2
  356. move.l %a0, %a3
  357. /* copy the code to RAM */
  358. 1:
  359. move.l (%a1)+, (%a3)+
  360. cmp.l %a1,%a2
  361. bgt.s 1b
  362. /*
  363. * We are done. Do not return, instead branch to second part of board
  364. * initialization, now running from RAM.
  365. */
  366. move.l %a0, %a1
  367. add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
  368. jmp (%a1)
  369. in_ram:
  370. clear_bss:
  371. /*
  372. * Now clear BSS segment
  373. */
  374. move.l %a0, %a1
  375. add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
  376. move.l %a0, %d1
  377. add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
  378. 6:
  379. clr.l (%a1)+
  380. cmp.l %a1,%d1
  381. bgt.s 6b
  382. /*
  383. * fix got table in RAM
  384. */
  385. move.l %a0, %a1
  386. add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
  387. move.l %a1,%a5 /* * fix got pointer register a5 */
  388. move.l %a0, %a2
  389. add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
  390. 7:
  391. move.l (%a1),%d1
  392. sub.l #_start,%d1
  393. add.l %a0,%d1
  394. move.l %d1,(%a1)+
  395. cmp.l %a2, %a1
  396. bne 7b
  397. /* calculate relative jump to board_init_r in ram */
  398. move.l %a0, %a1
  399. add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
  400. /* set parameters for board_init_r */
  401. move.l %a0,-(%sp) /* dest_addr */
  402. move.l %d0,-(%sp) /* gd */
  403. jsr (%a1)
  404. /*------------------------------------------------------------------------------*/
  405. /* exception code */
  406. .globl _fault
  407. _fault:
  408. jmp _fault
  409. .globl _exc_handler
  410. _exc_handler:
  411. SAVE_ALL
  412. movel %sp,%sp@-
  413. bsr exc_handler
  414. addql #4,%sp
  415. RESTORE_ALL
  416. .globl _int_handler
  417. _int_handler:
  418. SAVE_ALL
  419. movel %sp,%sp@-
  420. bsr int_handler
  421. addql #4,%sp
  422. RESTORE_ALL
  423. /*------------------------------------------------------------------------------*/
  424. .globl version_string
  425. version_string:
  426. .ascii U_BOOT_VERSION
  427. .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
  428. .ascii CONFIG_IDENT_STRING, "\0"
  429. .align 4